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Heiko Carstens9b747532012-06-26 16:06:37 +02001#ifndef __S390_ASM_SIGP_H
2#define __S390_ASM_SIGP_H
3
4/* SIGP order codes */
5#define SIGP_SENSE 1
6#define SIGP_EXTERNAL_CALL 2
7#define SIGP_EMERGENCY_SIGNAL 3
Thomas Huth58bc33b2013-12-03 12:54:55 +01008#define SIGP_START 4
Heiko Carstens9b747532012-06-26 16:06:37 +02009#define SIGP_STOP 5
10#define SIGP_RESTART 6
11#define SIGP_STOP_AND_STORE_STATUS 9
12#define SIGP_INITIAL_CPU_RESET 11
David Hildenbrandb8983832014-05-23 12:22:56 +020013#define SIGP_CPU_RESET 12
Heiko Carstens9b747532012-06-26 16:06:37 +020014#define SIGP_SET_PREFIX 13
15#define SIGP_STORE_STATUS_AT_ADDRESS 14
16#define SIGP_SET_ARCHITECTURE 18
Thomas Huthb13d3582013-11-21 16:01:48 +010017#define SIGP_COND_EMERGENCY_SIGNAL 19
Heiko Carstens9b747532012-06-26 16:06:37 +020018#define SIGP_SENSE_RUNNING 21
Martin Schwidefsky10ad34b2015-01-14 17:52:10 +010019#define SIGP_SET_MULTI_THREADING 22
Michael Holzheua62bc072014-10-06 17:57:43 +020020#define SIGP_STORE_ADDITIONAL_STATUS 23
Heiko Carstens9b747532012-06-26 16:06:37 +020021
22/* SIGP condition codes */
23#define SIGP_CC_ORDER_CODE_ACCEPTED 0
24#define SIGP_CC_STATUS_STORED 1
25#define SIGP_CC_BUSY 2
26#define SIGP_CC_NOT_OPERATIONAL 3
27
28/* SIGP cpu status bits */
29
30#define SIGP_STATUS_CHECK_STOP 0x00000010UL
31#define SIGP_STATUS_STOPPED 0x00000040UL
Cornelia Huck21b26c02012-06-26 16:06:41 +020032#define SIGP_STATUS_EXT_CALL_PENDING 0x00000080UL
Heiko Carstens9b747532012-06-26 16:06:37 +020033#define SIGP_STATUS_INVALID_PARAMETER 0x00000100UL
34#define SIGP_STATUS_INCORRECT_STATE 0x00000200UL
35#define SIGP_STATUS_NOT_RUNNING 0x00000400UL
36
Heiko Carstense7c46c62014-04-04 11:23:03 +020037#ifndef __ASSEMBLY__
38
Michael Holzheua62bc072014-10-06 17:57:43 +020039static inline int __pcpu_sigp(u16 addr, u8 order, unsigned long parm,
40 u32 *status)
Heiko Carstense7c46c62014-04-04 11:23:03 +020041{
Michael Holzheua62bc072014-10-06 17:57:43 +020042 register unsigned long reg1 asm ("1") = parm;
Heiko Carstense7c46c62014-04-04 11:23:03 +020043 int cc;
44
45 asm volatile(
46 " sigp %1,%2,0(%3)\n"
47 " ipm %0\n"
48 " srl %0,28\n"
49 : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
50 if (status && cc == 1)
51 *status = reg1;
52 return cc;
53}
54
55#endif /* __ASSEMBLY__ */
56
Heiko Carstens9b747532012-06-26 16:06:37 +020057#endif /* __S390_ASM_SIGP_H */