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Sudip Mukherjee81dee672015-03-03 16:21:06 +05301#ifndef DDK750_MODE_H__
2#define DDK750_MODE_H__
3
4#include "ddk750_chip.h"
5
Juston Li259fef32015-07-14 21:14:45 -07006typedef enum _spolarity_t {
Juston Li78376532015-07-14 21:14:30 -07007 POS = 0, /* positive */
8 NEG, /* negative */
Sudip Mukherjee81dee672015-03-03 16:21:06 +05309}
10spolarity_t;
11
12
Juston Li259fef32015-07-14 21:14:45 -070013typedef struct _mode_parameter_t {
Juston Li78376532015-07-14 21:14:30 -070014 /* Horizontal timing. */
15 unsigned long horizontal_total;
16 unsigned long horizontal_display_end;
17 unsigned long horizontal_sync_start;
18 unsigned long horizontal_sync_width;
19 spolarity_t horizontal_sync_polarity;
Sudip Mukherjee81dee672015-03-03 16:21:06 +053020
Juston Li78376532015-07-14 21:14:30 -070021 /* Vertical timing. */
22 unsigned long vertical_total;
23 unsigned long vertical_display_end;
24 unsigned long vertical_sync_start;
25 unsigned long vertical_sync_height;
26 spolarity_t vertical_sync_polarity;
Sudip Mukherjee81dee672015-03-03 16:21:06 +053027
Juston Li78376532015-07-14 21:14:30 -070028 /* Refresh timing. */
29 unsigned long pixel_clock;
30 unsigned long horizontal_frequency;
31 unsigned long vertical_frequency;
Sudip Mukherjee81dee672015-03-03 16:21:06 +053032
Juston Li78376532015-07-14 21:14:30 -070033 /* Clock Phase. This clock phase only applies to Panel. */
34 spolarity_t clock_phase_polarity;
Sudip Mukherjee81dee672015-03-03 16:21:06 +053035}
36mode_parameter_t;
37
Isaac Assegai5e935812015-06-02 03:14:23 -070038int ddk750_setModeTiming(mode_parameter_t *, clock_type_t);
Sudip Mukherjee81dee672015-03-03 16:21:06 +053039
40
41#endif