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Michael Chana4636962009-06-08 18:14:43 -07001/* cnic.h: Broadcom CNIC core network driver.
2 *
Michael Chan1d9cfc42010-02-24 14:42:09 +00003 * Copyright (c) 2006-2010 Broadcom Corporation
Michael Chana4636962009-06-08 18:14:43 -07004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 */
10
11
12#ifndef CNIC_H
13#define CNIC_H
14
15#define KWQ_PAGE_CNT 4
16#define KCQ_PAGE_CNT 16
17
18#define KWQ_CID 24
19#define KCQ_CID 25
20
21/*
22 * krnlq_context definition
23 */
24#define L5_KRNLQ_FLAGS 0x00000000
25#define L5_KRNLQ_SIZE 0x00000000
26#define L5_KRNLQ_TYPE 0x00000000
27#define KRNLQ_FLAGS_PG_SZ (0xf<<0)
28#define KRNLQ_FLAGS_PG_SZ_256 (0<<0)
29#define KRNLQ_FLAGS_PG_SZ_512 (1<<0)
30#define KRNLQ_FLAGS_PG_SZ_1K (2<<0)
31#define KRNLQ_FLAGS_PG_SZ_2K (3<<0)
32#define KRNLQ_FLAGS_PG_SZ_4K (4<<0)
33#define KRNLQ_FLAGS_PG_SZ_8K (5<<0)
34#define KRNLQ_FLAGS_PG_SZ_16K (6<<0)
35#define KRNLQ_FLAGS_PG_SZ_32K (7<<0)
36#define KRNLQ_FLAGS_PG_SZ_64K (8<<0)
37#define KRNLQ_FLAGS_PG_SZ_128K (9<<0)
38#define KRNLQ_FLAGS_PG_SZ_256K (10<<0)
39#define KRNLQ_FLAGS_PG_SZ_512K (11<<0)
40#define KRNLQ_FLAGS_PG_SZ_1M (12<<0)
41#define KRNLQ_FLAGS_PG_SZ_2M (13<<0)
42#define KRNLQ_FLAGS_QE_SELF_SEQ (1<<15)
43#define KRNLQ_SIZE_TYPE_SIZE ((((0x28 + 0x1f) & ~0x1f) / 0x20) << 16)
44#define KRNLQ_TYPE_TYPE (0xf<<28)
45#define KRNLQ_TYPE_TYPE_EMPTY (0<<28)
46#define KRNLQ_TYPE_TYPE_KRNLQ (6<<28)
47
48#define L5_KRNLQ_HOST_QIDX 0x00000004
49#define L5_KRNLQ_HOST_FW_QIDX 0x00000008
50#define L5_KRNLQ_NX_QE_SELF_SEQ 0x0000000c
51#define L5_KRNLQ_QE_SELF_SEQ_MAX 0x0000000c
52#define L5_KRNLQ_NX_QE_HADDR_HI 0x00000010
53#define L5_KRNLQ_NX_QE_HADDR_LO 0x00000014
54#define L5_KRNLQ_PGTBL_PGIDX 0x00000018
55#define L5_KRNLQ_NX_PG_QIDX 0x00000018
56#define L5_KRNLQ_PGTBL_NPAGES 0x0000001c
57#define L5_KRNLQ_QIDX_INCR 0x0000001c
58#define L5_KRNLQ_PGTBL_HADDR_HI 0x00000020
59#define L5_KRNLQ_PGTBL_HADDR_LO 0x00000024
60
61#define BNX2_PG_CTX_MAP 0x1a0034
62#define BNX2_ISCSI_CTX_MAP 0x1a0074
63
64struct cnic_redirect_entry {
65 struct dst_entry *old_dst;
66 struct dst_entry *new_dst;
67};
68
69#define MAX_COMPLETED_KCQE 64
70
71#define MAX_CNIC_L5_CONTEXT 256
72
73#define MAX_CM_SK_TBL_SZ MAX_CNIC_L5_CONTEXT
74
75#define MAX_ISCSI_TBL_SZ 256
76
77#define CNIC_LOCAL_PORT_MIN 60000
78#define CNIC_LOCAL_PORT_MAX 61000
79#define CNIC_LOCAL_PORT_RANGE (CNIC_LOCAL_PORT_MAX - CNIC_LOCAL_PORT_MIN)
80
81#define KWQE_CNT (BCM_PAGE_SIZE / sizeof(struct kwqe))
82#define KCQE_CNT (BCM_PAGE_SIZE / sizeof(struct kcqe))
83#define MAX_KWQE_CNT (KWQE_CNT - 1)
84#define MAX_KCQE_CNT (KCQE_CNT - 1)
85
86#define MAX_KWQ_IDX ((KWQ_PAGE_CNT * KWQE_CNT) - 1)
87#define MAX_KCQ_IDX ((KCQ_PAGE_CNT * KCQE_CNT) - 1)
88
89#define KWQ_PG(x) (((x) & ~MAX_KWQE_CNT) >> (BCM_PAGE_BITS - 5))
90#define KWQ_IDX(x) ((x) & MAX_KWQE_CNT)
91
92#define KCQ_PG(x) (((x) & ~MAX_KCQE_CNT) >> (BCM_PAGE_BITS - 5))
93#define KCQ_IDX(x) ((x) & MAX_KCQE_CNT)
94
95#define BNX2X_NEXT_KCQE(x) (((x) & (MAX_KCQE_CNT - 1)) == \
96 (MAX_KCQE_CNT - 1)) ? \
97 (x) + 2 : (x) + 1
98
99#define BNX2X_KWQ_DATA_PG(cp, x) ((x) / (cp)->kwq_16_data_pp)
100#define BNX2X_KWQ_DATA_IDX(cp, x) ((x) % (cp)->kwq_16_data_pp)
101#define BNX2X_KWQ_DATA(cp, x) \
102 &(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)]
103
Eddie Waia9736c02010-02-24 14:42:04 +0000104#define DEF_IPID_START 0x8000
Michael Chana4636962009-06-08 18:14:43 -0700105
106#define DEF_KA_TIMEOUT 10000
107#define DEF_KA_INTERVAL 300000
108#define DEF_KA_MAX_PROBE_COUNT 3
109#define DEF_TOS 0
110#define DEF_TTL 0xfe
111#define DEF_SND_SEQ_SCALE 0
112#define DEF_RCV_BUF 0xffff
113#define DEF_SND_BUF 0xffff
114#define DEF_SEED 0
115#define DEF_MAX_RT_TIME 500
116#define DEF_MAX_DA_COUNT 2
117#define DEF_SWS_TIMER 1000
118#define DEF_MAX_CWND 0xffff
119
120struct cnic_ctx {
121 u32 cid;
122 void *ctx;
123 dma_addr_t mapping;
124};
125
126#define BNX2_MAX_CID 0x2000
127
128struct cnic_dma {
129 int num_pages;
130 void **pg_arr;
131 dma_addr_t *pg_map_arr;
132 int pgtbl_size;
133 u32 *pgtbl;
134 dma_addr_t pgtbl_map;
135};
136
137struct cnic_id_tbl {
138 spinlock_t lock;
139 u32 start;
140 u32 max;
141 u32 next;
142 unsigned long *table;
143};
144
145#define CNIC_KWQ16_DATA_SIZE 128
146
147struct kwqe_16_data {
148 u8 data[CNIC_KWQ16_DATA_SIZE];
149};
150
151struct cnic_iscsi {
152 struct cnic_dma task_array_info;
153 struct cnic_dma r2tq_info;
154 struct cnic_dma hq_info;
155};
156
157struct cnic_context {
158 u32 cid;
159 struct kwqe_16_data *kwqe_data;
160 dma_addr_t kwqe_data_mapping;
161 wait_queue_head_t waitq;
162 int wait_cond;
163 unsigned long timestamp;
164 u32 ctx_flags;
165#define CTX_FL_OFFLD_START 0x00000001
166 u8 ulp_proto_id;
167 union {
168 struct cnic_iscsi *iscsi;
169 } proto;
170};
171
172struct cnic_local {
173
174 spinlock_t cnic_ulp_lock;
175 void *ulp_handle[MAX_CNIC_ULP_TYPE];
176 unsigned long ulp_flags[MAX_CNIC_ULP_TYPE];
177#define ULP_F_INIT 0
178#define ULP_F_START 1
Michael Chan681dbd72009-08-14 15:49:46 +0000179#define ULP_F_CALL_PENDING 2
Michael Chana4636962009-06-08 18:14:43 -0700180 struct cnic_ulp_ops *ulp_ops[MAX_CNIC_ULP_TYPE];
181
182 /* protected by ulp_lock */
183 u32 cnic_local_flags;
184#define CNIC_LCL_FL_KWQ_INIT 0x00000001
185
186 struct cnic_dev *dev;
187
188 struct cnic_eth_dev *ethdev;
189
190 void *l2_ring;
191 dma_addr_t l2_ring_map;
192 int l2_ring_size;
193 int l2_rx_ring_size;
194
195 void *l2_buf;
196 dma_addr_t l2_buf_map;
197 int l2_buf_size;
198 int l2_single_buf_size;
199
200 u16 *rx_cons_ptr;
201 u16 *tx_cons_ptr;
202 u16 rx_cons;
203 u16 tx_cons;
204
205 u32 kwq_cid_addr;
206 u32 kcq_cid_addr;
207
208 struct cnic_dma kwq_info;
209 struct kwqe **kwq;
210
211 struct cnic_dma kwq_16_data_info;
212
213 u16 max_kwq_idx;
214
215 u16 kwq_prod_idx;
216 u32 kwq_io_addr;
217
218 u16 *kwq_con_idx_ptr;
219 u16 kwq_con_idx;
220
221 struct cnic_dma kcq_info;
222 struct kcqe **kcq;
223
224 u16 kcq_prod_idx;
225 u32 kcq_io_addr;
226
Michael Chana4dde3a2010-02-24 14:42:08 +0000227 union {
228 void *gen;
229 struct status_block_msix *bnx2;
230 struct host_status_block *bnx2x;
231 } status_blk;
232
Michael Chane2513062009-10-10 13:46:58 +0000233 struct host_def_status_block *bnx2x_def_status_blk;
Michael Chana4636962009-06-08 18:14:43 -0700234
235 u32 status_blk_num;
236 u32 int_num;
237 u32 last_status_idx;
238 struct tasklet_struct cnic_irq_task;
239
240 struct kcqe *completed_kcq[MAX_COMPLETED_KCQE];
241
242 struct cnic_sock *csk_tbl;
243 struct cnic_id_tbl csk_port_tbl;
244
245 struct cnic_dma conn_buf_info;
246 struct cnic_dma gbl_buf_info;
247
248 struct cnic_iscsi *iscsi_tbl;
249 struct cnic_context *ctx_tbl;
250 struct cnic_id_tbl cid_tbl;
251 int max_iscsi_conn;
252 atomic_t iscsi_conn;
253
254 /* per connection parameters */
255 int num_iscsi_tasks;
256 int num_ccells;
257 int task_array_size;
258 int r2tq_size;
259 int hq_size;
260 int num_cqs;
261
262 struct cnic_ctx *ctx_arr;
263 int ctx_blks;
264 int ctx_blk_size;
Michael Chane2513062009-10-10 13:46:58 +0000265 unsigned long ctx_align;
Michael Chana4636962009-06-08 18:14:43 -0700266 int cids_per_blk;
267
268 u32 chip_id;
269 int func;
270 u32 shmem_base;
271
272 u32 uio_dev;
273 struct uio_info *cnic_uinfo;
274
275 struct cnic_ops *cnic_ops;
276 int (*start_hw)(struct cnic_dev *);
277 void (*stop_hw)(struct cnic_dev *);
278 void (*setup_pgtbl)(struct cnic_dev *,
279 struct cnic_dma *);
280 int (*alloc_resc)(struct cnic_dev *);
281 void (*free_resc)(struct cnic_dev *);
282 int (*start_cm)(struct cnic_dev *);
283 void (*stop_cm)(struct cnic_dev *);
284 void (*enable_int)(struct cnic_dev *);
285 void (*disable_int_sync)(struct cnic_dev *);
286 void (*ack_int)(struct cnic_dev *);
287 void (*close_conn)(struct cnic_sock *, u32 opcode);
288 u16 (*next_idx)(u16);
289 u16 (*hw_idx)(u16);
290};
291
292struct bnx2x_bd_chain_next {
293 u32 addr_lo;
294 u32 addr_hi;
295 u8 reserved[8];
296};
297
Michael Chane2513062009-10-10 13:46:58 +0000298#define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T (1)
299
Michael Chana4636962009-06-08 18:14:43 -0700300#define ISCSI_RAMROD_CMD_ID_UPDATE_CONN (ISCSI_KCQE_OPCODE_UPDATE_CONN)
301#define ISCSI_RAMROD_CMD_ID_INIT (ISCSI_KCQE_OPCODE_INIT)
302
303#define CDU_REGION_NUMBER_XCM_AG 2
304#define CDU_REGION_NUMBER_UCM_AG 4
305
Michael Chane2513062009-10-10 13:46:58 +0000306#define CDU_VALID_DATA(_cid, _region, _type) \
307 (((_cid) << 8) | (((_region)&0xf)<<4) | (((_type)&0xf)))
308
309#define CDU_CRC8(_cid, _region, _type) \
310 (calc_crc8(CDU_VALID_DATA(_cid, _region, _type), 0xff))
311
312#define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type) \
313 (0x80 | ((CDU_CRC8(_cid, _region, _type)) & 0x7f))
314
315#define BNX2X_CONTEXT_MEM_SIZE 1024
316#define BNX2X_FCOE_CID 16
317
318/* iSCSI client IDs are 17, 19, 21, 23 */
319#define BNX2X_ISCSI_BASE_CL_ID 17
320#define BNX2X_ISCSI_CL_ID(vn) (BNX2X_ISCSI_BASE_CL_ID + ((vn) << 1))
321
322#define BNX2X_ISCSI_L2_CID 17
323#define BNX2X_ISCSI_START_CID 18
324#define BNX2X_ISCSI_NUM_CONNECTIONS 128
325#define BNX2X_ISCSI_TASK_CONTEXT_SIZE 128
326#define BNX2X_ISCSI_MAX_PENDING_R2TS 4
327#define BNX2X_ISCSI_R2TQE_SIZE 8
328#define BNX2X_ISCSI_HQ_BD_SIZE 64
329#define BNX2X_ISCSI_CONN_BUF_SIZE 64
330#define BNX2X_ISCSI_GLB_BUF_SIZE 64
331#define BNX2X_ISCSI_PBL_NOT_CACHED 0xff
332#define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff
333#define BNX2X_HW_CID(x, func) ((x) | (((func) % PORT_MAX) << 23) | \
334 (((func) >> 1) << 17))
335#define BNX2X_SW_CID(x) (x & 0x1ffff)
336#define BNX2X_CHIP_NUM_57711 0x164f
337#define BNX2X_CHIP_NUM_57711E 0x1650
338#define BNX2X_CHIP_NUM(x) (x >> 16)
339#define BNX2X_CHIP_IS_57711(x) \
340 (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711)
341#define BNX2X_CHIP_IS_57711E(x) \
342 (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E)
343#define BNX2X_CHIP_IS_E1H(x) \
344 (BNX2X_CHIP_IS_57711(x) || BNX2X_CHIP_IS_57711E(x))
345#define IS_E1H_OFFSET BNX2X_CHIP_IS_E1H(cp->chip_id)
346
347#define BNX2X_RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd))
348#define BNX2X_MAX_RX_DESC_CNT (BNX2X_RX_DESC_CNT - 2)
349#define BNX2X_RCQ_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe))
350#define BNX2X_MAX_RCQ_DESC_CNT (BNX2X_RCQ_DESC_CNT - 1)
351
352#define BNX2X_DEF_SB_ID 16
353
354#define BNX2X_ISCSI_RX_SB_INDEX_NUM \
355 ((HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS << \
356 USTORM_ETH_ST_CONTEXT_CONFIG_CQE_SB_INDEX_NUMBER_SHIFT) & \
357 USTORM_ETH_ST_CONTEXT_CONFIG_CQE_SB_INDEX_NUMBER)
358
359#define BNX2X_SHMEM_ADDR(base, field) (base + \
360 offsetof(struct shmem_region, field))
361
362#define CNIC_PORT(cp) ((cp)->func % PORT_MAX)
363#define CNIC_FUNC(cp) ((cp)->func)
364#define CNIC_E1HVN(cp) ((cp)->func >> 1)
365
Michael Chana4636962009-06-08 18:14:43 -0700366#endif
367