| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | if ARCH_CLPS711X |
| 2 | |
| 3 | menu "CLPS711X/EP721X Implementations" |
| 4 | |
| 5 | config ARCH_AUTCPU12 |
| 6 | bool "AUTCPU12" |
| 7 | help |
| 8 | Say Y if you intend to run the kernel on the autronix autcpu12 |
| 9 | board. This board is based on a Cirrus Logic CS89712. |
| 10 | |
| 11 | config ARCH_CDB89712 |
| 12 | bool "CDB89712" |
| 13 | help |
| 14 | This is an evaluation board from Cirrus for the CS89712 processor. |
| 15 | The board includes 2 serial ports, Ethernet, IRDA, and expansion |
| 16 | headers. It comes with 16 MB SDRAM and 8 MB flash ROM. |
| 17 | |
| 18 | config ARCH_CEIVA |
| 19 | bool "CEIVA" |
| 20 | help |
| 21 | Say Y here if you intend to run this kernel on the Ceiva/Polaroid |
| 22 | PhotoMax Digital Picture Frame. |
| 23 | |
| 24 | config ARCH_CLEP7312 |
| 25 | bool "CLEP7312" |
| 26 | |
| 27 | config ARCH_EDB7211 |
| 28 | bool "EDB7211" |
| 29 | help |
| 30 | Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211 |
| 31 | evaluation board. |
| 32 | |
| 33 | config ARCH_P720T |
| 34 | bool "P720T" |
| 35 | help |
| 36 | Say Y here if you intend to run this kernel on the ARM Prospector |
| 37 | 720T. |
| 38 | |
| 39 | config ARCH_FORTUNET |
| 40 | bool "FORTUNET" |
| 41 | |
| 42 | # XXX Maybe these should indicate register compatibility |
| 43 | # instead of being mutually exclusive. |
| 44 | config ARCH_EP7211 |
| 45 | bool |
| 46 | depends on ARCH_EDB7211 |
| 47 | default y |
| 48 | |
| 49 | config ARCH_EP7212 |
| 50 | bool |
| 51 | depends on ARCH_P720T || ARCH_CEIVA |
| 52 | default y |
| 53 | |
| 54 | config EP72XX_ROM_BOOT |
| 55 | bool "EP72xx ROM boot" |
| 56 | depends on ARCH_EP7211 || ARCH_EP7212 |
| 57 | ---help--- |
| 58 | If you say Y here, your CLPS711x-based kernel will use the bootstrap |
| 59 | mode memory map instead of the normal memory map. |
| 60 | |
| 61 | Processors derived from the Cirrus CLPS-711X core support two boot |
| 62 | modes. Normal mode boots from the external memory device at CS0. |
| 63 | Bootstrap mode rearranges parts of the memory map, placing an |
| 64 | internal 128 byte bootstrap ROM at CS0. This option performs the |
| 65 | address map changes required to support booting in this mode. |
| 66 | |
| 67 | You almost surely want to say N here. |
| 68 | |
| 69 | endmenu |
| 70 | |
| 71 | endif |