blob: 82a4bf34c251c338cc735679a559eef2ecf4e46e [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * PXA250/210 Power Management Routines
3 *
4 * Original code for the SA11x0:
5 * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
6 *
7 * Modified for the PXA250 by Nicolas Pitre:
8 * Copyright (c) 2002 Monta Vista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License.
12 */
13#include <linux/config.h>
14#include <linux/init.h>
15#include <linux/suspend.h>
16#include <linux/errno.h>
17#include <linux/time.h>
18
19#include <asm/hardware.h>
20#include <asm/memory.h>
21#include <asm/system.h>
22#include <asm/arch/pxa-regs.h>
23#include <asm/arch/lubbock.h>
24#include <asm/mach/time.h>
25
26
27/*
28 * Debug macros
29 */
30#undef DEBUG
31
32extern void pxa_cpu_suspend(void);
33extern void pxa_cpu_resume(void);
34
35#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
36#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
37
38#define RESTORE_GPLEVEL(n) do { \
39 GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
40 GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
41} while (0)
42
43/*
44 * List of global PXA peripheral registers to preserve.
45 * More ones like CP and general purpose register values are preserved
46 * with the stack pointer in sleep.S.
47 */
48enum { SLEEP_SAVE_START = 0,
49
50 SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
51 SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
52 SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
53 SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
54 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
55
56 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
57 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
58 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
59 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
60
61 SLEEP_SAVE_PSTR,
62
63 SLEEP_SAVE_ICMR,
64 SLEEP_SAVE_CKEN,
65
66 SLEEP_SAVE_CKSUM,
67
68 SLEEP_SAVE_SIZE
69};
70
71
72static int pxa_pm_enter(suspend_state_t state)
73{
74 unsigned long sleep_save[SLEEP_SAVE_SIZE];
75 unsigned long checksum = 0;
76 struct timespec delta, rtc;
77 int i;
78
79 if (state != PM_SUSPEND_MEM)
80 return -EINVAL;
81
82#ifdef CONFIG_IWMMXT
83 /* force any iWMMXt context to ram **/
84 iwmmxt_task_disable(NULL);
85#endif
86
87 /* preserve current time */
88 rtc.tv_sec = RCNR;
89 rtc.tv_nsec = 0;
90 save_time_delta(&delta, &rtc);
91
92 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
93 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
94 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
95 SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
96 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
97
98 SAVE(GAFR0_L); SAVE(GAFR0_U);
99 SAVE(GAFR1_L); SAVE(GAFR1_U);
100 SAVE(GAFR2_L); SAVE(GAFR2_U);
101
102#ifdef CONFIG_PXA27x
103 SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
104 SAVE(GAFR3_L); SAVE(GAFR3_U);
105#endif
106
107 SAVE(ICMR);
108 ICMR = 0;
109
110 SAVE(CKEN);
111 CKEN = 0;
112
113 SAVE(PSTR);
114
115 /* Note: wake up source are set up in each machine specific files */
116
117 /* clear GPIO transition detect bits */
118 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
119#ifdef CONFIG_PXA27x
120 GEDR3 = GEDR3;
121#endif
122
123 /* Clear sleep reset status */
124 RCSR = RCSR_SMR;
125
126 /* set resume return address */
127 PSPR = virt_to_phys(pxa_cpu_resume);
128
129 /* before sleeping, calculate and save a checksum */
130 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
131 checksum += sleep_save[i];
132 sleep_save[SLEEP_SAVE_CKSUM] = checksum;
133
134 /* *** go zzz *** */
135 pxa_cpu_suspend();
136
137 /* after sleeping, validate the checksum */
138 checksum = 0;
139 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
140 checksum += sleep_save[i];
141
142 /* if invalid, display message and wait for a hardware reset */
143 if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
144#ifdef CONFIG_ARCH_LUBBOCK
145 LUB_HEXLED = 0xbadbadc5;
146#endif
147 while (1)
148 pxa_cpu_suspend();
149 }
150
151 /* ensure not to come back here if it wasn't intended */
152 PSPR = 0;
153
154 /* restore registers */
155 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
156 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
157 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
158 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
159 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
160 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
161 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
162 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
163
164#ifdef CONFIG_PXA27x
165 RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3);
166 RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
167#endif
168
169 PSSR = PSSR_RDH | PSSR_PH;
170
171 RESTORE(CKEN);
172
173 ICLR = 0;
174 ICCR = 1;
175 RESTORE(ICMR);
176
177 RESTORE(PSTR);
178
179 /* restore current time */
180 rtc.tv_sec = RCNR;
181 restore_time_delta(&delta, &rtc);
182
183#ifdef DEBUG
184 printk(KERN_DEBUG "*** made it back from resume\n");
185#endif
186
187 return 0;
188}
189
190unsigned long sleep_phys_sp(void *sp)
191{
192 return virt_to_phys(sp);
193}
194
195/*
196 * Called after processes are frozen, but before we shut down devices.
197 */
198static int pxa_pm_prepare(suspend_state_t state)
199{
200 return 0;
201}
202
203/*
204 * Called after devices are re-setup, but before processes are thawed.
205 */
206static int pxa_pm_finish(suspend_state_t state)
207{
208 return 0;
209}
210
211/*
212 * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
213 */
214static struct pm_ops pxa_pm_ops = {
215 .pm_disk_mode = PM_DISK_FIRMWARE,
216 .prepare = pxa_pm_prepare,
217 .enter = pxa_pm_enter,
218 .finish = pxa_pm_finish,
219};
220
221static int __init pxa_pm_init(void)
222{
223 pm_set_ops(&pxa_pm_ops);
224 return 0;
225}
226
227late_initcall(pxa_pm_init);