blob: bf7fb58ef02c49925236a9a7f6c445e89cb5687d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/m32r/mm/fault.c
3 *
4 * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
5 * Copyright (c) 2004 Naoto Sugai, NIIBE Yutaka
6 *
7 * Some code taken from i386 version.
8 * Copyright (C) 1995 Linus Torvalds
9 */
10
11#include <linux/config.h>
12#include <linux/signal.h>
13#include <linux/sched.h>
14#include <linux/kernel.h>
15#include <linux/errno.h>
16#include <linux/string.h>
17#include <linux/types.h>
18#include <linux/ptrace.h>
19#include <linux/mman.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
22#include <linux/smp_lock.h>
23#include <linux/interrupt.h>
24#include <linux/init.h>
25#include <linux/tty.h>
26#include <linux/vt_kern.h> /* For unblank_screen() */
27#include <linux/highmem.h>
28#include <linux/module.h>
29
30#include <asm/m32r.h>
31#include <asm/system.h>
32#include <asm/uaccess.h>
33#include <asm/hardirq.h>
34#include <asm/mmu_context.h>
35#include <asm/tlbflush.h>
36
37extern void die(const char *, struct pt_regs *, long);
38
39#ifndef CONFIG_SMP
40asmlinkage unsigned int tlb_entry_i_dat;
41asmlinkage unsigned int tlb_entry_d_dat;
42#define tlb_entry_i tlb_entry_i_dat
43#define tlb_entry_d tlb_entry_d_dat
44#else
45unsigned int tlb_entry_i_dat[NR_CPUS];
46unsigned int tlb_entry_d_dat[NR_CPUS];
47#define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
48#define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
49#endif
50
51extern void init_tlb(void);
52
53/*
54 * Unlock any spinlocks which will prevent us from getting the
55 * message out
56 */
57void bust_spinlocks(int yes)
58{
59 int loglevel_save = console_loglevel;
60
61 if (yes) {
62 oops_in_progress = 1;
63 return;
64 }
65#ifdef CONFIG_VT
66 unblank_screen();
67#endif
68 oops_in_progress = 0;
69 /*
70 * OK, the message is on the console. Now we call printk()
71 * without oops_in_progress set so that printk will give klogd
72 * a poke. Hold onto your hats...
73 */
74 console_loglevel = 15; /* NMI oopser may have shut the console up */
75 printk(" ");
76 console_loglevel = loglevel_save;
77}
78
79/*======================================================================*
80 * do_page_fault()
81 *======================================================================*
82 * This routine handles page faults. It determines the address,
83 * and the problem, and then passes it off to one of the appropriate
84 * routines.
85 *
86 * ARGUMENT:
87 * regs : M32R SP reg.
88 * error_code : See below
89 * address : M32R MMU MDEVA reg. (Operand ACE)
90 * : M32R BPC reg. (Instruction ACE)
91 *
92 * error_code :
93 * bit 0 == 0 means no page found, 1 means protection fault
94 * bit 1 == 0 means read, 1 means write
95 * bit 2 == 0 means kernel, 1 means user-mode
96 * bit 3 == 0 means data, 1 means instruction
97 *======================================================================*/
98#define ACE_PROTECTION 1
99#define ACE_WRITE 2
100#define ACE_USERMODE 4
101#define ACE_INSTRUCTION 8
102
103asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code,
104 unsigned long address)
105{
106 struct task_struct *tsk;
107 struct mm_struct *mm;
108 struct vm_area_struct * vma;
109 unsigned long page, addr;
110 int write;
111 siginfo_t info;
112
113 /*
114 * If BPSW IE bit enable --> set PSW IE bit
115 */
116 if (regs->psw & M32R_PSW_BIE)
117 local_irq_enable();
118
119 tsk = current;
120
121 info.si_code = SEGV_MAPERR;
122
123 /*
124 * We fault-in kernel-space virtual memory on-demand. The
125 * 'reference' page table is init_mm.pgd.
126 *
127 * NOTE! We MUST NOT take any locks for this case. We may
128 * be in an interrupt or a critical region, and should
129 * only copy the information from the master page table,
130 * nothing more.
131 *
132 * This verifies that the fault happens in kernel space
133 * (error_code & ACE_USERMODE) == 0, and that the fault was not a
134 * protection error (error_code & ACE_PROTECTION) == 0.
135 */
136 if (address >= TASK_SIZE && !(error_code & ACE_USERMODE))
137 goto vmalloc_fault;
138
139 mm = tsk->mm;
140
141 /*
142 * If we're in an interrupt or have no user context or are running in an
143 * atomic region then we must not take the fault..
144 */
145 if (in_atomic() || !mm)
146 goto bad_area_nosemaphore;
147
148 /* When running in the kernel we expect faults to occur only to
149 * addresses in user space. All other faults represent errors in the
150 * kernel and should generate an OOPS. Unfortunatly, in the case of an
151 * erroneous fault occuring in a code path which already holds mmap_sem
152 * we will deadlock attempting to validate the fault against the
153 * address space. Luckily the kernel only validly references user
154 * space from well defined areas of code, which are listed in the
155 * exceptions table.
156 *
157 * As the vast majority of faults will be valid we will only perform
158 * the source reference check when there is a possibilty of a deadlock.
159 * Attempt to lock the address space, if we cannot we then validate the
160 * source. If this is invalid we can skip the address space check,
161 * thus avoiding the deadlock.
162 */
163 if (!down_read_trylock(&mm->mmap_sem)) {
164 if ((error_code & ACE_USERMODE) == 0 &&
165 !search_exception_tables(regs->psw))
166 goto bad_area_nosemaphore;
167 down_read(&mm->mmap_sem);
168 }
169
170 vma = find_vma(mm, address);
171 if (!vma)
172 goto bad_area;
173 if (vma->vm_start <= address)
174 goto good_area;
175 if (!(vma->vm_flags & VM_GROWSDOWN))
176 goto bad_area;
177#if 0
178 if (error_code & ACE_USERMODE) {
179 /*
180 * accessing the stack below "spu" is always a bug.
181 * The "+ 4" is there due to the push instruction
182 * doing pre-decrement on the stack and that
183 * doesn't show up until later..
184 */
185 if (address + 4 < regs->spu)
186 goto bad_area;
187 }
188#endif
189 if (expand_stack(vma, address))
190 goto bad_area;
191/*
192 * Ok, we have a good vm_area for this memory access, so
193 * we can handle it..
194 */
195good_area:
196 info.si_code = SEGV_ACCERR;
197 write = 0;
198 switch (error_code & (ACE_WRITE|ACE_PROTECTION)) {
199 default: /* 3: write, present */
200 /* fall through */
201 case ACE_WRITE: /* write, not present */
202 if (!(vma->vm_flags & VM_WRITE))
203 goto bad_area;
204 write++;
205 break;
206 case ACE_PROTECTION: /* read, present */
207 case 0: /* read, not present */
208 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
209 goto bad_area;
210 }
211
212 /*
213 * For instruction access exception, check if the area is executable
214 */
215 if ((error_code & ACE_INSTRUCTION) && !(vma->vm_flags & VM_EXEC))
216 goto bad_area;
217
218survive:
219 /*
220 * If for any reason at all we couldn't handle the fault,
221 * make sure we exit gracefully rather than endlessly redo
222 * the fault.
223 */
224 addr = (address & PAGE_MASK);
225 set_thread_fault_code(error_code);
226 switch (handle_mm_fault(mm, vma, addr, write)) {
227 case VM_FAULT_MINOR:
228 tsk->min_flt++;
229 break;
230 case VM_FAULT_MAJOR:
231 tsk->maj_flt++;
232 break;
233 case VM_FAULT_SIGBUS:
234 goto do_sigbus;
235 case VM_FAULT_OOM:
236 goto out_of_memory;
237 default:
238 BUG();
239 }
240 set_thread_fault_code(0);
241 up_read(&mm->mmap_sem);
242 return;
243
244/*
245 * Something tried to access memory that isn't in our memory map..
246 * Fix it, but check if it's kernel or user first..
247 */
248bad_area:
249 up_read(&mm->mmap_sem);
250
251bad_area_nosemaphore:
252 /* User mode accesses just cause a SIGSEGV */
253 if (error_code & ACE_USERMODE) {
254 tsk->thread.address = address;
255 tsk->thread.error_code = error_code | (address >= TASK_SIZE);
256 tsk->thread.trap_no = 14;
257 info.si_signo = SIGSEGV;
258 info.si_errno = 0;
259 /* info.si_code has been set above */
260 info.si_addr = (void __user *)address;
261 force_sig_info(SIGSEGV, &info, tsk);
262 return;
263 }
264
265no_context:
266 /* Are we prepared to handle this kernel fault? */
267 if (fixup_exception(regs))
268 return;
269
270/*
271 * Oops. The kernel tried to access some bad page. We'll have to
272 * terminate things with extreme prejudice.
273 */
274
275 bust_spinlocks(1);
276
277 if (address < PAGE_SIZE)
278 printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
279 else
280 printk(KERN_ALERT "Unable to handle kernel paging request");
281 printk(" at virtual address %08lx\n",address);
282 printk(KERN_ALERT " printing bpc:\n");
283 printk("%08lx\n", regs->bpc);
284 page = *(unsigned long *)MPTB;
285 page = ((unsigned long *) page)[address >> PGDIR_SHIFT];
286 printk(KERN_ALERT "*pde = %08lx\n", page);
287 if (page & _PAGE_PRESENT) {
288 page &= PAGE_MASK;
289 address &= 0x003ff000;
290 page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT];
291 printk(KERN_ALERT "*pte = %08lx\n", page);
292 }
293 die("Oops", regs, error_code);
294 bust_spinlocks(0);
295 do_exit(SIGKILL);
296
297/*
298 * We ran out of memory, or some other thing happened to us that made
299 * us unable to handle the page fault gracefully.
300 */
301out_of_memory:
302 up_read(&mm->mmap_sem);
303 if (tsk->pid == 1) {
304 yield();
305 down_read(&mm->mmap_sem);
306 goto survive;
307 }
308 printk("VM: killing process %s\n", tsk->comm);
309 if (error_code & ACE_USERMODE)
310 do_exit(SIGKILL);
311 goto no_context;
312
313do_sigbus:
314 up_read(&mm->mmap_sem);
315
316 /* Kernel mode? Handle exception or die */
317 if (!(error_code & ACE_USERMODE))
318 goto no_context;
319
320 tsk->thread.address = address;
321 tsk->thread.error_code = error_code;
322 tsk->thread.trap_no = 14;
323 info.si_signo = SIGBUS;
324 info.si_errno = 0;
325 info.si_code = BUS_ADRERR;
326 info.si_addr = (void __user *)address;
327 force_sig_info(SIGBUS, &info, tsk);
328 return;
329
330vmalloc_fault:
331 {
332 /*
333 * Synchronize this task's top level page-table
334 * with the 'reference' page table.
335 *
336 * Do _not_ use "tsk" here. We might be inside
337 * an interrupt in the middle of a task switch..
338 */
339 int offset = pgd_index(address);
340 pgd_t *pgd, *pgd_k;
341 pmd_t *pmd, *pmd_k;
342 pte_t *pte_k;
343
344 pgd = (pgd_t *)*(unsigned long *)MPTB;
345 pgd = offset + (pgd_t *)pgd;
346 pgd_k = init_mm.pgd + offset;
347
348 if (!pgd_present(*pgd_k))
349 goto no_context;
350
351 /*
352 * set_pgd(pgd, *pgd_k); here would be useless on PAE
353 * and redundant with the set_pmd() on non-PAE.
354 */
355
356 pmd = pmd_offset(pgd, address);
357 pmd_k = pmd_offset(pgd_k, address);
358 if (!pmd_present(*pmd_k))
359 goto no_context;
360 set_pmd(pmd, *pmd_k);
361
362 pte_k = pte_offset_kernel(pmd_k, address);
363 if (!pte_present(*pte_k))
364 goto no_context;
365
366 addr = (address & PAGE_MASK) | (error_code & ACE_INSTRUCTION);
367 update_mmu_cache(NULL, addr, *pte_k);
368 return;
369 }
370}
371
372/*======================================================================*
373 * update_mmu_cache()
374 *======================================================================*/
375#define TLB_MASK (NR_TLB_ENTRIES - 1)
376#define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8))
377#define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8))
378void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr,
379 pte_t pte)
380{
381 unsigned long *entry1, *entry2;
382 unsigned long pte_data, flags;
383 unsigned int *entry_dat;
384 int inst = get_thread_fault_code() & ACE_INSTRUCTION;
385 int i;
386
387 /* Ptrace may call this routine. */
388 if (vma && current->active_mm != vma->vm_mm)
389 return;
390
391 local_irq_save(flags);
392
393 vaddr = (vaddr & PAGE_MASK) | get_asid();
394
395#ifdef CONFIG_CHIP_OPSP
396 entry1 = (unsigned long *)ITLB_BASE;
397 for(i = 0 ; i < NR_TLB_ENTRIES; i++) {
398 if(*entry1++ == vaddr) {
399 pte_data = pte_val(pte);
400 set_tlb_data(entry1, pte_data);
401 break;
402 }
403 entry1++;
404 }
405 entry2 = (unsigned long *)DTLB_BASE;
406 for(i = 0 ; i < NR_TLB_ENTRIES ; i++) {
407 if(*entry2++ == vaddr) {
408 pte_data = pte_val(pte);
409 set_tlb_data(entry2, pte_data);
410 break;
411 }
412 entry2++;
413 }
414 local_irq_restore(flags);
415 return;
416#else
417 pte_data = pte_val(pte);
418
419 /*
420 * Update TLB entries
421 * entry1: ITLB entry address
422 * entry2: DTLB entry address
423 */
424 __asm__ __volatile__ (
425 "seth %0, #high(%4) \n\t"
426 "st %2, @(%5, %0) \n\t"
427 "ldi %1, #1 \n\t"
428 "st %1, @(%6, %0) \n\t"
429 "add3 r4, %0, %7 \n\t"
430 ".fillinsn \n"
431 "1: \n\t"
432 "ld %1, @(%6, %0) \n\t"
433 "bnez %1, 1b \n\t"
434 "ld %0, @r4+ \n\t"
435 "ld %1, @r4 \n\t"
436 "st %3, @+%0 \n\t"
437 "st %3, @+%1 \n\t"
438 : "=&r" (entry1), "=&r" (entry2)
439 : "r" (vaddr), "r" (pte_data), "i" (MMU_REG_BASE),
440 "i" (MSVA_offset), "i" (MTOP_offset), "i" (MIDXI_offset)
441 : "r4", "memory"
442 );
443
444 if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END))
445 goto notfound;
446
447found:
448 local_irq_restore(flags);
449
450 return;
451
452 /* Valid entry not found */
453notfound:
454 /*
455 * Update ITLB or DTLB entry
456 * entry1: TLB entry address
457 * entry2: TLB base address
458 */
459 if (!inst) {
460 entry2 = (unsigned long *)DTLB_BASE;
461 entry_dat = &tlb_entry_d;
462 } else {
463 entry2 = (unsigned long *)ITLB_BASE;
464 entry_dat = &tlb_entry_i;
465 }
466 entry1 = entry2 + (((*entry_dat - 1) & TLB_MASK) << 1);
467
468 for (i = 0 ; i < NR_TLB_ENTRIES ; i++) {
469 if (!(entry1[1] & 2)) /* Valid bit check */
470 break;
471
472 if (entry1 != entry2)
473 entry1 -= 2;
474 else
475 entry1 += TLB_MASK << 1;
476 }
477
478 if (i >= NR_TLB_ENTRIES) { /* Empty entry not found */
479 entry1 = entry2 + (*entry_dat << 1);
480 *entry_dat = (*entry_dat + 1) & TLB_MASK;
481 }
482 *entry1++ = vaddr; /* Set TLB tag */
483 set_tlb_data(entry1, pte_data);
484
485 goto found;
486#endif
487}
488
489/*======================================================================*
490 * flush_tlb_page() : flushes one page
491 *======================================================================*/
492void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
493{
494 if (vma->vm_mm && mm_context(vma->vm_mm) != NO_CONTEXT) {
495 unsigned long flags;
496
497 local_irq_save(flags);
498 page &= PAGE_MASK;
499 page |= (mm_context(vma->vm_mm) & MMU_CONTEXT_ASID_MASK);
500 __flush_tlb_page(page);
501 local_irq_restore(flags);
502 }
503}
504
505/*======================================================================*
506 * flush_tlb_range() : flushes a range of pages
507 *======================================================================*/
508void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
509 unsigned long end)
510{
511 struct mm_struct *mm;
512
513 mm = vma->vm_mm;
514 if (mm_context(mm) != NO_CONTEXT) {
515 unsigned long flags;
516 int size;
517
518 local_irq_save(flags);
519 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
520 if (size > (NR_TLB_ENTRIES / 4)) { /* Too many TLB to flush */
521 mm_context(mm) = NO_CONTEXT;
522 if (mm == current->mm)
523 activate_context(mm);
524 } else {
525 unsigned long asid;
526
527 asid = mm_context(mm) & MMU_CONTEXT_ASID_MASK;
528 start &= PAGE_MASK;
529 end += (PAGE_SIZE - 1);
530 end &= PAGE_MASK;
531
532 start |= asid;
533 end |= asid;
534 while (start < end) {
535 __flush_tlb_page(start);
536 start += PAGE_SIZE;
537 }
538 }
539 local_irq_restore(flags);
540 }
541}
542
543/*======================================================================*
544 * flush_tlb_mm() : flushes the specified mm context TLB's
545 *======================================================================*/
546void local_flush_tlb_mm(struct mm_struct *mm)
547{
548 /* Invalidate all TLB of this process. */
549 /* Instead of invalidating each TLB, we get new MMU context. */
550 if (mm_context(mm) != NO_CONTEXT) {
551 unsigned long flags;
552
553 local_irq_save(flags);
554 mm_context(mm) = NO_CONTEXT;
555 if (mm == current->mm)
556 activate_context(mm);
557 local_irq_restore(flags);
558 }
559}
560
561/*======================================================================*
562 * flush_tlb_all() : flushes all processes TLBs
563 *======================================================================*/
564void local_flush_tlb_all(void)
565{
566 unsigned long flags;
567
568 local_irq_save(flags);
569 __flush_tlb_all();
570 local_irq_restore(flags);
571}
572
573/*======================================================================*
574 * init_mmu()
575 *======================================================================*/
576void __init init_mmu(void)
577{
578 tlb_entry_i = 0;
579 tlb_entry_d = 0;
580 mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
581 set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
582 *(volatile unsigned long *)MPTB = (unsigned long)swapper_pg_dir;
583}