Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * arch/ppc/platforms/4xx/ibmnp405h.c |
| 3 | * |
| 4 | * Author: Armin Kuster <akuster@mvista.com> |
| 5 | * |
| 6 | * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under |
| 7 | * the terms of the GNU General Public License version 2. This program |
| 8 | * is licensed "as is" without any warranty of any kind, whether express |
| 9 | * or implied. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/config.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <asm/ocp.h> |
| 15 | #include <platforms/4xx/ibmnp405h.h> |
| 16 | |
| 17 | static struct ocp_func_emac_data ibmnp405h_emac0_def = { |
| 18 | .rgmii_idx = -1, /* No RGMII */ |
| 19 | .rgmii_mux = -1, /* No RGMII */ |
| 20 | .zmii_idx = 0, /* ZMII device index */ |
| 21 | .zmii_mux = 0, /* ZMII input of this EMAC */ |
| 22 | .mal_idx = 0, /* MAL device index */ |
| 23 | .mal_rx_chan = 0, /* MAL rx channel number */ |
| 24 | .mal_tx_chan = 0, /* MAL tx channel number */ |
| 25 | .wol_irq = 41, /* WOL interrupt number */ |
| 26 | .mdio_idx = -1, /* No shared MDIO */ |
| 27 | .tah_idx = -1, /* No TAH */ |
| 28 | }; |
| 29 | |
| 30 | static struct ocp_func_emac_data ibmnp405h_emac1_def = { |
| 31 | .rgmii_idx = -1, /* No RGMII */ |
| 32 | .rgmii_mux = -1, /* No RGMII */ |
| 33 | .zmii_idx = 0, /* ZMII device index */ |
| 34 | .zmii_mux = 1, /* ZMII input of this EMAC */ |
| 35 | .mal_idx = 0, /* MAL device index */ |
| 36 | .mal_rx_chan = 1, /* MAL rx channel number */ |
| 37 | .mal_tx_chan = 1, /* MAL tx channel number */ |
| 38 | .wol_irq = 41, /* WOL interrupt number */ |
| 39 | .mdio_idx = -1, /* No shared MDIO */ |
| 40 | .tah_idx = -1, /* No TAH */ |
| 41 | }; |
| 42 | static struct ocp_func_emac_data ibmnp405h_emac2_def = { |
| 43 | .rgmii_idx = -1, /* No RGMII */ |
| 44 | .rgmii_mux = -1, /* No RGMII */ |
| 45 | .zmii_idx = 0, /* ZMII device index */ |
| 46 | .zmii_mux = 2, /* ZMII input of this EMAC */ |
| 47 | .mal_idx = 0, /* MAL device index */ |
| 48 | .mal_rx_chan = 2, /* MAL rx channel number */ |
| 49 | .mal_tx_chan = 2, /* MAL tx channel number */ |
| 50 | .wol_irq = 41, /* WOL interrupt number */ |
| 51 | .mdio_idx = -1, /* No shared MDIO */ |
| 52 | .tah_idx = -1, /* No TAH */ |
| 53 | }; |
| 54 | static struct ocp_func_emac_data ibmnp405h_emac3_def = { |
| 55 | .rgmii_idx = -1, /* No RGMII */ |
| 56 | .rgmii_mux = -1, /* No RGMII */ |
| 57 | .zmii_idx = 0, /* ZMII device index */ |
| 58 | .zmii_mux = 3, /* ZMII input of this EMAC */ |
| 59 | .mal_idx = 0, /* MAL device index */ |
| 60 | .mal_rx_chan = 3, /* MAL rx channel number */ |
| 61 | .mal_tx_chan = 3, /* MAL tx channel number */ |
| 62 | .wol_irq = 41, /* WOL interrupt number */ |
| 63 | .mdio_idx = -1, /* No shared MDIO */ |
| 64 | .tah_idx = -1, /* No TAH */ |
| 65 | }; |
| 66 | OCP_SYSFS_EMAC_DATA() |
| 67 | |
| 68 | static struct ocp_func_mal_data ibmnp405h_mal0_def = { |
| 69 | .num_tx_chans = 8, /* Number of TX channels */ |
| 70 | .num_rx_chans = 4, /* Number of RX channels */ |
| 71 | .txeob_irq = 17, /* TX End Of Buffer IRQ */ |
| 72 | .rxeob_irq = 18, /* RX End Of Buffer IRQ */ |
| 73 | .txde_irq = 46, /* TX Descriptor Error IRQ */ |
| 74 | .rxde_irq = 47, /* RX Descriptor Error IRQ */ |
| 75 | .serr_irq = 45, /* MAL System Error IRQ */ |
| 76 | }; |
| 77 | OCP_SYSFS_MAL_DATA() |
| 78 | |
| 79 | static struct ocp_func_iic_data ibmnp405h_iic0_def = { |
| 80 | .fast_mode = 0, /* Use standad mode (100Khz) */ |
| 81 | }; |
| 82 | OCP_SYSFS_IIC_DATA() |
| 83 | |
| 84 | struct ocp_def core_ocp[] = { |
| 85 | { .vendor = OCP_VENDOR_IBM, |
| 86 | .function = OCP_FUNC_OPB, |
| 87 | .index = 0, |
| 88 | .paddr = 0xEF600000, |
| 89 | .irq = OCP_IRQ_NA, |
| 90 | .pm = OCP_CPM_NA, |
| 91 | }, |
| 92 | { .vendor = OCP_VENDOR_IBM, |
| 93 | .function = OCP_FUNC_16550, |
| 94 | .index = 0, |
| 95 | .paddr = UART0_IO_BASE, |
| 96 | .irq = UART0_INT, |
| 97 | .pm = IBM_CPM_UART0 |
| 98 | }, |
| 99 | { .vendor = OCP_VENDOR_IBM, |
| 100 | .function = OCP_FUNC_16550, |
| 101 | .index = 1, |
| 102 | .paddr = UART1_IO_BASE, |
| 103 | .irq = UART1_INT, |
| 104 | .pm = IBM_CPM_UART1 |
| 105 | }, |
| 106 | { .vendor = OCP_VENDOR_IBM, |
| 107 | .function = OCP_FUNC_IIC, |
| 108 | .paddr = 0xEF600500, |
| 109 | .irq = 2, |
| 110 | .pm = IBM_CPM_IIC0, |
| 111 | .additions = &ibmnp405h_iic0_def, |
| 112 | .show = &ocp_show_iic_data |
| 113 | }, |
| 114 | { .vendor = OCP_VENDOR_IBM, |
| 115 | .function = OCP_FUNC_GPIO, |
| 116 | .paddr = 0xEF600700, |
| 117 | .irq = OCP_IRQ_NA, |
| 118 | .pm = IBM_CPM_GPIO0 |
| 119 | }, |
| 120 | { .vendor = OCP_VENDOR_IBM, |
| 121 | .function = OCP_FUNC_MAL, |
| 122 | .paddr = OCP_PADDR_NA, |
| 123 | .irq = OCP_IRQ_NA, |
| 124 | .pm = OCP_CPM_NA, |
| 125 | .additions = &ibmnp405h_mal0_def, |
| 126 | .show = &ocp_show_mal_data, |
| 127 | }, |
| 128 | { .vendor = OCP_VENDOR_IBM, |
| 129 | .function = OCP_FUNC_EMAC, |
| 130 | .index = 0, |
| 131 | .paddr = EMAC0_BASE, |
| 132 | .irq = 37, |
| 133 | .pm = IBM_CPM_EMAC0, |
| 134 | .additions = &ibmnp405h_emac0_def, |
| 135 | .show = &ocp_show_emac_data, |
| 136 | }, |
| 137 | { .vendor = OCP_VENDOR_IBM, |
| 138 | .function = OCP_FUNC_EMAC, |
| 139 | .index = 1, |
| 140 | .paddr = 0xEF600900, |
| 141 | .irq = 38, |
| 142 | .pm = IBM_CPM_EMAC1, |
| 143 | .additions = &ibmnp405h_emac1_def, |
| 144 | .show = &ocp_show_emac_data, |
| 145 | }, |
| 146 | { .vendor = OCP_VENDOR_IBM, |
| 147 | .function = OCP_FUNC_EMAC, |
| 148 | .index = 2, |
| 149 | .paddr = 0xEF600a00, |
| 150 | .irq = 39, |
| 151 | .pm = IBM_CPM_EMAC2, |
| 152 | .additions = &ibmnp405h_emac2_def, |
| 153 | .show = &ocp_show_emac_data, |
| 154 | }, |
| 155 | { .vendor = OCP_VENDOR_IBM, |
| 156 | .function = OCP_FUNC_EMAC, |
| 157 | .index = 3, |
| 158 | .paddr = 0xEF600b00, |
| 159 | .irq = 40, |
| 160 | .pm = IBM_CPM_EMAC3, |
| 161 | .additions = &ibmnp405h_emac3_def, |
| 162 | .show = &ocp_show_emac_data, |
| 163 | }, |
| 164 | { .vendor = OCP_VENDOR_IBM, |
| 165 | .function = OCP_FUNC_ZMII, |
| 166 | .paddr = 0xEF600C10, |
| 167 | .irq = OCP_IRQ_NA, |
| 168 | .pm = OCP_CPM_NA, |
| 169 | }, |
| 170 | { .vendor = OCP_VENDOR_INVALID |
| 171 | } |
| 172 | }; |