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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* arch/sparc64/kernel/kprobes.c
2 *
3 * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
4 */
5
6#include <linux/config.h>
7#include <linux/kernel.h>
8#include <linux/kprobes.h>
9
10#include <asm/kdebug.h>
11#include <asm/signal.h>
12
13/* We do not have hardware single-stepping on sparc64.
14 * So we implement software single-stepping with breakpoint
15 * traps. The top-level scheme is similar to that used
16 * in the x86 kprobes implementation.
17 *
18 * In the kprobe->ainsn.insn[] array we store the original
19 * instruction at index zero and a break instruction at
20 * index one.
21 *
22 * When we hit a kprobe we:
23 * - Run the pre-handler
24 * - Remember "regs->tnpc" and interrupt level stored in
25 * "regs->tstate" so we can restore them later
26 * - Disable PIL interrupts
27 * - Set regs->tpc to point to kprobe->ainsn.insn[0]
28 * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
29 * - Mark that we are actively in a kprobe
30 *
31 * At this point we wait for the second breakpoint at
32 * kprobe->ainsn.insn[1] to hit. When it does we:
33 * - Run the post-handler
34 * - Set regs->tpc to "remembered" regs->tnpc stored above,
35 * restore the PIL interrupt level in "regs->tstate" as well
36 * - Make any adjustments necessary to regs->tnpc in order
37 * to handle relative branches correctly. See below.
38 * - Mark that we are no longer actively in a kprobe.
39 */
40
41int arch_prepare_kprobe(struct kprobe *p)
42{
43 return 0;
44}
45
46void arch_copy_kprobe(struct kprobe *p)
47{
48 p->ainsn.insn[0] = *p->addr;
49 p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
50}
51
52void arch_remove_kprobe(struct kprobe *p)
53{
54}
55
56/* kprobe_status settings */
57#define KPROBE_HIT_ACTIVE 0x00000001
58#define KPROBE_HIT_SS 0x00000002
59
60static struct kprobe *current_kprobe;
61static unsigned long current_kprobe_orig_tnpc;
62static unsigned long current_kprobe_orig_tstate_pil;
63static unsigned int kprobe_status;
64
65static inline void prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
66{
67 current_kprobe_orig_tnpc = regs->tnpc;
68 current_kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
69 regs->tstate |= TSTATE_PIL;
70
71 /*single step inline, if it a breakpoint instruction*/
72 if (p->opcode == BREAKPOINT_INSTRUCTION) {
73 regs->tpc = (unsigned long) p->addr;
74 regs->tnpc = current_kprobe_orig_tnpc;
75 } else {
76 regs->tpc = (unsigned long) &p->ainsn.insn[0];
77 regs->tnpc = (unsigned long) &p->ainsn.insn[1];
78 }
79}
80
81static inline void disarm_kprobe(struct kprobe *p, struct pt_regs *regs)
82{
83 *p->addr = p->opcode;
84 flushi(p->addr);
85
86 regs->tpc = (unsigned long) p->addr;
87 regs->tnpc = current_kprobe_orig_tnpc;
88 regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
89 current_kprobe_orig_tstate_pil);
90}
91
92static int kprobe_handler(struct pt_regs *regs)
93{
94 struct kprobe *p;
95 void *addr = (void *) regs->tpc;
96 int ret = 0;
97
98 preempt_disable();
99
100 if (kprobe_running()) {
101 /* We *are* holding lock here, so this is safe.
102 * Disarm the probe we just hit, and ignore it.
103 */
104 p = get_kprobe(addr);
105 if (p) {
106 if (kprobe_status == KPROBE_HIT_SS) {
107 regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
108 current_kprobe_orig_tstate_pil);
109 unlock_kprobes();
110 goto no_kprobe;
111 }
112 disarm_kprobe(p, regs);
113 ret = 1;
114 } else {
115 p = current_kprobe;
116 if (p->break_handler && p->break_handler(p, regs))
117 goto ss_probe;
118 }
119 /* If it's not ours, can't be delete race, (we hold lock). */
120 goto no_kprobe;
121 }
122
123 lock_kprobes();
124 p = get_kprobe(addr);
125 if (!p) {
126 unlock_kprobes();
127 if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
128 /*
129 * The breakpoint instruction was removed right
130 * after we hit it. Another cpu has removed
131 * either a probepoint or a debugger breakpoint
132 * at this address. In either case, no further
133 * handling of this interrupt is appropriate.
134 */
135 ret = 1;
136 }
137 /* Not one of ours: let kernel handle it */
138 goto no_kprobe;
139 }
140
141 kprobe_status = KPROBE_HIT_ACTIVE;
142 current_kprobe = p;
143 if (p->pre_handler && p->pre_handler(p, regs))
144 return 1;
145
146ss_probe:
147 prepare_singlestep(p, regs);
148 kprobe_status = KPROBE_HIT_SS;
149 return 1;
150
151no_kprobe:
152 preempt_enable_no_resched();
153 return ret;
154}
155
156/* If INSN is a relative control transfer instruction,
157 * return the corrected branch destination value.
158 *
159 * The original INSN location was REAL_PC, it actually
160 * executed at PC and produced destination address NPC.
161 */
162static unsigned long relbranch_fixup(u32 insn, unsigned long real_pc,
163 unsigned long pc, unsigned long npc)
164{
165 /* Branch not taken, no mods necessary. */
166 if (npc == pc + 0x4UL)
167 return real_pc + 0x4UL;
168
169 /* The three cases are call, branch w/prediction,
170 * and traditional branch.
171 */
172 if ((insn & 0xc0000000) == 0x40000000 ||
173 (insn & 0xc1c00000) == 0x00400000 ||
174 (insn & 0xc1c00000) == 0x00800000) {
175 /* The instruction did all the work for us
176 * already, just apply the offset to the correct
177 * instruction location.
178 */
179 return (real_pc + (npc - pc));
180 }
181
182 return real_pc + 0x4UL;
183}
184
185/* If INSN is an instruction which writes it's PC location
186 * into a destination register, fix that up.
187 */
188static void retpc_fixup(struct pt_regs *regs, u32 insn, unsigned long real_pc)
189{
190 unsigned long *slot = NULL;
191
192 /* Simplest cast is call, which always uses %o7 */
193 if ((insn & 0xc0000000) == 0x40000000) {
194 slot = &regs->u_regs[UREG_I7];
195 }
196
197 /* Jmpl encodes the register inside of the opcode */
198 if ((insn & 0xc1f80000) == 0x81c00000) {
199 unsigned long rd = ((insn >> 25) & 0x1f);
200
201 if (rd <= 15) {
202 slot = &regs->u_regs[rd];
203 } else {
204 /* Hard case, it goes onto the stack. */
205 flushw_all();
206
207 rd -= 16;
208 slot = (unsigned long *)
209 (regs->u_regs[UREG_FP] + STACK_BIAS);
210 slot += rd;
211 }
212 }
213 if (slot != NULL)
214 *slot = real_pc;
215}
216
217/*
218 * Called after single-stepping. p->addr is the address of the
219 * instruction whose first byte has been replaced by the breakpoint
220 * instruction. To avoid the SMP problems that can occur when we
221 * temporarily put back the original opcode to single-step, we
222 * single-stepped a copy of the instruction. The address of this
223 * copy is p->ainsn.insn.
224 *
225 * This function prepares to return from the post-single-step
226 * breakpoint trap.
227 */
228static void resume_execution(struct kprobe *p, struct pt_regs *regs)
229{
230 u32 insn = p->ainsn.insn[0];
231
232 regs->tpc = current_kprobe_orig_tnpc;
233 regs->tnpc = relbranch_fixup(insn,
234 (unsigned long) p->addr,
235 (unsigned long) &p->ainsn.insn[0],
236 regs->tnpc);
237 retpc_fixup(regs, insn, (unsigned long) p->addr);
238
239 regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
240 current_kprobe_orig_tstate_pil);
241}
242
243static inline int post_kprobe_handler(struct pt_regs *regs)
244{
245 if (!kprobe_running())
246 return 0;
247
248 if (current_kprobe->post_handler)
249 current_kprobe->post_handler(current_kprobe, regs, 0);
250
251 resume_execution(current_kprobe, regs);
252
253 unlock_kprobes();
254 preempt_enable_no_resched();
255
256 return 1;
257}
258
259/* Interrupts disabled, kprobe_lock held. */
260static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
261{
262 if (current_kprobe->fault_handler
263 && current_kprobe->fault_handler(current_kprobe, regs, trapnr))
264 return 1;
265
266 if (kprobe_status & KPROBE_HIT_SS) {
267 resume_execution(current_kprobe, regs);
268
269 unlock_kprobes();
270 preempt_enable_no_resched();
271 }
272 return 0;
273}
274
275/*
276 * Wrapper routine to for handling exceptions.
277 */
278int kprobe_exceptions_notify(struct notifier_block *self, unsigned long val,
279 void *data)
280{
281 struct die_args *args = (struct die_args *)data;
282 switch (val) {
283 case DIE_DEBUG:
284 if (kprobe_handler(args->regs))
285 return NOTIFY_STOP;
286 break;
287 case DIE_DEBUG_2:
288 if (post_kprobe_handler(args->regs))
289 return NOTIFY_STOP;
290 break;
291 case DIE_GPF:
292 if (kprobe_running() &&
293 kprobe_fault_handler(args->regs, args->trapnr))
294 return NOTIFY_STOP;
295 break;
296 case DIE_PAGE_FAULT:
297 if (kprobe_running() &&
298 kprobe_fault_handler(args->regs, args->trapnr))
299 return NOTIFY_STOP;
300 break;
301 default:
302 break;
303 }
304 return NOTIFY_DONE;
305}
306
307asmlinkage void kprobe_trap(unsigned long trap_level, struct pt_regs *regs)
308{
309 BUG_ON(trap_level != 0x170 && trap_level != 0x171);
310
311 if (user_mode(regs)) {
312 local_irq_enable();
313 bad_trap(regs, trap_level);
314 return;
315 }
316
317 /* trap_level == 0x170 --> ta 0x70
318 * trap_level == 0x171 --> ta 0x71
319 */
320 if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
321 (trap_level == 0x170) ? "debug" : "debug_2",
322 regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
323 bad_trap(regs, trap_level);
324}
325
326/* Jprobes support. */
327static struct pt_regs jprobe_saved_regs;
328static struct pt_regs *jprobe_saved_regs_location;
329static struct sparc_stackf jprobe_saved_stack;
330
331int setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
332{
333 struct jprobe *jp = container_of(p, struct jprobe, kp);
334
335 jprobe_saved_regs_location = regs;
336 memcpy(&jprobe_saved_regs, regs, sizeof(*regs));
337
338 /* Save a whole stack frame, this gets arguments
339 * pushed onto the stack after using up all the
340 * arg registers.
341 */
342 memcpy(&jprobe_saved_stack,
343 (char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
344 sizeof(jprobe_saved_stack));
345
346 regs->tpc = (unsigned long) jp->entry;
347 regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
348 regs->tstate |= TSTATE_PIL;
349
350 return 1;
351}
352
353void jprobe_return(void)
354{
355 preempt_enable_no_resched();
356 __asm__ __volatile__(
357 ".globl jprobe_return_trap_instruction\n"
358"jprobe_return_trap_instruction:\n\t"
359 "ta 0x70");
360}
361
362extern void jprobe_return_trap_instruction(void);
363
364extern void __show_regs(struct pt_regs * regs);
365
366int longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
367{
368 u32 *addr = (u32 *) regs->tpc;
369
370 if (addr == (u32 *) jprobe_return_trap_instruction) {
371 if (jprobe_saved_regs_location != regs) {
372 printk("JPROBE: Current regs (%p) does not match "
373 "saved regs (%p).\n",
374 regs, jprobe_saved_regs_location);
375 printk("JPROBE: Saved registers\n");
376 __show_regs(jprobe_saved_regs_location);
377 printk("JPROBE: Current registers\n");
378 __show_regs(regs);
379 BUG();
380 }
381 /* Restore old register state. Do pt_regs
382 * first so that UREG_FP is the original one for
383 * the stack frame restore.
384 */
385 memcpy(regs, &jprobe_saved_regs, sizeof(*regs));
386
387 memcpy((char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
388 &jprobe_saved_stack,
389 sizeof(jprobe_saved_stack));
390
391 return 1;
392 }
393 return 0;
394}