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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * arch/v850/kernel/anna.c -- Anna V850E2 evaluation chip/board
3 *
4 * Copyright (C) 2002,03 NEC Electronics Corporation
5 * Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#include <linux/config.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/bootmem.h>
19#include <linux/major.h>
20#include <linux/irq.h>
21
22#include <asm/machdep.h>
23#include <asm/atomic.h>
24#include <asm/page.h>
25#include <asm/v850e_timer_d.h>
26#include <asm/v850e_uart.h>
27
28#include "mach.h"
29
30
31/* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see
32 mach_reserve_bootmem for details); use both as one big area. */
33#define RAM_START SRAM_ADDR
34#define RAM_END (SDRAM_ADDR + SDRAM_SIZE)
35
36/* The bits of this port are connected to an 8-LED bar-graph. */
37#define LEDS_PORT 0
38
39
40static void anna_led_tick (void);
41
42
43void __init mach_early_init (void)
44{
45 ANNA_ILBEN = 0;
46
47 V850E2_CSC(0) = 0x402F;
48 V850E2_CSC(1) = 0x4000;
49 V850E2_BPC = 0;
50 V850E2_BSC = 0xAAAA;
51 V850E2_BEC = 0;
52
53#if 0
54 V850E2_BHC = 0xFFFF; /* icache all memory, dcache all */
55#else
56 V850E2_BHC = 0; /* cache no memory */
57#endif
58 V850E2_BCT(0) = 0xB088;
59 V850E2_BCT(1) = 0x0008;
60 V850E2_DWC(0) = 0x0027;
61 V850E2_DWC(1) = 0;
62 V850E2_BCC = 0x0006;
63 V850E2_ASC = 0;
64 V850E2_LBS = 0x0089;
65 V850E2_SCR(3) = 0x21A9;
66 V850E2_RFS(3) = 0x8121;
67
68 v850e_intc_disable_irqs ();
69}
70
71void __init mach_setup (char **cmdline)
72{
73 ANNA_PORT_PM (LEDS_PORT) = 0; /* Make all LED pins output pins. */
74 mach_tick = anna_led_tick;
75}
76
77void __init mach_get_physical_ram (unsigned long *ram_start,
78 unsigned long *ram_len)
79{
80 *ram_start = RAM_START;
81 *ram_len = RAM_END - RAM_START;
82}
83
84void __init mach_reserve_bootmem ()
85{
86 /* The space between SRAM and SDRAM is filled with duplicate
87 images of SRAM. Prevent the kernel from using them. */
88 reserve_bootmem (SRAM_ADDR + SRAM_SIZE,
89 SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE));
90}
91
92void mach_gettimeofday (struct timespec *tv)
93{
94 tv->tv_sec = 0;
95 tv->tv_nsec = 0;
96}
97
98void __init mach_sched_init (struct irqaction *timer_action)
99{
100 /* Start hardware timer. */
101 v850e_timer_d_configure (0, HZ);
102 /* Install timer interrupt handler. */
103 setup_irq (IRQ_INTCMD(0), timer_action);
104}
105
106static struct v850e_intc_irq_init irq_inits[] = {
107 { "IRQ", 0, NUM_MACH_IRQS, 1, 7 },
108 { "PIN", IRQ_INTP(0), IRQ_INTP_NUM, 1, 4 },
109 { "CCC", IRQ_INTCCC(0), IRQ_INTCCC_NUM, 1, 5 },
110 { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 },
111 { "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 },
112 { "DMXER", IRQ_INTDMXER,1, 1, 2 },
113 { "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM, 3, 3 },
114 { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 3, 4 },
115 { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 3, 5 },
116 { 0 }
117};
118#define NUM_IRQ_INITS ((sizeof irq_inits / sizeof irq_inits[0]) - 1)
119
120static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
121
122void __init mach_init_irqs (void)
123{
124 v850e_intc_init_irq_types (irq_inits, hw_itypes);
125}
126
127void machine_restart (char *__unused)
128{
129#ifdef CONFIG_RESET_GUARD
130 disable_reset_guard ();
131#endif
132 asm ("jmp r0"); /* Jump to the reset vector. */
133}
134
135EXPORT_SYMBOL(machine_restart);
136
137void machine_halt (void)
138{
139#ifdef CONFIG_RESET_GUARD
140 disable_reset_guard ();
141#endif
142 local_irq_disable (); /* Ignore all interrupts. */
143 ANNA_PORT_IO(LEDS_PORT) = 0xAA; /* Note that we halted. */
144 for (;;)
145 asm ("halt; nop; nop; nop; nop; nop");
146}
147
148EXPORT_SYMBOL(machine_halt);
149
150void machine_power_off (void)
151{
152 machine_halt ();
153}
154
155EXPORT_SYMBOL(machine_power_off);
156
157/* Called before configuring an on-chip UART. */
158void anna_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
159{
160 /* The Anna connects some general-purpose I/O pins on the CPU to
161 the RTS/CTS lines of UART 1's serial connection. I/O pins P07
162 and P37 are RTS and CTS respectively. */
163 if (chan == 1) {
164 ANNA_PORT_PM(0) &= ~0x80; /* P07 in output mode */
165 ANNA_PORT_PM(3) |= 0x80; /* P37 in input mode */
166 }
167}
168
169/* Minimum and maximum bounds for the moving upper LED boundary in the
170 clock tick display. We can't use the last bit because it's used for
171 UART0's CTS output. */
172#define MIN_MAX_POS 0
173#define MAX_MAX_POS 6
174
175/* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if
176 we pick 6 and 0 as above, we get 49 cycles, which is when divided into
177 the standard 100 value for HZ, gives us an almost 1s total time. */
178#define TICKS_PER_FRAME \
179 (HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS))
180
181static void anna_led_tick ()
182{
183 static unsigned counter = 0;
184
185 if (++counter == TICKS_PER_FRAME) {
186 static int pos = 0, max_pos = MAX_MAX_POS, dir = 1;
187
188 if (dir > 0 && pos == max_pos) {
189 dir = -1;
190 if (max_pos == MIN_MAX_POS)
191 max_pos = MAX_MAX_POS;
192 else
193 max_pos--;
194 } else {
195 if (dir < 0 && pos == 0)
196 dir = 1;
197
198 if (pos + dir <= max_pos) {
199 /* Each bit of port 0 has a LED. */
200 clear_bit (pos, &ANNA_PORT_IO(LEDS_PORT));
201 pos += dir;
202 set_bit (pos, &ANNA_PORT_IO(LEDS_PORT));
203 }
204 }
205
206 counter = 0;
207 }
208}