blob: dca941ed10cfb7e007ae7119b2d4330d086e9a16 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2** -----------------------------------------------------------------------------
3**
4** Perle Specialix driver for Linux
5** Ported from existing RIO Driver for SCO sources.
6 *
7 * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22**
23** Module : rioinit.c
24** SID : 1.3
25** Last Modified : 11/6/98 10:33:43
26** Retrieved : 11/6/98 10:33:49
27**
28** ident @(#)rioinit.c 1.3
29**
30** -----------------------------------------------------------------------------
31*/
32#ifdef SCCS_LABELS
33static char *_rioinit_c_sccs_ = "@(#)rioinit.c 1.3";
34#endif
35
36#include <linux/config.h>
37#include <linux/module.h>
38#include <linux/slab.h>
39#include <linux/errno.h>
40#include <asm/io.h>
41#include <asm/system.h>
42#include <asm/string.h>
43#include <asm/semaphore.h>
44#include <asm/uaccess.h>
45
46#include <linux/termios.h>
47#include <linux/serial.h>
48
49#include <linux/generic_serial.h>
50
51
52#include "linux_compat.h"
53#include "typdef.h"
54#include "pkt.h"
55#include "daemon.h"
56#include "rio.h"
57#include "riospace.h"
58#include "top.h"
59#include "cmdpkt.h"
60#include "map.h"
61#include "riotypes.h"
62#include "rup.h"
63#include "port.h"
64#include "riodrvr.h"
65#include "rioinfo.h"
66#include "func.h"
67#include "errors.h"
68#include "pci.h"
69
70#include "parmmap.h"
71#include "unixrup.h"
72#include "board.h"
73#include "host.h"
74#include "error.h"
75#include "phb.h"
76#include "link.h"
77#include "cmdblk.h"
78#include "route.h"
79#include "control.h"
80#include "cirrus.h"
81#include "rioioctl.h"
82#include "rio_linux.h"
83
84#undef bcopy
85#define bcopy rio_pcicopy
86
87int RIOPCIinit(struct rio_info *p, int Mode);
88
89#if 0
90static void RIOAllocateInterrupts(struct rio_info *);
91static int RIOReport(struct rio_info *);
92static void RIOStopInterrupts(struct rio_info *, int, int);
93#endif
94
95static int RIOScrub(int, BYTE *, int);
96
97#if 0
98extern int rio_intr();
99
100/*
101** Init time code.
102*/
103void
104rioinit( p, info )
105struct rio_info * p;
106struct RioHostInfo * info;
107{
108 /*
109 ** Multi-Host card support - taking the easy way out - sorry !
110 ** We allocate and set up the Host and Port structs when the
111 ** driver is called to 'install' the first host.
112 ** We check for this first 'call' by testing the RIOPortp pointer.
113 */
114 if ( !p->RIOPortp )
115 {
116 rio_dprintk (RIO_DEBUG_INIT, "Allocating and setting up driver data structures\n");
117
118 RIOAllocDataStructs(p); /* allocate host/port structs */
119 RIOSetupDataStructs(p); /* setup topology structs */
120 }
121
122 RIOInitHosts( p, info ); /* hunt down the hardware */
123
124 RIOAllocateInterrupts(p); /* allocate interrupts */
125 RIOReport(p); /* show what we found */
126}
127
128/*
129** Initialise the Cards
130*/
131void
132RIOInitHosts(p, info)
133struct rio_info * p;
134struct RioHostInfo * info;
135{
136/*
137** 15.10.1998 ARG - ESIL 0762 part fix
138** If there is no ISA card definition - we always look for PCI cards.
139** As we currently only support one host card this lets an ISA card
140** definition take precedence over PLUG and PLAY.
141** No ISA card - we are PLUG and PLAY with PCI.
142*/
143
144 /*
145 ** Note - for PCI both these will be zero, that's okay because
146 ** RIOPCIInit() fills them in if a card is found.
147 */
148 p->RIOHosts[p->RIONumHosts].Ivec = info->vector;
149 p->RIOHosts[p->RIONumHosts].PaddrP = info->location;
150
151 /*
152 ** Check that we are able to accommodate another host
153 */
154 if ( p->RIONumHosts >= RIO_HOSTS )
155 {
156 p->RIOFailed++;
157 return;
158 }
159
160 if ( info->bus & ISA_BUS )
161 {
162 rio_dprintk (RIO_DEBUG_INIT, "initialising card %d (ISA)\n", p->RIONumHosts);
163 RIOISAinit(p, p->mode);
164 }
165 else
166 {
167 rio_dprintk (RIO_DEBUG_INIT, "initialising card %d (PCI)\n", p->RIONumHosts);
168 RIOPCIinit(p, RIO_PCI_DEFAULT_MODE);
169 }
170
171 rio_dprintk (RIO_DEBUG_INIT, "Total hosts initialised so far : %d\n", p->RIONumHosts);
172
173
174#ifdef FUTURE_RELEASE
175 if (p->bus & EISA_BUS)
176 /* EISA card */
177 RIOEISAinit(p, RIO_EISA_DEFAULT_MODE);
178
179 if (p->bus & MCA_BUS)
180 /* MCA card */
181 RIOMCAinit(p, RIO_MCA_DEFAULT_MODE);
182#endif
183}
184
185/*
186** go through memory for an AT host that we pass in the device info
187** structure and initialise
188*/
189void
190RIOISAinit(p, mode)
191struct rio_info * p;
192int mode;
193{
194
195 /* XXX Need to implement this. */
196#if 0
197 p->intr_tid = iointset(p->RIOHosts[p->RIONumHosts].Ivec,
198 (int (*)())rio_intr, (char*)p->RIONumHosts);
199
200 rio_dprintk (RIO_DEBUG_INIT, "Set interrupt handler, intr_tid = 0x%x\n", p->intr_tid );
201
202 if (RIODoAT(p, p->RIOHosts[p->RIONumHosts].PaddrP, mode)) {
203 return;
204 }
205 else {
206 rio_dprintk (RIO_DEBUG_INIT, "RIODoAT failed\n");
207 p->RIOFailed++;
208 }
209#endif
210
211}
212
213/*
214** RIODoAT :
215**
216** Map in a boards physical address, check that the board is there,
217** test the board and if everything is okay assign the board an entry
218** in the Rio Hosts structure.
219*/
220int
221RIODoAT(p, Base, mode)
222struct rio_info * p;
223int Base;
224int mode;
225{
226#define FOUND 1
227#define NOT_FOUND 0
228
229 caddr_t cardAddr;
230
231 /*
232 ** Check to see if we actually have a board at this physical address.
233 */
234 if ((cardAddr = RIOCheckForATCard(Base)) != 0) {
235 /*
236 ** Now test the board to see if it is working.
237 */
238 if (RIOBoardTest(Base, cardAddr, RIO_AT, 0) == RIO_SUCCESS) {
239 /*
240 ** Fill out a slot in the Rio host structure.
241 */
242 if (RIOAssignAT(p, Base, cardAddr, mode)) {
243 return(FOUND);
244 }
245 }
246 RIOMapout(Base, RIO_AT_MEM_SIZE, cardAddr);
247 }
248 return(NOT_FOUND);
249}
250
251caddr_t
252RIOCheckForATCard(Base)
253int Base;
254{
255 int off;
256 struct DpRam *cardp; /* (Points at the host) */
257 caddr_t virtAddr;
258 unsigned char RIOSigTab[24];
259/*
260** Table of values to search for as prom signature of a host card
261*/
262 strcpy(RIOSigTab, "JBJGPGGHINSMJPJR");
263
264 /*
265 ** Hey! Yes, You reading this code! Yo, grab a load a this:
266 **
267 ** IF the card is using WORD MODE rather than BYTE MODE
268 ** then it will occupy 128K of PHYSICAL memory area. So,
269 ** you might think that the following Mapin is wrong. Well,
270 ** it isn't, because the SECOND 64K of occupied space is an
271 ** EXACT COPY of the FIRST 64K. (good?), so, we need only
272 ** map it in in one 64K block.
273 */
274 if (RIOMapin(Base, RIO_AT_MEM_SIZE, &virtAddr) == -1) {
275 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Couldn't map the board in!\n");
276 return((caddr_t)0);
277 }
278
279 /*
280 ** virtAddr points to the DP ram of the system.
281 ** We now cast this to a pointer to a RIO Host,
282 ** and have a rummage about in the PROM.
283 */
284 cardp = (struct DpRam *)virtAddr;
285
286 for (off=0; RIOSigTab[off]; off++) {
287 if ((RBYTE(cardp->DpSignature[off]) & 0xFF) != RIOSigTab[off]) {
288 /*
289 ** Signature mismatch - card not at this address
290 */
291 RIOMapout(Base, RIO_AT_MEM_SIZE, virtAddr);
292 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Couldn't match the signature 0x%x 0x%x!\n",
293 (int)cardp, off);
294 return((caddr_t)0);
295 }
296 }
297
298 /*
299 ** If we get here then we must have found a valid board so return
300 ** its virtual address.
301 */
302 return(virtAddr);
303}
304#endif
305
306/**
307** RIOAssignAT :
308**
309** Fill out the fields in the p->RIOHosts structure now we know we know
310** we have a board present.
311**
312** bits < 0 indicates 8 bit operation requested,
313** bits > 0 indicates 16 bit operation.
314*/
315int
316RIOAssignAT(p, Base, virtAddr, mode)
317struct rio_info * p;
318int Base;
319caddr_t virtAddr;
320int mode;
321{
322 int bits;
323 struct DpRam *cardp = (struct DpRam *)virtAddr;
324
325 if ((Base < ONE_MEG) || (mode & BYTE_ACCESS_MODE))
326 bits = BYTE_OPERATION;
327 else
328 bits = WORD_OPERATION;
329
330 /*
331 ** Board has passed its scrub test. Fill in all the
332 ** transient stuff.
333 */
334 p->RIOHosts[p->RIONumHosts].Caddr = virtAddr;
335 p->RIOHosts[p->RIONumHosts].CardP = (struct DpRam *)virtAddr;
336
337 /*
338 ** Revision 01 AT host cards don't support WORD operations,
339 */
340 if ( RBYTE(cardp->DpRevision) == 01 )
341 bits = BYTE_OPERATION;
342
343 p->RIOHosts[p->RIONumHosts].Type = RIO_AT;
344 p->RIOHosts[p->RIONumHosts].Copy = bcopy;
345 /* set this later */
346 p->RIOHosts[p->RIONumHosts].Slot = -1;
347 p->RIOHosts[p->RIONumHosts].Mode = SLOW_LINKS | SLOW_AT_BUS | bits;
348 WBYTE(p->RIOHosts[p->RIONumHosts].Control,
349 BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
350 p->RIOHosts[p->RIONumHosts].Mode |
351 INTERRUPT_DISABLE );
352 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
353 WBYTE(p->RIOHosts[p->RIONumHosts].Control,
354 BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
355 p->RIOHosts[p->RIONumHosts].Mode |
356 INTERRUPT_DISABLE );
357 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
358 p->RIOHosts[p->RIONumHosts].UniqueNum =
359 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)|
360 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)|
361 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)|
362 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
363 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Uniquenum 0x%x\n",p->RIOHosts[p->RIONumHosts].UniqueNum);
364
365 p->RIONumHosts++;
366 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base);
367 return(1);
368}
369#if 0
370#ifdef FUTURE_RELEASE
371int RIOMCAinit(int Mode)
372{
373 uchar SlotNumber;
374 caddr_t Caddr;
375 uint Paddr;
376 uint Ivec;
377 int Handle;
378 int ret = 0;
379
380 /*
381 ** Valid mode information for MCA cards
382 ** is only FAST LINKS
383 */
384 Mode = (Mode & FAST_LINKS) ? McaTpFastLinks : McaTpSlowLinks;
385 rio_dprintk (RIO_DEBUG_INIT, "RIOMCAinit(%d)\n",Mode);
386
387
388 /*
389 ** Check out each of the slots
390 */
391 for (SlotNumber = 0; SlotNumber < McaMaxSlots; SlotNumber++) {
392 /*
393 ** Enable the slot we want to talk to
394 */
395 outb( McaSlotSelect, SlotNumber | McaSlotEnable );
396
397 /*
398 ** Read the ID word from the slot
399 */
400 if (((inb(McaIdHigh)<< 8)|inb(McaIdLow)) == McaRIOId)
401 {
402 rio_dprintk (RIO_DEBUG_INIT, "Potential MCA card in slot %d\n", SlotNumber);
403
404 /*
405 ** Card appears to be a RIO MCA card!
406 */
407 RIOMachineType |= (1<<RIO_MCA);
408
409 /*
410 ** Just check we haven't found too many wonderful objects
411 */
412 if ( RIONumHosts >= RIO_HOSTS )
413 {
414 Rprintf(RIOMesgTooManyCards);
415 return(ret);
416 }
417
418 /*
419 ** McaIrqEnable contains the interrupt vector, and a card
420 ** enable bit.
421 */
422 Ivec = inb(McaIrqEnable);
423
424 rio_dprintk (RIO_DEBUG_INIT, "Ivec is %x\n", Ivec);
425
426 switch ( Ivec & McaIrqMask )
427 {
428 case McaIrq9:
429 rio_dprintk (RIO_DEBUG_INIT, "IRQ9\n");
430 break;
431 case McaIrq3:
432 rio_dprintk (RIO_DEBUG_INIT, "IRQ3\n");
433 break;
434 case McaIrq4:
435 rio_dprintk (RIO_DEBUG_INIT, "IRQ4\n");
436 break;
437 case McaIrq7:
438 rio_dprintk (RIO_DEBUG_INIT, "IRQ7\n");
439 break;
440 case McaIrq10:
441 rio_dprintk (RIO_DEBUG_INIT, "IRQ10\n");
442 break;
443 case McaIrq11:
444 rio_dprintk (RIO_DEBUG_INIT, "IRQ11\n");
445 break;
446 case McaIrq12:
447 rio_dprintk (RIO_DEBUG_INIT, "IRQ12\n");
448 break;
449 case McaIrq15:
450 rio_dprintk (RIO_DEBUG_INIT, "IRQ15\n");
451 break;
452 }
453
454 /*
455 ** If the card enable bit isn't set, then set it!
456 */
457 if ((Ivec & McaCardEnable) != McaCardEnable) {
458 rio_dprintk (RIO_DEBUG_INIT, "McaCardEnable not set - setting!\n");
459 outb(McaIrqEnable,Ivec|McaCardEnable);
460 } else
461 rio_dprintk (RIO_DEBUG_INIT, "McaCardEnable already set\n");
462
463 /*
464 ** Convert the IRQ enable mask into something useful
465 */
466 Ivec = RIOMcaToIvec[Ivec & McaIrqMask];
467
468 /*
469 ** Find the physical address
470 */
471 rio_dprintk (RIO_DEBUG_INIT, "inb(McaMemory) is %x\n", inb(McaMemory));
472 Paddr = McaAddress(inb(McaMemory));
473
474 rio_dprintk (RIO_DEBUG_INIT, "MCA card has Ivec %d Addr %x\n", Ivec, Paddr);
475
476 if ( Paddr != 0 )
477 {
478
479 /*
480 ** Tell the memory mapper that we want to talk to it
481 */
482 Handle = RIOMapin( Paddr, RIO_MCA_MEM_SIZE, &Caddr );
483
484 if ( Handle == -1 ) {
485 rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at %x\n", RIO_MCA_MEM_SIZE, Paddr;
486 continue;
487 }
488
489 rio_dprintk (RIO_DEBUG_INIT, "Board mapped to vaddr 0x%x\n", Caddr);
490
491 /*
492 ** And check that it is actually there!
493 */
494 if ( RIOBoardTest( Paddr,Caddr,RIO_MCA,SlotNumber ) == RIO_SUCCESS )
495 {
496 rio_dprintk (RIO_DEBUG_INIT, "Board has passed test\n");
497 rio_dprintk (RIO_DEBUG_INIT, "Slot %d. Type %d. Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n",
498 SlotNumber, RIO_MCA, Paddr, Caddr, Mode);
499
500 /*
501 ** Board has passed its scrub test. Fill in all the
502 ** transient stuff.
503 */
504 p->RIOHosts[RIONumHosts].Slot = SlotNumber;
505 p->RIOHosts[RIONumHosts].Ivec = Ivec;
506 p->RIOHosts[RIONumHosts].Type = RIO_MCA;
507 p->RIOHosts[RIONumHosts].Copy = bcopy;
508 p->RIOHosts[RIONumHosts].PaddrP = Paddr;
509 p->RIOHosts[RIONumHosts].Caddr = Caddr;
510 p->RIOHosts[RIONumHosts].CardP = (struct DpRam *)Caddr;
511 p->RIOHosts[RIONumHosts].Mode = Mode;
512 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt , 0xff);
513 p->RIOHosts[RIONumHosts].UniqueNum =
514 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[0])&0xFF)<<0)|
515 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[1])&0xFF)<<8)|
516 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[2])&0xFF)<<16)|
517 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[3])&0xFF)<<24);
518 RIONumHosts++;
519 ret++;
520 }
521 else
522 {
523 /*
524 ** It failed the test, so ignore it.
525 */
526 rio_dprintk (RIO_DEBUG_INIT, "TEST FAILED\n");
527 RIOMapout(Paddr, RIO_MCA_MEM_SIZE, Caddr );
528 }
529 }
530 else
531 {
532 rio_dprintk (RIO_DEBUG_INIT, "Slot %d - Paddr zero!\n", SlotNumber);
533 }
534 }
535 else
536 {
537 rio_dprintk (RIO_DEBUG_INIT, "Slot %d NOT RIO\n", SlotNumber);
538 }
539 }
540 /*
541 ** Now we have checked all the slots, turn off the MCA slot selector
542 */
543 outb(McaSlotSelect,0);
544 rio_dprintk (RIO_DEBUG_INIT, "Slot %d NOT RIO\n", SlotNumber);
545 return ret;
546}
547
548int RIOEISAinit( int Mode )
549{
550 static int EISADone = 0;
551 uint Paddr;
552 int PollIntMixMsgDone = 0;
553 caddr_t Caddr;
554 ushort Ident;
555 uchar EisaSlot;
556 uchar Ivec;
557 int ret = 0;
558
559 /*
560 ** The only valid mode information for EISA hosts is fast or slow
561 ** links.
562 */
563 Mode = (Mode & FAST_LINKS) ? EISA_TP_FAST_LINKS : EISA_TP_SLOW_LINKS;
564
565 if ( EISADone )
566 {
567 rio_dprintk (RIO_DEBUG_INIT, "RIOEISAinit() - already done, return.\n");
568 return(0);
569 }
570
571 EISADone++;
572
573 rio_dprintk (RIO_DEBUG_INIT, "RIOEISAinit()\n");
574
575
576 /*
577 ** First check all cards to see if ANY are set for polled mode operation.
578 ** If so, set ALL to polled.
579 */
580
581 for ( EisaSlot=1; EisaSlot<=RIO_MAX_EISA_SLOTS; EisaSlot++ )
582 {
583 Ident = (INBZ(EisaSlot,EISA_PRODUCT_IDENT_HI)<<8) |
584 INBZ(EisaSlot,EISA_PRODUCT_IDENT_LO);
585
586 if ( Ident == RIO_EISA_IDENT )
587 {
588 rio_dprintk (RIO_DEBUG_INIT, "Found Specialix product\n");
589
590 if ( INBZ(EisaSlot,EISA_PRODUCT_NUMBER) != RIO_EISA_PRODUCT_CODE )
591 {
592 rio_dprintk (RIO_DEBUG_INIT, "Not Specialix RIO - Product number %x\n",
593 INBZ(EisaSlot, EISA_PRODUCT_NUMBER));
594 continue; /* next slot */
595 }
596 /*
597 ** Its a Specialix RIO!
598 */
599 rio_dprintk (RIO_DEBUG_INIT, "RIO Revision %d\n",
600 INBZ(EisaSlot, EISA_REVISION_NUMBER));
601
602 RIOMachineType |= (1<<RIO_EISA);
603
604 /*
605 ** Just check we haven't found too many wonderful objects
606 */
607 if ( RIONumHosts >= RIO_HOSTS )
608 {
609 Rprintf(RIOMesgTooManyCards);
610 return 0;
611 }
612
613 /*
614 ** Ensure that the enable bit is set!
615 */
616 OUTBZ( EisaSlot, EISA_ENABLE, RIO_EISA_ENABLE_BIT );
617
618 /*
619 ** EISA_INTERRUPT_VEC contains the interrupt vector.
620 */
621 Ivec = INBZ(EisaSlot,EISA_INTERRUPT_VEC);
622
623#ifdef RIODEBUG
624 switch ( Ivec & EISA_INTERRUPT_MASK )
625 {
626 case EISA_IRQ_3:
627 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 3\n");
628 break;
629 case EISA_IRQ_4:
630 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 4\n");
631 break;
632 case EISA_IRQ_5:
633 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 5\n");
634 break;
635 case EISA_IRQ_6:
636 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 6\n");
637 break;
638 case EISA_IRQ_7:
639 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 7\n");
640 break;
641 case EISA_IRQ_9:
642 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 9\n");
643 break;
644 case EISA_IRQ_10:
645 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 10\n");
646 break;
647 case EISA_IRQ_11:
648 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 11\n");
649 break;
650 case EISA_IRQ_12:
651 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 12\n");
652 break;
653 case EISA_IRQ_14:
654 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 14\n");
655 break;
656 case EISA_IRQ_15:
657 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 15\n");
658 break;
659 case EISA_POLLED:
660 rio_dprintk (RIO_DEBUG_INIT, "EISA POLLED\n");
661 break;
662 default:
663 rio_dprintk (RIO_DEBUG_INIT, NULL,DBG_INIT|DBG_FAIL,"Shagged interrupt number!\n");
664 Ivec &= EISA_CONTROL_MASK;
665 }
666#endif
667
668 if ( (Ivec & EISA_INTERRUPT_MASK) ==
669 EISA_POLLED )
670 {
671 RIOWillPoll = 1;
672 break; /* From EisaSlot loop */
673 }
674 }
675 }
676
677 /*
678 ** Do it all again now we know whether to change all cards to polled
679 ** mode or not
680 */
681
682 for ( EisaSlot=1; EisaSlot<=RIO_MAX_EISA_SLOTS; EisaSlot++ )
683 {
684 Ident = (INBZ(EisaSlot,EISA_PRODUCT_IDENT_HI)<<8) |
685 INBZ(EisaSlot,EISA_PRODUCT_IDENT_LO);
686
687 if ( Ident == RIO_EISA_IDENT )
688 {
689 if ( INBZ(EisaSlot,EISA_PRODUCT_NUMBER) != RIO_EISA_PRODUCT_CODE )
690 continue; /* next slot */
691
692 /*
693 ** Its a Specialix RIO!
694 */
695
696 /*
697 ** Ensure that the enable bit is set!
698 */
699 OUTBZ( EisaSlot, EISA_ENABLE, RIO_EISA_ENABLE_BIT );
700
701 /*
702 ** EISA_INTERRUPT_VEC contains the interrupt vector.
703 */
704 Ivec = INBZ(EisaSlot,EISA_INTERRUPT_VEC);
705
706 if ( RIOWillPoll )
707 {
708 /*
709 ** If we are going to operate in polled mode, but this
710 ** board is configured to be interrupt driven, display
711 ** the message explaining the situation to the punter,
712 ** assuming we haven't already done so.
713 */
714
715 if ( !PollIntMixMsgDone &&
716 (Ivec & EISA_INTERRUPT_MASK) != EISA_POLLED )
717 {
718 Rprintf(RIOMesgAllPolled);
719 PollIntMixMsgDone = 1;
720 }
721
722 /*
723 ** Ungraciously ignore whatever the board reports as its
724 ** interrupt vector...
725 */
726
727 Ivec &= ~EISA_INTERRUPT_MASK;
728
729 /*
730 ** ...and force it to dance to the poll tune.
731 */
732
733 Ivec |= EISA_POLLED;
734 }
735
736 /*
737 ** Convert the IRQ enable mask into something useful (0-15)
738 */
739 Ivec = RIOEisaToIvec(Ivec);
740
741 rio_dprintk (RIO_DEBUG_INIT, "EISA host in slot %d has Ivec 0x%x\n",
742 EisaSlot, Ivec);
743
744 /*
745 ** Find the physical address
746 */
747 Paddr = (INBZ(EisaSlot,EISA_MEMORY_BASE_HI)<<24) |
748 (INBZ(EisaSlot,EISA_MEMORY_BASE_LO)<<16);
749
750 rio_dprintk (RIO_DEBUG_INIT, "EISA card has Ivec %d Addr %x\n", Ivec, Paddr);
751
752 if ( Paddr == 0 )
753 {
754 rio_dprintk (RIO_DEBUG_INIT,
755 "Board in slot %d configured for address zero!\n", EisaSlot);
756 continue;
757 }
758
759 /*
760 ** Tell the memory mapper that we want to talk to it
761 */
762 rio_dprintk (RIO_DEBUG_INIT, "About to map EISA card \n");
763
764 if (RIOMapin( Paddr, RIO_EISA_MEM_SIZE, &Caddr) == -1) {
765 rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at %x\n",
766 RIO_EISA_MEM_SIZE,Paddr);
767 continue;
768 }
769
770 rio_dprintk (RIO_DEBUG_INIT, "Board mapped to vaddr 0x%x\n", Caddr);
771
772 /*
773 ** And check that it is actually there!
774 */
775 if ( RIOBoardTest( Paddr,Caddr,RIO_EISA,EisaSlot) == RIO_SUCCESS )
776 {
777 rio_dprintk (RIO_DEBUG_INIT, "Board has passed test\n");
778 rio_dprintk (RIO_DEBUG_INIT,
779 "Slot %d. Ivec %d. Type %d. Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n",
780 EisaSlot,Ivec,RIO_EISA,Paddr,Caddr,Mode);
781
782 /*
783 ** Board has passed its scrub test. Fill in all the
784 ** transient stuff.
785 */
786 p->RIOHosts[RIONumHosts].Slot = EisaSlot;
787 p->RIOHosts[RIONumHosts].Ivec = Ivec;
788 p->RIOHosts[RIONumHosts].Type = RIO_EISA;
789 p->RIOHosts[RIONumHosts].Copy = bcopy;
790 p->RIOHosts[RIONumHosts].PaddrP = Paddr;
791 p->RIOHosts[RIONumHosts].Caddr = Caddr;
792 p->RIOHosts[RIONumHosts].CardP = (struct DpRam *)Caddr;
793 p->RIOHosts[RIONumHosts].Mode = Mode;
794 /*
795 ** because the EISA prom is mapped into IO space, we
796 ** need to copy the unqiue number into the memory area
797 ** that it would have occupied, so that the download
798 ** code can determine its ID and card type.
799 */
800 WBYTE(p->RIOHosts[RIONumHosts].Unique[0],INBZ(EisaSlot,EISA_UNIQUE_NUM_0));
801 WBYTE(p->RIOHosts[RIONumHosts].Unique[1],INBZ(EisaSlot,EISA_UNIQUE_NUM_1));
802 WBYTE(p->RIOHosts[RIONumHosts].Unique[2],INBZ(EisaSlot,EISA_UNIQUE_NUM_2));
803 WBYTE(p->RIOHosts[RIONumHosts].Unique[3],INBZ(EisaSlot,EISA_UNIQUE_NUM_3));
804 p->RIOHosts[RIONumHosts].UniqueNum =
805 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[0])&0xFF)<<0)|
806 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[1])&0xFF)<<8)|
807 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[2])&0xFF)<<16)|
808 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[3])&0xFF)<<24);
809 INBZ(EisaSlot,EISA_INTERRUPT_RESET);
810 RIONumHosts++;
811 ret++;
812 }
813 else
814 {
815 /*
816 ** It failed the test, so ignore it.
817 */
818 rio_dprintk (RIO_DEBUG_INIT, "TEST FAILED\n");
819
820 RIOMapout(Paddr, RIO_EISA_MEM_SIZE, Caddr );
821 }
822 }
823 }
824 if (RIOMachineType & RIO_EISA)
825 return ret+1;
826 return ret;
827}
828#endif
829
830
831#ifndef linux
832
833#define CONFIG_ADDRESS 0xcf8
834#define CONFIG_DATA 0xcfc
835#define FORWARD_REG 0xcfa
836
837
838static int
839read_config(int bus_number, int device_num, int r_number)
840{
841 unsigned int cav;
842 unsigned int val;
843
844/*
845 Build config_address_value:
846
847 31 24 23 16 15 11 10 8 7 0
848 ------------------------------------------------------
849 |1| 0000000 | bus_number | device # | 000 | register |
850 ------------------------------------------------------
851*/
852
853 cav = r_number & 0xff;
854 cav |= ((device_num & 0x1f) << 11);
855 cav |= ((bus_number & 0xff) << 16);
856 cav |= 0x80000000; /* Enable bit */
857 outpd(CONFIG_ADDRESS,cav);
858 val = inpd(CONFIG_DATA);
859 outpd(CONFIG_ADDRESS,0);
860 return val;
861}
862
863static
864write_config(bus_number,device_num,r_number,val)
865{
866 unsigned int cav;
867
868/*
869 Build config_address_value:
870
871 31 24 23 16 15 11 10 8 7 0
872 ------------------------------------------------------
873 |1| 0000000 | bus_number | device # | 000 | register |
874 ------------------------------------------------------
875*/
876
877 cav = r_number & 0xff;
878 cav |= ((device_num & 0x1f) << 11);
879 cav |= ((bus_number & 0xff) << 16);
880 cav |= 0x80000000; /* Enable bit */
881 outpd(CONFIG_ADDRESS, cav);
882 outpd(CONFIG_DATA, val);
883 outpd(CONFIG_ADDRESS, 0);
884 return val;
885}
886#else
887/* XXX Implement these... */
888static int
889read_config(int bus_number, int device_num, int r_number)
890{
891 return 0;
892}
893
894static int
895write_config(int bus_number, int device_num, int r_number)
896{
897 return 0;
898}
899
900#endif
901
902int
903RIOPCIinit(p, Mode)
904struct rio_info *p;
905int Mode;
906{
907 #define MAX_PCI_SLOT 32
908 #define RIO_PCI_JET_CARD 0x200011CB
909
910 static int slot; /* count of machine's PCI slots searched so far */
911 caddr_t Caddr; /* Virtual address of the current PCI host card. */
912 unsigned char Ivec; /* interrupt vector for the current PCI host */
913 unsigned long Paddr; /* Physical address for the current PCI host */
914 int Handle; /* Handle to Virtual memory allocated for current PCI host */
915
916
917 rio_dprintk (RIO_DEBUG_INIT, "Search for a RIO PCI card - start at slot %d\n", slot);
918
919 /*
920 ** Initialise the search status
921 */
922 p->RIOLastPCISearch = RIO_FAIL;
923
924 while ( (slot < MAX_PCI_SLOT) & (p->RIOLastPCISearch != RIO_SUCCESS) )
925 {
926 rio_dprintk (RIO_DEBUG_INIT, "Currently testing slot %d\n", slot);
927
928 if (read_config(0,slot,0) == RIO_PCI_JET_CARD) {
929 p->RIOHosts[p->RIONumHosts].Ivec = 0;
930 Paddr = read_config(0,slot,0x18);
931 Paddr = Paddr - (Paddr & 0x1); /* Mask off the io bit */
932
933 if ( (Paddr == 0) || ((Paddr & 0xffff0000) == 0xffff0000) ) {
934 rio_dprintk (RIO_DEBUG_INIT, "Goofed up slot\n"); /* what! */
935 slot++;
936 continue;
937 }
938
939 p->RIOHosts[p->RIONumHosts].PaddrP = Paddr;
940 Ivec = (read_config(0,slot,0x3c) & 0xff);
941
942 rio_dprintk (RIO_DEBUG_INIT, "PCI Host at 0x%x, Intr %d\n", (int)Paddr, Ivec);
943
944 Handle = RIOMapin( Paddr, RIO_PCI_MEM_SIZE, &Caddr );
945 if (Handle == -1) {
946 rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at 0x%x\n", RIO_PCI_MEM_SIZE, (int)Paddr);
947 slot++;
948 continue;
949 }
950 p->RIOHosts[p->RIONumHosts].Ivec = Ivec + 32;
951 p->intr_tid = iointset(p->RIOHosts[p->RIONumHosts].Ivec,
952 (int (*)())rio_intr, (char *)p->RIONumHosts);
953 if (RIOBoardTest( Paddr, Caddr, RIO_PCI, 0 ) == RIO_SUCCESS) {
954 rio_dprintk (RIO_DEBUG_INIT, ("Board has passed test\n");
955 rio_dprintk (RIO_DEBUG_INIT, ("Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n", Paddr, Caddr, Mode);
956
957 /*
958 ** Board has passed its scrub test. Fill in all the
959 ** transient stuff.
960 */
961 p->RIOHosts[p->RIONumHosts].Slot = 0;
962 p->RIOHosts[p->RIONumHosts].Ivec = Ivec + 32;
963 p->RIOHosts[p->RIONumHosts].Type = RIO_PCI;
964 p->RIOHosts[p->RIONumHosts].Copy = rio_pcicopy;
965 p->RIOHosts[p->RIONumHosts].PaddrP = Paddr;
966 p->RIOHosts[p->RIONumHosts].Caddr = Caddr;
967 p->RIOHosts[p->RIONumHosts].CardP = (struct DpRam *)Caddr;
968 p->RIOHosts[p->RIONumHosts].Mode = Mode;
969
970#if 0
971 WBYTE(p->RIOHosts[p->RIONumHosts].Control,
972 BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
973 p->RIOHosts[p->RIONumHosts].Mode |
974 INTERRUPT_DISABLE );
975 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
976 WBYTE(p->RIOHosts[p->RIONumHosts].Control,
977 BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
978 p->RIOHosts[p->RIONumHosts].Mode |
979 INTERRUPT_DISABLE );
980 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
981#else
982 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt, 0xff);
983#endif
984 p->RIOHosts[p->RIONumHosts].UniqueNum =
985 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)|
986 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)|
987 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)|
988 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
989
990 rio_dprintk (RIO_DEBUG_INIT, "Unique no 0x%x.\n",
991 p->RIOHosts[p->RIONumHosts].UniqueNum);
992
993 p->RIOLastPCISearch = RIO_SUCCESS;
994 p->RIONumHosts++;
995 }
996 }
997 slot++;
998 }
999
1000 if ( slot >= MAX_PCI_SLOT ) {
1001 rio_dprintk (RIO_DEBUG_INIT, "All %d PCI slots have tested for RIO cards !!!\n",
1002 MAX_PCI_SLOT);
1003 }
1004
1005
1006 /*
1007 ** I don't think we want to do this anymore
1008 **
1009
1010 if (!p->RIOLastPCISearch == RIO_FAIL ) {
1011 p->RIOFailed++;
1012 }
1013
1014 **
1015 */
1016}
1017
1018#ifdef FUTURE_RELEASE
1019void riohalt( void )
1020{
1021 int host;
1022 for ( host=0; host<p->RIONumHosts; host++ )
1023 {
1024 rio_dprintk (RIO_DEBUG_INIT, "Stop host %d\n", host);
1025 (void)RIOBoardTest( p->RIOHosts[host].PaddrP, p->RIOHosts[host].Caddr, p->RIOHosts[host].Type,p->RIOHosts[host].Slot );
1026 }
1027}
1028#endif
1029#endif
1030
1031static uchar val[] = {
1032#ifdef VERY_LONG_TEST
1033 0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
1034 0xa5, 0xff, 0x5a, 0x00, 0xff, 0xc9, 0x36,
1035#endif
1036 0xff, 0x00, 0x00 };
1037
1038#define TEST_END sizeof(val)
1039
1040/*
1041** RAM test a board.
1042** Nothing too complicated, just enough to check it out.
1043*/
1044int
1045RIOBoardTest(paddr, caddr, type, slot)
1046paddr_t paddr;
1047caddr_t caddr;
1048uchar type;
1049int slot;
1050{
1051 struct DpRam *DpRam = (struct DpRam *)caddr;
1052 char *ram[4];
1053 int size[4];
1054 int op, bank;
1055 int nbanks;
1056
1057 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Reset host type=%d, DpRam=0x%x, slot=%d\n",
1058 type,(int)DpRam, slot);
1059
1060 RIOHostReset(type, DpRam, slot);
1061
1062 /*
1063 ** Scrub the memory. This comes in several banks:
1064 ** DPsram1 - 7000h bytes
1065 ** DPsram2 - 200h bytes
1066 ** DPsram3 - 7000h bytes
1067 ** scratch - 1000h bytes
1068 */
1069
1070 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Setup ram/size arrays\n");
1071
1072 size[0] = DP_SRAM1_SIZE;
1073 size[1] = DP_SRAM2_SIZE;
1074 size[2] = DP_SRAM3_SIZE;
1075 size[3] = DP_SCRATCH_SIZE;
1076
1077 ram[0] = (char *)&DpRam->DpSram1[0];
1078 ram[1] = (char *)&DpRam->DpSram2[0];
1079 ram[2] = (char *)&DpRam->DpSram3[0];
1080 nbanks = (type == RIO_PCI) ? 3 : 4;
1081 if (nbanks == 4)
1082 ram[3] = (char *)&DpRam->DpScratch[0];
1083
1084
1085 if (nbanks == 3) {
1086 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Memory: 0x%x(0x%x), 0x%x(0x%x), 0x%x(0x%x)\n",
1087 (int)ram[0], size[0], (int)ram[1], size[1], (int)ram[2], size[2]);
1088 } else {
1089 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: 0x%x(0x%x), 0x%x(0x%x), 0x%x(0x%x), 0x%x(0x%x)\n",
1090 (int)ram[0], size[0], (int)ram[1], size[1], (int)ram[2], size[2], (int)ram[3],
1091 size[3]);
1092 }
1093
1094 /*
1095 ** This scrub operation will test for crosstalk between
1096 ** banks. TEST_END is a magic number, and relates to the offset
1097 ** within the 'val' array used by Scrub.
1098 */
1099 for (op=0; op<TEST_END; op++) {
1100 for (bank=0; bank<nbanks; bank++) {
1101 if (RIOScrub(op, (BYTE *)ram[bank], size[bank]) == RIO_FAIL) {
1102 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: RIOScrub band %d, op %d failed\n",
1103 bank, op);
1104 return RIO_FAIL;
1105 }
1106 }
1107 }
1108
1109 rio_dprintk (RIO_DEBUG_INIT, "Test completed\n");
1110 return RIO_SUCCESS;
1111}
1112
1113
1114/*
1115** Scrub an area of RAM.
1116** Define PRETEST and POSTTEST for a more thorough checking of the
1117** state of the memory.
1118** Call with op set to an index into the above 'val' array to determine
1119** which value will be written into memory.
1120** Call with op set to zero means that the RAM will not be read and checked
1121** before it is written.
1122** Call with op not zero, and the RAM will be read and compated with val[op-1]
1123** to check that the data from the previous phase was retained.
1124*/
1125static int
1126RIOScrub(op, ram, size)
1127int op;
1128BYTE * ram;
1129int size;
1130{
1131 int off;
1132 unsigned char oldbyte;
1133 unsigned char newbyte;
1134 unsigned char invbyte;
1135 unsigned short oldword;
1136 unsigned short newword;
1137 unsigned short invword;
1138 unsigned short swapword;
1139
1140 if (op) {
1141 oldbyte = val[op-1];
1142 oldword = oldbyte | (oldbyte<<8);
1143 } else
1144 oldbyte = oldword = 0; /* Tell the compiler we've initilalized them. */
1145 newbyte = val[op];
1146 newword = newbyte | (newbyte<<8);
1147 invbyte = ~newbyte;
1148 invword = invbyte | (invbyte<<8);
1149
1150 /*
1151 ** Check that the RAM contains the value that should have been left there
1152 ** by the previous test (not applicable for pass zero)
1153 */
1154 if (op) {
1155 for (off=0; off<size; off++) {
1156 if (RBYTE(ram[off]) != oldbyte) {
1157 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 1: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, RBYTE(ram[off]));
1158 return RIO_FAIL;
1159 }
1160 }
1161 for (off=0; off<size; off+=2) {
1162 if (*(ushort *)&ram[off] != oldword) {
1163 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: WORD at offset 0x%x should have been=%x, was=%x\n",off,oldword,*(ushort *)&ram[off]);
1164 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1165 return RIO_FAIL;
1166 }
1167 }
1168 }
1169
1170 /*
1171 ** Now write the INVERSE of the test data into every location, using
1172 ** BYTE write operations, first checking before each byte is written
1173 ** that the location contains the old value still, and checking after
1174 ** the write that the location contains the data specified - this is
1175 ** the BYTE read/write test.
1176 */
1177 for (off=0; off<size; off++) {
1178 if (op && (RBYTE(ram[off]) != oldbyte)) {
1179 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, RBYTE(ram[off]));
1180 return RIO_FAIL;
1181 }
1182 WBYTE(ram[off],invbyte);
1183 if (RBYTE(ram[off]) != invbyte) {
1184 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Inv Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, invbyte, RBYTE(ram[off]));
1185 return RIO_FAIL;
1186 }
1187 }
1188
1189 /*
1190 ** now, use WORD operations to write the test value into every location,
1191 ** check as before that the location contains the previous test value
1192 ** before overwriting, and that it contains the data value written
1193 ** afterwards.
1194 ** This is the WORD operation test.
1195 */
1196 for (off=0; off<size; off+=2) {
1197 if (*(ushort *)&ram[off] != invword) {
1198 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: WORD at offset 0x%x should have been=%x, was=%x\n", off, invword, *(ushort *)&ram[off]);
1199 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1200 return RIO_FAIL;
1201 }
1202
1203 *(ushort *)&ram[off] = newword;
1204 if ( *(ushort *)&ram[off] != newword ) {
1205 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, *(ushort *)&ram[off]);
1206 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1207 return RIO_FAIL;
1208 }
1209 }
1210
1211 /*
1212 ** now run through the block of memory again, first in byte mode
1213 ** then in word mode, and check that all the locations contain the
1214 ** required test data.
1215 */
1216 for (off=0; off<size; off++) {
1217 if (RBYTE(ram[off]) != newbyte) {
1218 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Byte Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, RBYTE(ram[off]));
1219 return RIO_FAIL;
1220 }
1221 }
1222
1223 for (off=0; off<size; off+=2) {
1224 if ( *(ushort *)&ram[off] != newword ) {
1225 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, *(ushort *)&ram[off]);
1226 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1227 return RIO_FAIL;
1228 }
1229 }
1230
1231 /*
1232 ** time to check out byte swapping errors
1233 */
1234 swapword = invbyte | (newbyte << 8);
1235
1236 for (off=0; off<size; off+=2) {
1237 WBYTE(ram[off],invbyte);
1238 WBYTE(ram[off+1],newbyte);
1239 }
1240
1241 for ( off=0; off<size; off+=2 ) {
1242 if (*(ushort *)&ram[off] != swapword) {
1243 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, swapword, *((ushort *)&ram[off]));
1244 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1245 return RIO_FAIL;
1246 }
1247 *((ushort *)&ram[off]) = ~swapword;
1248 }
1249
1250 for (off=0; off<size; off+=2) {
1251 if (RBYTE(ram[off]) != newbyte) {
1252 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, RBYTE(ram[off]));
1253 return RIO_FAIL;
1254 }
1255 if (RBYTE(ram[off+1]) != invbyte) {
1256 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off+1, invbyte, RBYTE(ram[off+1]));
1257 return RIO_FAIL;
1258 }
1259 *((ushort *)&ram[off]) = newword;
1260 }
1261 return RIO_SUCCESS;
1262}
1263
1264/*
1265** try to ensure that every host is either in polled mode
1266** or is in interrupt mode. Only allow interrupt mode if
1267** all hosts can interrupt (why?)
1268** and force into polled mode if told to. Patch up the
1269** interrupt vector & salute The Queen when you've done.
1270*/
1271#if 0
1272static void
1273RIOAllocateInterrupts(p)
1274struct rio_info * p;
1275{
1276 int Host;
1277
1278 /*
1279 ** Easy case - if we have been told to poll, then we poll.
1280 */
1281 if (p->mode & POLLED_MODE) {
1282 RIOStopInterrupts(p, 0, 0);
1283 return;
1284 }
1285
1286 /*
1287 ** check - if any host has been set to polled mode, then all must be.
1288 */
1289 for (Host=0; Host<p->RIONumHosts; Host++) {
1290 if ( (p->RIOHosts[Host].Type != RIO_AT) &&
1291 (p->RIOHosts[Host].Ivec == POLLED) ) {
1292 RIOStopInterrupts(p, 1, Host );
1293 return;
1294 }
1295 }
1296 for (Host=0; Host<p->RIONumHosts; Host++) {
1297 if (p->RIOHosts[Host].Type == RIO_AT) {
1298 if ( (p->RIOHosts[Host].Ivec - 32) == 0) {
1299 RIOStopInterrupts(p, 2, Host );
1300 return;
1301 }
1302 }
1303 }
1304}
1305
1306/*
1307** something has decided that we can't be doing with these
1308** new-fangled interrupt thingies. Set everything up to just
1309** poll.
1310*/
1311static void
1312RIOStopInterrupts(p, Reason, Host)
1313struct rio_info * p;
1314int Reason;
1315int Host;
1316{
1317#ifdef FUTURE_RELEASE
1318 switch (Reason) {
1319 case 0: /* forced into polling by rio_polled */
1320 break;
1321 case 1: /* SCU has set 'Host' into polled mode */
1322 break;
1323 case 2: /* there aren't enough interrupt vectors for 'Host' */
1324 break;
1325 }
1326#endif
1327
1328 for (Host=0; Host<p->RIONumHosts; Host++ ) {
1329 struct Host *HostP = &p->RIOHosts[Host];
1330
1331 switch (HostP->Type) {
1332 case RIO_AT:
1333 /*
1334 ** The AT host has it's interrupts disabled by clearing the
1335 ** int_enable bit.
1336 */
1337 HostP->Mode &= ~INTERRUPT_ENABLE;
1338 HostP->Ivec = POLLED;
1339 break;
1340#ifdef FUTURE_RELEASE
1341 case RIO_EISA:
1342 /*
1343 ** The EISA host has it's interrupts disabled by setting the
1344 ** Ivec to zero
1345 */
1346 HostP->Ivec = POLLED;
1347 break;
1348#endif
1349 case RIO_PCI:
1350 /*
1351 ** The PCI host has it's interrupts disabled by clearing the
1352 ** int_enable bit, like a regular host card.
1353 */
1354 HostP->Mode &= ~RIO_PCI_INT_ENABLE;
1355 HostP->Ivec = POLLED;
1356 break;
1357#ifdef FUTURE_RELEASE
1358 case RIO_MCA:
1359 /*
1360 ** There's always one, isn't there?
1361 ** The MCA host card cannot have it's interrupts disabled.
1362 */
1363 RIOPatchVec(HostP);
1364 break;
1365#endif
1366 }
1367 }
1368}
1369
1370/*
1371** This function is called at init time to setup the data structures.
1372*/
1373void
1374RIOAllocDataStructs(p)
1375struct rio_info * p;
1376{
1377 int port,
1378 host,
1379 tm;
1380
1381 p->RIOPortp = (struct Port *)sysbrk(RIO_PORTS * sizeof(struct Port));
1382 if (!p->RIOPortp) {
1383 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: No memory for port structures\n");
1384 p->RIOFailed++;
1385 return;
1386 }
1387 bzero( p->RIOPortp, sizeof(struct Port) * RIO_PORTS );
1388 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: allocated and cleared memory for port structs\n");
1389 rio_dprintk (RIO_DEBUG_INIT, "First RIO port struct @0x%x, size=0x%x bytes\n",
1390 (int)p->RIOPortp, sizeof(struct Port));
1391
1392 for( port=0; port<RIO_PORTS; port++ ) {
1393 p->RIOPortp[port].PortNum = port;
1394 p->RIOPortp[port].TtyP = &p->channel[port];
1395 sreset (p->RIOPortp[port].InUse); /* Let the first guy uses it */
1396 p->RIOPortp[port].portSem = -1; /* Let the first guy takes it */
1397 p->RIOPortp[port].ParamSem = -1; /* Let the first guy takes it */
1398 p->RIOPortp[port].timeout_id = 0; /* Let the first guy takes it */
1399 }
1400
1401 p->RIOHosts = (struct Host *)sysbrk(RIO_HOSTS * sizeof(struct Host));
1402 if (!p->RIOHosts) {
1403 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: No memory for host structures\n");
1404 p->RIOFailed++;
1405 return;
1406 }
1407 bzero(p->RIOHosts, sizeof(struct Host)*RIO_HOSTS);
1408 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: allocated and cleared memory for host structs\n");
1409 rio_dprintk (RIO_DEBUG_INIT, "First RIO host struct @0x%x, size=0x%x bytes\n",
1410 (int)p->RIOHosts, sizeof(struct Host));
1411
1412 for( host=0; host<RIO_HOSTS; host++ ) {
1413 spin_lock_init (&p->RIOHosts[host].HostLock);
1414 p->RIOHosts[host].timeout_id = 0; /* Let the first guy takes it */
1415 }
1416 /*
1417 ** check that the buffer size is valid, round down to the next power of
1418 ** two if necessary; if the result is zero, then, hey, no double buffers.
1419 */
1420 for ( tm = 1; tm && tm <= p->RIOConf.BufferSize; tm <<= 1 )
1421 ;
1422 tm >>= 1;
1423 p->RIOBufferSize = tm;
1424 p->RIOBufferMask = tm ? tm - 1 : 0;
1425}
1426
1427/*
1428** this function gets called whenever the data structures need to be
1429** re-setup, for example, after a riohalt (why did I ever invent it?)
1430*/
1431void
1432RIOSetupDataStructs(p)
1433struct rio_info * p;
1434{
1435 int host, entry, rup;
1436
1437 for ( host=0; host<RIO_HOSTS; host++ ) {
1438 struct Host *HostP = &p->RIOHosts[host];
1439 for ( entry=0; entry<LINKS_PER_UNIT; entry++ ) {
1440 HostP->Topology[entry].Unit = ROUTE_DISCONNECT;
1441 HostP->Topology[entry].Link = NO_LINK;
1442 }
1443 bcopy("HOST X", HostP->Name, 7);
1444 HostP->Name[5] = '1'+host;
1445 for (rup=0; rup<(MAX_RUP + LINKS_PER_UNIT); rup++) {
1446 if (rup < MAX_RUP) {
1447 for (entry=0; entry<LINKS_PER_UNIT; entry++ ) {
1448 HostP->Mapping[rup].Topology[entry].Unit = ROUTE_DISCONNECT;
1449 HostP->Mapping[rup].Topology[entry].Link = NO_LINK;
1450 }
1451 RIODefaultName(p, HostP, rup);
1452 }
1453 spin_lock_init(&HostP->UnixRups[rup].RupLock);
1454 }
1455 }
1456}
1457#endif
1458
1459int
1460RIODefaultName(p, HostP, UnitId)
1461struct rio_info * p;
1462struct Host * HostP;
1463uint UnitId;
1464{
1465#ifdef CHECK
1466 CheckHost( Host );
1467 CheckUnitId( UnitId );
1468#endif
1469 bcopy("UNKNOWN RTA X-XX",HostP->Mapping[UnitId].Name,17);
1470 HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts);
1471 if ((UnitId+1) > 9) {
1472 HostP->Mapping[UnitId].Name[14]='0'+((UnitId+1)/10);
1473 HostP->Mapping[UnitId].Name[15]='0'+((UnitId+1)%10);
1474 }
1475 else {
1476 HostP->Mapping[UnitId].Name[14]='1'+UnitId;
1477 HostP->Mapping[UnitId].Name[15]=0;
1478 }
1479 return 0;
1480}
1481
1482#define RIO_RELEASE "Linux"
1483#define RELEASE_ID "1.0"
1484
1485#if 0
1486static int
1487RIOReport(p)
1488struct rio_info * p;
1489{
1490 char * RIORelease = RIO_RELEASE;
1491 char * RIORelID = RELEASE_ID;
1492 int host;
1493
1494 rio_dprintk (RIO_DEBUG_INIT, "RIO : Release: %s ID: %s\n", RIORelease, RIORelID);
1495
1496 if ( p->RIONumHosts==0 ) {
1497 rio_dprintk (RIO_DEBUG_INIT, "\nNo Hosts configured\n");
1498 return(0);
1499 }
1500
1501 for ( host=0; host < p->RIONumHosts; host++ ) {
1502 struct Host *HostP = &p->RIOHosts[host];
1503 switch ( HostP->Type ) {
1504 case RIO_AT:
1505 rio_dprintk (RIO_DEBUG_INIT, "AT BUS : found the card at 0x%x\n", HostP->PaddrP);
1506 }
1507 }
1508 return 0;
1509}
1510#endif
1511
1512static struct rioVersion stVersion;
1513
1514struct rioVersion *
1515RIOVersid(void)
1516{
1517 strlcpy(stVersion.version, "RIO driver for linux V1.0",
1518 sizeof(stVersion.version));
1519 strlcpy(stVersion.buildDate, __DATE__,
1520 sizeof(stVersion.buildDate));
1521
1522 return &stVersion;
1523}
1524
1525#if 0
1526int
1527RIOMapin(paddr, size, vaddr)
1528paddr_t paddr;
1529int size;
1530caddr_t * vaddr;
1531{
1532 *vaddr = (caddr_t)permap( (long)paddr, size);
1533 return ((int)*vaddr);
1534}
1535
1536void
1537RIOMapout(paddr, size, vaddr)
1538paddr_t paddr;
1539long size;
1540caddr_t vaddr;
1541{
1542}
1543#endif
1544
1545
1546void
1547RIOHostReset(Type, DpRamP, Slot)
1548uint Type;
1549volatile struct DpRam *DpRamP;
1550uint Slot;
1551{
1552 /*
1553 ** Reset the Tpu
1554 */
1555 rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: type 0x%x", Type);
1556 switch ( Type ) {
1557 case RIO_AT:
1558 rio_dprintk (RIO_DEBUG_INIT, " (RIO_AT)\n");
1559 WBYTE(DpRamP->DpControl, BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
1560 INTERRUPT_DISABLE | BYTE_OPERATION |
1561 SLOW_LINKS | SLOW_AT_BUS);
1562 WBYTE(DpRamP->DpResetTpu, 0xFF);
1563 rio_udelay (3);
1564
1565 rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: Don't know if it worked. Try reset again\n");
1566 WBYTE(DpRamP->DpControl, BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
1567 INTERRUPT_DISABLE | BYTE_OPERATION |
1568 SLOW_LINKS | SLOW_AT_BUS);
1569 WBYTE(DpRamP->DpResetTpu, 0xFF);
1570 rio_udelay (3);
1571 break;
1572#ifdef FUTURE_RELEASE
1573 case RIO_EISA:
1574 /*
1575 ** Bet this doesn't work!
1576 */
1577 OUTBZ( Slot, EISA_CONTROL_PORT,
1578 EISA_TP_RUN | EISA_TP_BUS_DISABLE |
1579 EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
1580 OUTBZ( Slot, EISA_CONTROL_PORT,
1581 EISA_TP_RESET | EISA_TP_BUS_DISABLE |
1582 EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
1583 suspend( 3 );
1584 OUTBZ( Slot, EISA_CONTROL_PORT,
1585 EISA_TP_RUN | EISA_TP_BUS_DISABLE |
1586 EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
1587 break;
1588 case RIO_MCA:
1589 WBYTE(DpRamP->DpControl , McaTpBootFromRam | McaTpBusDisable );
1590 WBYTE(DpRamP->DpResetTpu , 0xFF );
1591 suspend( 3 );
1592 WBYTE(DpRamP->DpControl , McaTpBootFromRam | McaTpBusDisable );
1593 WBYTE(DpRamP->DpResetTpu , 0xFF );
1594 suspend( 3 );
1595 break;
1596#endif
1597 case RIO_PCI:
1598 rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n");
1599 DpRamP->DpControl = RIO_PCI_BOOT_FROM_RAM;
1600 DpRamP->DpResetInt = 0xFF;
1601 DpRamP->DpResetTpu = 0xFF;
1602 rio_udelay (100);
1603 /* for (i=0; i<6000; i++); */
1604 /* suspend( 3 ); */
1605 break;
1606#ifdef FUTURE_RELEASE
1607 default:
1608 Rprintf(RIOMesgNoSupport,Type,DpRamP,Slot);
1609 return;
1610#endif
1611
1612 default:
1613 rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n");
1614 break;
1615 }
1616 return;
1617}