blob: ee66855222b10ec05667ce35d882de498e9450dc [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Instruction formats for the sequencer program downloaded to
3 * Aic7xxx SCSI host adapters
4 *
5 * Copyright (c) 1997, 1998 Justin T. Gibbs.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions, and the following disclaimer,
13 * without modification, immediately at the beginning of the file.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * Where this Software is combined with software released under the terms of
18 * the GNU General Public License ("GPL") and the terms of the GPL would require the
19 * combined work to also be released under the terms of the GPL, the terms
20 * and conditions of this License will apply in addition to those of the
21 * GPL with the exception of any terms or conditions of this License that
22 * conflict with, or are expressly prohibited by, the GPL.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * $Id: sequencer.h,v 1.3 1997/09/27 19:37:31 gibbs Exp $
37 */
38
39#ifdef __LITTLE_ENDIAN_BITFIELD
40struct ins_format1 {
41 unsigned int
42 immediate : 8,
43 source : 9,
44 destination : 9,
45 ret : 1,
46 opcode : 4,
47 parity : 1;
48};
49
50struct ins_format2 {
51 unsigned int
52 shift_control : 8,
53 source : 9,
54 destination : 9,
55 ret : 1,
56 opcode : 4,
57 parity : 1;
58};
59
60struct ins_format3 {
61 unsigned int
62 immediate : 8,
63 source : 9,
64 address : 10,
65 opcode : 4,
66 parity : 1;
67};
68#elif defined(__BIG_ENDIAN_BITFIELD)
69struct ins_format1 {
70 unsigned int
71 parity : 1,
72 opcode : 4,
73 ret : 1,
74 destination : 9,
75 source : 9,
76 immediate : 8;
77};
78
79struct ins_format2 {
80 unsigned int
81 parity : 1,
82 opcode : 4,
83 ret : 1,
84 destination : 9,
85 source : 9,
86 shift_control : 8;
87};
88
89struct ins_format3 {
90 unsigned int
91 parity : 1,
92 opcode : 4,
93 address : 10,
94 source : 9,
95 immediate : 8;
96};
97#endif
98
99union ins_formats {
100 struct ins_format1 format1;
101 struct ins_format2 format2;
102 struct ins_format3 format3;
103 unsigned char bytes[4];
104 unsigned int integer;
105};
106struct instruction {
107 union ins_formats format;
108 unsigned int srcline;
109 struct symbol *patch_label;
110 struct {
111 struct instruction *stqe_next;
112 } links;
113};
114
115#define AIC_OP_OR 0x0
116#define AIC_OP_AND 0x1
117#define AIC_OP_XOR 0x2
118#define AIC_OP_ADD 0x3
119#define AIC_OP_ADC 0x4
120#define AIC_OP_ROL 0x5
121#define AIC_OP_BMOV 0x6
122
123#define AIC_OP_JMP 0x8
124#define AIC_OP_JC 0x9
125#define AIC_OP_JNC 0xa
126#define AIC_OP_CALL 0xb
127#define AIC_OP_JNE 0xc
128#define AIC_OP_JNZ 0xd
129#define AIC_OP_JE 0xe
130#define AIC_OP_JZ 0xf
131
132/* Pseudo Ops */
133#define AIC_OP_SHL 0x10
134#define AIC_OP_SHR 0x20
135#define AIC_OP_ROR 0x30