blob: c4bcdbf338a26e02a8fbe865619ed66dc3c1a414 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * DTC controller, taken from T128 driver by...
3 * Copyright 1993, Drew Eckhardt
4 * Visionary Computing
5 * (Unix and Linux consulting and custom programming)
6 * drew@colorado.edu
7 * +1 (303) 440-4894
8 *
9 * DISTRIBUTION RELEASE 2.
10 *
11 * For more information, please consult
12 *
13 *
14 *
15 * and
16 *
17 * NCR 5380 Family
18 * SCSI Protocol Controller
19 * Databook
20 *
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
24 * 1+ (719) 578-3400
25 * 1+ (800) 334-5454
26 */
27
28#ifndef DTC3280_H
29#define DTC3280_H
30
31static int dtc_abort(Scsi_Cmnd *);
32static int dtc_biosparam(struct scsi_device *, struct block_device *,
33 sector_t, int*);
34static int dtc_detect(Scsi_Host_Template *);
35static int dtc_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
36static int dtc_bus_reset(Scsi_Cmnd *);
37static int dtc_device_reset(Scsi_Cmnd *);
38static int dtc_host_reset(Scsi_Cmnd *);
39
40#ifndef CMD_PER_LUN
41#define CMD_PER_LUN 2
42#endif
43
44#ifndef CAN_QUEUE
45#define CAN_QUEUE 32
46#endif
47
48#define NCR5380_implementation_fields \
49 void __iomem *base
50
51#define NCR5380_local_declare() \
52 void __iomem *base
53
54#define NCR5380_setup(instance) \
55 base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base
56
57#define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
58
59#define dbNCR5380_read(reg) \
60 (rval=readb(DTC_address(reg)), \
61 (((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\
62 , (reg), DTC_address(reg), rval)), rval ) )
63
64#define dbNCR5380_write(reg, value) do { \
65 printk("DTC : write %02x to register %d at address %p\n", \
66 (value), (reg), DTC_address(reg)); \
67 writeb(value, DTC_address(reg));} while(0)
68
69
70#if !(DTCDEBUG & DTCDEBUG_TRANSFER)
71#define NCR5380_read(reg) (readb(DTC_address(reg)))
72#define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
73#else
74#define NCR5380_read(reg) (readb(DTC_address(reg)))
75#define xNCR5380_read(reg) \
76 (((unsigned char) printk("DTC : read register %d at address %p\n"\
77 , (reg), DTC_address(reg))), readb(DTC_address(reg)))
78
79#define NCR5380_write(reg, value) do { \
80 printk("DTC : write %02x to register %d at address %p\n", \
81 (value), (reg), DTC_address(reg)); \
82 writeb(value, DTC_address(reg));} while(0)
83#endif
84
85#define NCR5380_intr dtc_intr
86#define NCR5380_queue_command dtc_queue_command
87#define NCR5380_abort dtc_abort
88#define NCR5380_bus_reset dtc_bus_reset
89#define NCR5380_device_reset dtc_device_reset
90#define NCR5380_host_reset dtc_host_reset
91#define NCR5380_proc_info dtc_proc_info
92
93/* 15 12 11 10
94 1001 1100 0000 0000 */
95
96#define DTC_IRQS 0x9c00
97
98
99#endif /* DTC3280_H */