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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/include/asm-arm/arch-omap/board-perseus2.h
3 *
4 * Copyright 2003 by Texas Instruments Incorporated
5 * OMAP730 / Perseus2 support by Jean Pihet
6 *
7 * Copyright (C) 2001 RidgeRun, Inc. (http://www.ridgerun.com)
8 * Author: RidgeRun, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#ifndef __ASM_ARCH_OMAP_PERSEUS2_H
31#define __ASM_ARCH_OMAP_PERSEUS2_H
32
33#include <asm/arch/fpga.h>
34
35#ifndef OMAP_SDRAM_DEVICE
36#define OMAP_SDRAM_DEVICE D256M_1X16_4B
37#endif
38
39/*
40 * These definitions define an area of FLASH set aside
41 * for the use of MTD/JFFS2. This is the area of flash
42 * that a JFFS2 filesystem will reside which is mounted
43 * at boot with the "root=/dev/mtdblock/0 rw"
44 * command line option.
45 */
46
47/* Intel flash_0, partitioned as expected by rrload */
48#define OMAP_FLASH_0_BASE 0xD8000000 /* VA */
49#define OMAP_FLASH_0_START 0x00000000 /* PA */
50#define OMAP_FLASH_0_SIZE SZ_32M
51
52#define MAXIRQNUM IH_BOARD_BASE
53#define MAXFIQNUM MAXIRQNUM
54#define MAXSWINUM MAXIRQNUM
55
56#define NR_IRQS (MAXIRQNUM + 1)
57
58#endif