| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | #ifndef AGP_H |
| 2 | #define AGP_H 1 |
| 3 | |
| 4 | #include <asm/pgtable.h> |
| 5 | #include <asm/cacheflush.h> |
| 6 | |
| 7 | /* |
| 8 | * Functions to keep the agpgart mappings coherent with the MMU. |
| 9 | * The GART gives the CPU a physical alias of pages in memory. The alias region is |
| 10 | * mapped uncacheable. Make sure there are no conflicting mappings |
| 11 | * with different cachability attributes for the same page. This avoids |
| 12 | * data corruption on some CPUs. |
| 13 | */ |
| 14 | |
| 15 | int map_page_into_agp(struct page *page); |
| 16 | int unmap_page_from_agp(struct page *page); |
| 17 | #define flush_agp_mappings() global_flush_tlb() |
| 18 | |
| 19 | /* Could use CLFLUSH here if the cpu supports it. But then it would |
| 20 | need to be called for each cacheline of the whole page so it may not be |
| 21 | worth it. Would need a page for it. */ |
| 22 | #define flush_agp_cache() asm volatile("wbinvd":::"memory") |
| 23 | |
| 24 | #endif |