Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * ItLpNaca.h |
| 3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | #ifndef _ITLPNACA_H |
| 20 | #define _ITLPNACA_H |
| 21 | |
| 22 | //============================================================================= |
| 23 | // |
| 24 | // This control block contains the data that is shared between the |
| 25 | // hypervisor (PLIC) and the OS. |
| 26 | // |
| 27 | //============================================================================= |
| 28 | |
| 29 | struct ItLpNaca |
| 30 | { |
| 31 | //============================================================================= |
| 32 | // CACHE_LINE_1 0x0000 - 0x007F Contains read-only data |
| 33 | //============================================================================= |
| 34 | u32 xDesc; // Eye catcher x00-x03 |
| 35 | u16 xSize; // Size of this class x04-x05 |
| 36 | u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07 |
| 37 | u8 xMaxIntHdlrEntries; // Number of entries in array x08-x08 |
| 38 | u8 xPrimaryLpIndex; // LP Index of Primary x09-x09 |
| 39 | u8 xServiceLpIndex; // LP Ind of Service Focal Pointx0A-x0A |
| 40 | u8 xLpIndex; // LP Index x0B-x0B |
| 41 | u16 xMaxLpQueues; // Number of allocated queues x0C-x0D |
| 42 | u16 xLpQueueOffset; // Offset to start of LP queues x0E-x0F |
| 43 | u8 xPirEnvironMode:8; // Piranha or hardware x10-x10 |
| 44 | u8 xPirConsoleMode:8; // Piranha console indicator x11-x11 |
| 45 | u8 xPirDasdMode:8; // Piranha dasd indicator x12-x12 |
| 46 | u8 xRsvd1_0[5]; // Reserved for Piranha related x13-x17 |
| 47 | u8 xLparInstalled:1; // Is LPAR installed on system x18-x1F |
| 48 | u8 xSysPartitioned:1; // Is the system partitioned ... |
| 49 | u8 xHwSyncedTBs:1; // Hardware synced TBs ... |
| 50 | u8 xIntProcUtilHmt:1; // Utilize HMT for interrupts ... |
| 51 | u8 xRsvd1_1:4; // Reserved ... |
| 52 | u8 xSpVpdFormat:8; // VPD areas are in CSP format ... |
| 53 | u8 xIntProcRatio:8; // Ratio of int procs to procs ... |
| 54 | u8 xRsvd1_2[5]; // Reserved ... |
| 55 | u16 xRsvd1_3; // Reserved x20-x21 |
| 56 | u16 xPlicVrmIndex; // VRM index of PLIC x22-x23 |
| 57 | u16 xMinSupportedSlicVrmInd;// Min supported OS VRM index x24-x25 |
| 58 | u16 xMinCompatableSlicVrmInd;// Min compatible OS VRM index x26-x27 |
| 59 | u64 xLoadAreaAddr; // ER address of load area x28-x2F |
| 60 | u32 xLoadAreaChunks; // Chunks for the load area x30-x33 |
| 61 | u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37 |
| 62 | // doing an ASR switch on PASE |
| 63 | // system call. |
| 64 | u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f |
| 65 | u8 xRsvd1_4[64]; // x40-x7F |
| 66 | |
| 67 | //============================================================================= |
| 68 | // CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data |
| 69 | //============================================================================= |
| 70 | u8 xRsvd2_0[128]; // Reserved x00-x7F |
| 71 | |
| 72 | //============================================================================= |
| 73 | // CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators |
| 74 | // NB: Padding required to keep xInterrruptHdlr at x300 which is required |
| 75 | // for v4r4 PLIC. |
| 76 | //============================================================================= |
| 77 | u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F |
| 78 | u8 xRsvd3_0[384]; // Reserved 180-2FF |
| 79 | //============================================================================= |
| 80 | // CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt |
| 81 | // handlers |
| 82 | //============================================================================= |
| 83 | u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF |
| 84 | }; |
| 85 | |
| 86 | //============================================================================= |
| 87 | |
| 88 | #endif /* _ITLPNACA_H */ |