blob: 694f51f47941f551b8fef9e3c1fdc8ff99f7ee56 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-sh/ubc.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#ifndef __ASM_SH_UBC_H
12#define __ASM_SH_UBC_H
13#ifdef __KERNEL__
14
15#include <asm/cpu/ubc.h>
16
17/* User Break Controller */
18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
19 defined(CONFIG_CPU_SUBTYPE_SH7300)
20#define UBC_TYPE_SH7729 (cpu_data->type == CPU_SH7729)
21#else
22#define UBC_TYPE_SH7729 0
23#endif
24
25#define BAMR_ASID (1 << 2)
26#define BAMR_NONE 0
27#define BAMR_10 0x1
28#define BAMR_12 0x2
29#define BAMR_ALL 0x3
30#define BAMR_16 0x8
31#define BAMR_20 0x9
32
33#define BBR_INST (1 << 4)
34#define BBR_DATA (2 << 4)
35#define BBR_READ (1 << 2)
36#define BBR_WRITE (2 << 2)
37#define BBR_BYTE 0x1
38#define BBR_HALF 0x2
39#define BBR_LONG 0x3
40#define BBR_QUAD (1 << 6) /* SH7750 */
41#define BBR_CPU (1 << 6) /* SH7709A,SH7729 */
42#define BBR_DMA (2 << 6) /* SH7709A,SH7729 */
43
44#define BRCR_CMFA (1 << 15)
45#define BRCR_CMFB (1 << 14)
46#define BRCR_PCTE (1 << 11)
47#define BRCR_PCBA (1 << 10) /* 1: after execution */
48#define BRCR_DBEB (1 << 7)
49#define BRCR_PCBB (1 << 6)
50#define BRCR_SEQ (1 << 3)
51#define BRCR_UBDE (1 << 0)
52
53#ifndef __ASSEMBLY__
54/* arch/sh/kernel/ubc.S */
55extern void ubc_wakeup(void);
56extern void ubc_sleep(void);
57#endif
58
59#endif /* __KERNEL__ */
60#endif /* __ASM_SH_UBC_H */