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Daniel Mack1e7ba632012-07-22 19:51:02 +02001PXA3xx NAND DT bindings
2
3Required properties:
4
5 - compatible: Should be "marvell,pxa3xx-nand"
6 - reg: The register base for the controller
7 - interrupts: The interrupt to map
8 - #address-cells: Set to <1> if the node includes partitions
9
10Optional properties:
11
12 - marvell,nand-enable-arbiter: Set to enable the bus arbiter
13 - marvell,nand-keep-config: Set to keep the NAND controller config as set
14 by the bootloader
15 - num-cs: Number of chipselect lines to usw
16
17Example:
18
19 nand0: nand@43100000 {
20 compatible = "marvell,pxa3xx-nand";
21 reg = <0x43100000 90>;
22 interrupts = <45>;
23 #address-cells = <1>;
24
25 marvell,nand-enable-arbiter;
26 marvell,nand-keep-config;
27 num-cs = <1>;
28
29 /* partitions (optional) */
30 };
31