blob: 627f16f0e9d1d393d48527e50f25c5e22c81987d [file] [log] [blame]
Shawn Guo69c31b72011-09-06 14:59:40 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/linkage.h>
14#include <linux/init.h>
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080015#include <asm/asm-offsets.h>
Shawn Guo69c31b72011-09-06 14:59:40 +080016#include <asm/hardware/cache-l2x0.h>
17
18 .section ".text.head", "ax"
Shawn Guo69c31b72011-09-06 14:59:40 +080019
Shawn Guo69c31b72011-09-06 14:59:40 +080020#ifdef CONFIG_SMP
Shawn Guo087bb282013-04-16 22:11:19 +080021diag_reg_offset:
22 .word g_diag_reg - .
23
24 .macro set_diag_reg
25 adr r0, diag_reg_offset
26 ldr r1, [r0]
27 add r1, r1, r0 @ r1 = physical &g_diag_reg
28 ldr r0, [r1]
29 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
30 .endm
31
Shawn Guo69c31b72011-09-06 14:59:40 +080032ENTRY(v7_secondary_startup)
33 bl v7_invalidate_l1
Shawn Guo087bb282013-04-16 22:11:19 +080034 set_diag_reg
Shawn Guo69c31b72011-09-06 14:59:40 +080035 b secondary_startup
36ENDPROC(v7_secondary_startup)
37#endif
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080038
Arnd Bergmanncb483892013-04-30 17:57:00 +020039#ifdef CONFIG_ARM_CPU_SUSPEND
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080040/*
Nicolas Pitreb4e61532013-02-18 23:11:30 -050041 * The following code must assume it is running from physical address
42 * where absolute virtual addresses to the data section have to be
43 * turned into relative ones.
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080044 */
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080045
Eric Miao733d1722011-12-22 11:55:01 +080046#ifdef CONFIG_CACHE_L2X0
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080047 .macro pl310_resume
Nicolas Pitreb4e61532013-02-18 23:11:30 -050048 adr r0, l2x0_saved_regs_offset
49 ldr r2, [r0]
50 add r2, r2, r0
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080051 ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
52 ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
53 str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
54 mov r1, #0x1
55 str r1, [r0, #L2X0_CTRL] @ re-enable L2
56 .endm
57
Nicolas Pitreb4e61532013-02-18 23:11:30 -050058l2x0_saved_regs_offset:
59 .word l2x0_saved_regs - .
60
Eric Miao733d1722011-12-22 11:55:01 +080061#else
62 .macro pl310_resume
63 .endm
64#endif
65
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080066ENTRY(v7_cpu_resume)
67 bl v7_invalidate_l1
68 pl310_resume
69 b cpu_resume
70ENDPROC(v7_cpu_resume)
Eric Miao46ec1b22011-12-21 22:38:23 +080071#endif