blob: e4483de84e7f5558cf0e62e7ae40eef16dd68796 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
4 *
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
6 *
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
9 *
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * Additional credits:
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
44 * endian systems.
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
49 * driver init path.
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
51 */
52
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <linux/module.h>
54#include <linux/moduleparam.h>
55#include <linux/version.h>
56#include <linux/types.h>
57#include <linux/errno.h>
58#include <linux/ioport.h>
59#include <linux/pci.h>
Domen Puncer1e7f0bd2005-06-26 18:22:14 -040060#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070061#include <linux/kernel.h>
62#include <linux/netdevice.h>
63#include <linux/etherdevice.h>
64#include <linux/skbuff.h>
65#include <linux/init.h>
66#include <linux/delay.h>
67#include <linux/mm.h>
68#include <linux/highmem.h>
69#include <linux/sockios.h>
70
71#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
72#include <linux/if_vlan.h>
73#endif
74
75#ifdef SIOCETHTOOL
76#include <linux/ethtool.h>
77#endif
78
79#include <net/sock.h>
80#include <net/ip.h>
81
82#include <asm/system.h>
83#include <asm/io.h>
84#include <asm/irq.h>
85#include <asm/byteorder.h>
86#include <asm/uaccess.h>
87
88
89#define DRV_NAME "acenic"
90
91#undef INDEX_DEBUG
92
93#ifdef CONFIG_ACENIC_OMIT_TIGON_I
94#define ACE_IS_TIGON_I(ap) 0
95#define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
96#else
97#define ACE_IS_TIGON_I(ap) (ap->version == 1)
98#define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
99#endif
100
101#ifndef PCI_VENDOR_ID_ALTEON
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400102#define PCI_VENDOR_ID_ALTEON 0x12ae
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103#endif
104#ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
105#define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
106#define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
107#endif
108#ifndef PCI_DEVICE_ID_3COM_3C985
109#define PCI_DEVICE_ID_3COM_3C985 0x0001
110#endif
111#ifndef PCI_VENDOR_ID_NETGEAR
112#define PCI_VENDOR_ID_NETGEAR 0x1385
113#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
114#endif
115#ifndef PCI_DEVICE_ID_NETGEAR_GA620T
116#define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
117#endif
118
119
120/*
121 * Farallon used the DEC vendor ID by mistake and they seem not
122 * to care - stinky!
123 */
124#ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
125#define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
126#endif
127#ifndef PCI_DEVICE_ID_FARALLON_PN9100T
128#define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
129#endif
130#ifndef PCI_VENDOR_ID_SGI
131#define PCI_VENDOR_ID_SGI 0x10a9
132#endif
133#ifndef PCI_DEVICE_ID_SGI_ACENIC
134#define PCI_DEVICE_ID_SGI_ACENIC 0x0009
135#endif
136
137static struct pci_device_id acenic_pci_tbl[] = {
138 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
139 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
140 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
141 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
142 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
143 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
144 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
145 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
146 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
147 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
148 /*
149 * Farallon used the DEC vendor ID on their cards incorrectly,
150 * then later Alteon's ID.
151 */
152 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
153 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
154 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
155 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
156 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
157 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
158 { }
159};
160MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
161
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162#define ace_sync_irq(irq) synchronize_irq(irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163
164#ifndef offset_in_page
165#define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
166#endif
167
168#define ACE_MAX_MOD_PARMS 8
169#define BOARD_IDX_STATIC 0
170#define BOARD_IDX_OVERFLOW -1
171
172#if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
173 defined(NETIF_F_HW_VLAN_RX)
174#define ACENIC_DO_VLAN 1
175#define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
176#else
177#define ACENIC_DO_VLAN 0
178#define ACE_RCB_VLAN_FLAG 0
179#endif
180
181#include "acenic.h"
182
183/*
184 * These must be defined before the firmware is included.
185 */
186#define MAX_TEXT_LEN 96*1024
187#define MAX_RODATA_LEN 8*1024
188#define MAX_DATA_LEN 2*1024
189
190#include "acenic_firmware.h"
191
192#ifndef tigon2FwReleaseLocal
193#define tigon2FwReleaseLocal 0
194#endif
195
196/*
197 * This driver currently supports Tigon I and Tigon II based cards
198 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
199 * GA620. The driver should also work on the SGI, DEC and Farallon
200 * versions of the card, however I have not been able to test that
201 * myself.
202 *
203 * This card is really neat, it supports receive hardware checksumming
204 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
205 * firmware. Also the programming interface is quite neat, except for
206 * the parts dealing with the i2c eeprom on the card ;-)
207 *
208 * Using jumbo frames:
209 *
210 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
211 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
212 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
213 * interface number and <MTU> being the MTU value.
214 *
215 * Module parameters:
216 *
217 * When compiled as a loadable module, the driver allows for a number
218 * of module parameters to be specified. The driver supports the
219 * following module parameters:
220 *
221 * trace=<val> - Firmware trace level. This requires special traced
222 * firmware to replace the firmware supplied with
223 * the driver - for debugging purposes only.
224 *
225 * link=<val> - Link state. Normally you want to use the default link
226 * parameters set by the driver. This can be used to
227 * override these in case your switch doesn't negotiate
228 * the link properly. Valid values are:
229 * 0x0001 - Force half duplex link.
230 * 0x0002 - Do not negotiate line speed with the other end.
231 * 0x0010 - 10Mbit/sec link.
232 * 0x0020 - 100Mbit/sec link.
233 * 0x0040 - 1000Mbit/sec link.
234 * 0x0100 - Do not negotiate flow control.
235 * 0x0200 - Enable RX flow control Y
236 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
237 * Default value is 0x0270, ie. enable link+flow
238 * control negotiation. Negotiating the highest
239 * possible link speed with RX flow control enabled.
240 *
241 * When disabling link speed negotiation, only one link
242 * speed is allowed to be specified!
243 *
244 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
245 * to wait for more packets to arive before
246 * interrupting the host, from the time the first
247 * packet arrives.
248 *
249 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
250 * to wait for more packets to arive in the transmit ring,
251 * before interrupting the host, after transmitting the
252 * first packet in the ring.
253 *
254 * max_tx_desc=<val> - maximum number of transmit descriptors
255 * (packets) transmitted before interrupting the host.
256 *
257 * max_rx_desc=<val> - maximum number of receive descriptors
258 * (packets) received before interrupting the host.
259 *
260 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
261 * increments of the NIC's on board memory to be used for
262 * transmit and receive buffers. For the 1MB NIC app. 800KB
263 * is available, on the 1/2MB NIC app. 300KB is available.
264 * 68KB will always be available as a minimum for both
265 * directions. The default value is a 50/50 split.
266 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
267 * operations, default (1) is to always disable this as
268 * that is what Alteon does on NT. I have not been able
269 * to measure any real performance differences with
270 * this on my systems. Set <val>=0 if you want to
271 * enable these operations.
272 *
273 * If you use more than one NIC, specify the parameters for the
274 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
275 * run tracing on NIC #2 but not on NIC #1 and #3.
276 *
277 * TODO:
278 *
279 * - Proper multicast support.
280 * - NIC dump support.
281 * - More tuning parameters.
282 *
283 * The mini ring is not used under Linux and I am not sure it makes sense
284 * to actually use it.
285 *
286 * New interrupt handler strategy:
287 *
288 * The old interrupt handler worked using the traditional method of
289 * replacing an skbuff with a new one when a packet arrives. However
290 * the rx rings do not need to contain a static number of buffer
291 * descriptors, thus it makes sense to move the memory allocation out
292 * of the main interrupt handler and do it in a bottom half handler
293 * and only allocate new buffers when the number of buffers in the
294 * ring is below a certain threshold. In order to avoid starving the
295 * NIC under heavy load it is however necessary to force allocation
296 * when hitting a minimum threshold. The strategy for alloction is as
297 * follows:
298 *
299 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
300 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
301 * the buffers in the interrupt handler
302 * RX_RING_THRES - maximum number of buffers in the rx ring
303 * RX_MINI_THRES - maximum number of buffers in the mini ring
304 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
305 *
306 * One advantagous side effect of this allocation approach is that the
307 * entire rx processing can be done without holding any spin lock
308 * since the rx rings and registers are totally independent of the tx
309 * ring and its registers. This of course includes the kmalloc's of
310 * new skb's. Thus start_xmit can run in parallel with rx processing
311 * and the memory allocation on SMP systems.
312 *
313 * Note that running the skb reallocation in a bottom half opens up
314 * another can of races which needs to be handled properly. In
315 * particular it can happen that the interrupt handler tries to run
316 * the reallocation while the bottom half is either running on another
317 * CPU or was interrupted on the same CPU. To get around this the
318 * driver uses bitops to prevent the reallocation routines from being
319 * reentered.
320 *
321 * TX handling can also be done without holding any spin lock, wheee
322 * this is fun! since tx_ret_csm is only written to by the interrupt
323 * handler. The case to be aware of is when shutting down the device
324 * and cleaning up where it is necessary to make sure that
325 * start_xmit() is not running while this is happening. Well DaveM
326 * informs me that this case is already protected against ... bye bye
327 * Mr. Spin Lock, it was nice to know you.
328 *
329 * TX interrupts are now partly disabled so the NIC will only generate
330 * TX interrupts for the number of coal ticks, not for the number of
331 * TX packets in the queue. This should reduce the number of TX only,
332 * ie. when no RX processing is done, interrupts seen.
333 */
334
335/*
336 * Threshold values for RX buffer allocation - the low water marks for
337 * when to start refilling the rings are set to 75% of the ring
338 * sizes. It seems to make sense to refill the rings entirely from the
339 * intrrupt handler once it gets below the panic threshold, that way
340 * we don't risk that the refilling is moved to another CPU when the
341 * one running the interrupt handler just got the slab code hot in its
342 * cache.
343 */
344#define RX_RING_SIZE 72
345#define RX_MINI_SIZE 64
346#define RX_JUMBO_SIZE 48
347
348#define RX_PANIC_STD_THRES 16
349#define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
350#define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
351#define RX_PANIC_MINI_THRES 12
352#define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
353#define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
354#define RX_PANIC_JUMBO_THRES 6
355#define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
356#define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
357
358
359/*
360 * Size of the mini ring entries, basically these just should be big
361 * enough to take TCP ACKs
362 */
363#define ACE_MINI_SIZE 100
364
365#define ACE_MINI_BUFSIZE ACE_MINI_SIZE
366#define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
367#define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
368
369/*
370 * There seems to be a magic difference in the effect between 995 and 996
371 * but little difference between 900 and 995 ... no idea why.
372 *
373 * There is now a default set of tuning parameters which is set, depending
374 * on whether or not the user enables Jumbo frames. It's assumed that if
375 * Jumbo frames are enabled, the user wants optimal tuning for that case.
376 */
377#define DEF_TX_COAL 400 /* 996 */
378#define DEF_TX_MAX_DESC 60 /* was 40 */
379#define DEF_RX_COAL 120 /* 1000 */
380#define DEF_RX_MAX_DESC 25
381#define DEF_TX_RATIO 21 /* 24 */
382
383#define DEF_JUMBO_TX_COAL 20
384#define DEF_JUMBO_TX_MAX_DESC 60
385#define DEF_JUMBO_RX_COAL 30
386#define DEF_JUMBO_RX_MAX_DESC 6
387#define DEF_JUMBO_TX_RATIO 21
388
389#if tigon2FwReleaseLocal < 20001118
390/*
391 * Standard firmware and early modifications duplicate
392 * IRQ load without this flag (coal timer is never reset).
393 * Note that with this flag tx_coal should be less than
394 * time to xmit full tx ring.
395 * 400usec is not so bad for tx ring size of 128.
396 */
397#define TX_COAL_INTS_ONLY 1 /* worth it */
398#else
399/*
400 * With modified firmware, this is not necessary, but still useful.
401 */
402#define TX_COAL_INTS_ONLY 1
403#endif
404
405#define DEF_TRACE 0
406#define DEF_STAT (2 * TICKS_PER_SEC)
407
408
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -0700409static int link_state[ACE_MAX_MOD_PARMS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410static int trace[ACE_MAX_MOD_PARMS];
411static int tx_coal_tick[ACE_MAX_MOD_PARMS];
412static int rx_coal_tick[ACE_MAX_MOD_PARMS];
413static int max_tx_desc[ACE_MAX_MOD_PARMS];
414static int max_rx_desc[ACE_MAX_MOD_PARMS];
415static int tx_ratio[ACE_MAX_MOD_PARMS];
416static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
417
418MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
419MODULE_LICENSE("GPL");
420MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
421
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -0700422module_param_array_named(link, link_state, int, NULL, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423module_param_array(trace, int, NULL, 0);
424module_param_array(tx_coal_tick, int, NULL, 0);
425module_param_array(max_tx_desc, int, NULL, 0);
426module_param_array(rx_coal_tick, int, NULL, 0);
427module_param_array(max_rx_desc, int, NULL, 0);
428module_param_array(tx_ratio, int, NULL, 0);
429MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
430MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
431MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
432MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
433MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
434MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
435MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
436
437
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400438static char version[] __devinitdata =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
440 " http://home.cern.ch/~jes/gige/acenic.html\n";
441
442static int ace_get_settings(struct net_device *, struct ethtool_cmd *);
443static int ace_set_settings(struct net_device *, struct ethtool_cmd *);
444static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
445
Jeff Garzik7282d492006-09-13 14:30:00 -0400446static const struct ethtool_ops ace_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 .get_settings = ace_get_settings,
448 .set_settings = ace_set_settings,
449 .get_drvinfo = ace_get_drvinfo,
450};
451
452static void ace_watchdog(struct net_device *dev);
453
454static int __devinit acenic_probe_one(struct pci_dev *pdev,
455 const struct pci_device_id *id)
456{
457 struct net_device *dev;
458 struct ace_private *ap;
459 static int boards_found;
460
461 dev = alloc_etherdev(sizeof(struct ace_private));
462 if (dev == NULL) {
463 printk(KERN_ERR "acenic: Unable to allocate "
464 "net_device structure!\n");
465 return -ENOMEM;
466 }
467
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468 SET_NETDEV_DEV(dev, &pdev->dev);
469
470 ap = dev->priv;
471 ap->pdev = pdev;
472 ap->name = pci_name(pdev);
473
474 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
475#if ACENIC_DO_VLAN
476 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
477 dev->vlan_rx_register = ace_vlan_rx_register;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478#endif
Stephen Hemminger25805dc2007-06-01 09:44:01 -0700479
480 dev->tx_timeout = &ace_watchdog;
481 dev->watchdog_timeo = 5*HZ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482
483 dev->open = &ace_open;
484 dev->stop = &ace_close;
485 dev->hard_start_xmit = &ace_start_xmit;
486 dev->get_stats = &ace_get_stats;
487 dev->set_multicast_list = &ace_set_multicast_list;
488 SET_ETHTOOL_OPS(dev, &ace_ethtool_ops);
489 dev->set_mac_address = &ace_set_mac_addr;
490 dev->change_mtu = &ace_change_mtu;
491
492 /* we only display this string ONCE */
493 if (!boards_found)
494 printk(version);
495
496 if (pci_enable_device(pdev))
497 goto fail_free_netdev;
498
499 /*
500 * Enable master mode before we start playing with the
501 * pci_command word since pci_set_master() will modify
502 * it.
503 */
504 pci_set_master(pdev);
505
506 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
507
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400508 /* OpenFirmware on Mac's does not set this - DOH.. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
510 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
511 "access - was not enabled by BIOS/Firmware\n",
512 ap->name);
513 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
514 pci_write_config_word(ap->pdev, PCI_COMMAND,
515 ap->pci_command);
516 wmb();
517 }
518
519 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
520 if (ap->pci_latency <= 0x40) {
521 ap->pci_latency = 0x40;
522 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
523 }
524
525 /*
526 * Remap the regs into kernel space - this is abuse of
527 * dev->base_addr since it was means for I/O port
528 * addresses but who gives a damn.
529 */
530 dev->base_addr = pci_resource_start(pdev, 0);
531 ap->regs = ioremap(dev->base_addr, 0x4000);
532 if (!ap->regs) {
533 printk(KERN_ERR "%s: Unable to map I/O register, "
534 "AceNIC %i will be disabled.\n",
535 ap->name, boards_found);
536 goto fail_free_netdev;
537 }
538
539 switch(pdev->vendor) {
540 case PCI_VENDOR_ID_ALTEON:
541 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
542 printk(KERN_INFO "%s: Farallon PN9100-T ",
543 ap->name);
544 } else {
545 printk(KERN_INFO "%s: Alteon AceNIC ",
546 ap->name);
547 }
548 break;
549 case PCI_VENDOR_ID_3COM:
550 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
551 break;
552 case PCI_VENDOR_ID_NETGEAR:
553 printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
554 break;
555 case PCI_VENDOR_ID_DEC:
556 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
557 printk(KERN_INFO "%s: Farallon PN9000-SX ",
558 ap->name);
559 break;
560 }
561 case PCI_VENDOR_ID_SGI:
562 printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
563 break;
564 default:
565 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
566 break;
567 }
568
569 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
David S. Millerc6387a42006-06-20 01:21:29 -0700570 printk("irq %d\n", pdev->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571
572#ifdef CONFIG_ACENIC_OMIT_TIGON_I
573 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
574 printk(KERN_ERR "%s: Driver compiled without Tigon I"
575 " support - NIC disabled\n", dev->name);
576 goto fail_uninit;
577 }
578#endif
579
580 if (ace_allocate_descriptors(dev))
581 goto fail_free_netdev;
582
583#ifdef MODULE
584 if (boards_found >= ACE_MAX_MOD_PARMS)
585 ap->board_idx = BOARD_IDX_OVERFLOW;
586 else
587 ap->board_idx = boards_found;
588#else
589 ap->board_idx = BOARD_IDX_STATIC;
590#endif
591
592 if (ace_init(dev))
593 goto fail_free_netdev;
594
595 if (register_netdev(dev)) {
596 printk(KERN_ERR "acenic: device registration failed\n");
597 goto fail_uninit;
598 }
599 ap->name = dev->name;
600
601 if (ap->pci_using_dac)
602 dev->features |= NETIF_F_HIGHDMA;
603
604 pci_set_drvdata(pdev, dev);
605
606 boards_found++;
607 return 0;
608
609 fail_uninit:
610 ace_init_cleanup(dev);
611 fail_free_netdev:
612 free_netdev(dev);
613 return -ENODEV;
614}
615
616static void __devexit acenic_remove_one(struct pci_dev *pdev)
617{
618 struct net_device *dev = pci_get_drvdata(pdev);
619 struct ace_private *ap = netdev_priv(dev);
620 struct ace_regs __iomem *regs = ap->regs;
621 short i;
622
623 unregister_netdev(dev);
624
625 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
626 if (ap->version >= 2)
627 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400628
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629 /*
630 * This clears any pending interrupts
631 */
632 writel(1, &regs->Mb0Lo);
633 readl(&regs->CpuCtrl); /* flush */
634
635 /*
636 * Make sure no other CPUs are processing interrupts
637 * on the card before the buffers are being released.
638 * Otherwise one might experience some `interesting'
639 * effects.
640 *
641 * Then release the RX buffers - jumbo buffers were
642 * already released in ace_close().
643 */
644 ace_sync_irq(dev->irq);
645
646 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
647 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
648
649 if (skb) {
650 struct ring_info *ringp;
651 dma_addr_t mapping;
652
653 ringp = &ap->skb->rx_std_skbuff[i];
654 mapping = pci_unmap_addr(ringp, mapping);
655 pci_unmap_page(ap->pdev, mapping,
656 ACE_STD_BUFSIZE,
657 PCI_DMA_FROMDEVICE);
658
659 ap->rx_std_ring[i].size = 0;
660 ap->skb->rx_std_skbuff[i].skb = NULL;
661 dev_kfree_skb(skb);
662 }
663 }
664
665 if (ap->version >= 2) {
666 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
667 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
668
669 if (skb) {
670 struct ring_info *ringp;
671 dma_addr_t mapping;
672
673 ringp = &ap->skb->rx_mini_skbuff[i];
674 mapping = pci_unmap_addr(ringp,mapping);
675 pci_unmap_page(ap->pdev, mapping,
676 ACE_MINI_BUFSIZE,
677 PCI_DMA_FROMDEVICE);
678
679 ap->rx_mini_ring[i].size = 0;
680 ap->skb->rx_mini_skbuff[i].skb = NULL;
681 dev_kfree_skb(skb);
682 }
683 }
684 }
685
686 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
687 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
688 if (skb) {
689 struct ring_info *ringp;
690 dma_addr_t mapping;
691
692 ringp = &ap->skb->rx_jumbo_skbuff[i];
693 mapping = pci_unmap_addr(ringp, mapping);
694 pci_unmap_page(ap->pdev, mapping,
695 ACE_JUMBO_BUFSIZE,
696 PCI_DMA_FROMDEVICE);
697
698 ap->rx_jumbo_ring[i].size = 0;
699 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
700 dev_kfree_skb(skb);
701 }
702 }
703
704 ace_init_cleanup(dev);
705 free_netdev(dev);
706}
707
708static struct pci_driver acenic_pci_driver = {
709 .name = "acenic",
710 .id_table = acenic_pci_tbl,
711 .probe = acenic_probe_one,
712 .remove = __devexit_p(acenic_remove_one),
713};
714
715static int __init acenic_init(void)
716{
Jeff Garzik29917622006-08-19 17:48:59 -0400717 return pci_register_driver(&acenic_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700718}
719
720static void __exit acenic_exit(void)
721{
722 pci_unregister_driver(&acenic_pci_driver);
723}
724
725module_init(acenic_init);
726module_exit(acenic_exit);
727
728static void ace_free_descriptors(struct net_device *dev)
729{
730 struct ace_private *ap = netdev_priv(dev);
731 int size;
732
733 if (ap->rx_std_ring != NULL) {
734 size = (sizeof(struct rx_desc) *
735 (RX_STD_RING_ENTRIES +
736 RX_JUMBO_RING_ENTRIES +
737 RX_MINI_RING_ENTRIES +
738 RX_RETURN_RING_ENTRIES));
739 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
740 ap->rx_ring_base_dma);
741 ap->rx_std_ring = NULL;
742 ap->rx_jumbo_ring = NULL;
743 ap->rx_mini_ring = NULL;
744 ap->rx_return_ring = NULL;
745 }
746 if (ap->evt_ring != NULL) {
747 size = (sizeof(struct event) * EVT_RING_ENTRIES);
748 pci_free_consistent(ap->pdev, size, ap->evt_ring,
749 ap->evt_ring_dma);
750 ap->evt_ring = NULL;
751 }
752 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
753 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
754 pci_free_consistent(ap->pdev, size, ap->tx_ring,
755 ap->tx_ring_dma);
756 }
757 ap->tx_ring = NULL;
758
759 if (ap->evt_prd != NULL) {
760 pci_free_consistent(ap->pdev, sizeof(u32),
761 (void *)ap->evt_prd, ap->evt_prd_dma);
762 ap->evt_prd = NULL;
763 }
764 if (ap->rx_ret_prd != NULL) {
765 pci_free_consistent(ap->pdev, sizeof(u32),
766 (void *)ap->rx_ret_prd,
767 ap->rx_ret_prd_dma);
768 ap->rx_ret_prd = NULL;
769 }
770 if (ap->tx_csm != NULL) {
771 pci_free_consistent(ap->pdev, sizeof(u32),
772 (void *)ap->tx_csm, ap->tx_csm_dma);
773 ap->tx_csm = NULL;
774 }
775}
776
777
778static int ace_allocate_descriptors(struct net_device *dev)
779{
780 struct ace_private *ap = netdev_priv(dev);
781 int size;
782
783 size = (sizeof(struct rx_desc) *
784 (RX_STD_RING_ENTRIES +
785 RX_JUMBO_RING_ENTRIES +
786 RX_MINI_RING_ENTRIES +
787 RX_RETURN_RING_ENTRIES));
788
789 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
790 &ap->rx_ring_base_dma);
791 if (ap->rx_std_ring == NULL)
792 goto fail;
793
794 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
795 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
796 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
797
798 size = (sizeof(struct event) * EVT_RING_ENTRIES);
799
800 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
801
802 if (ap->evt_ring == NULL)
803 goto fail;
804
805 /*
806 * Only allocate a host TX ring for the Tigon II, the Tigon I
807 * has to use PCI registers for this ;-(
808 */
809 if (!ACE_IS_TIGON_I(ap)) {
810 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
811
812 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
813 &ap->tx_ring_dma);
814
815 if (ap->tx_ring == NULL)
816 goto fail;
817 }
818
819 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
820 &ap->evt_prd_dma);
821 if (ap->evt_prd == NULL)
822 goto fail;
823
824 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
825 &ap->rx_ret_prd_dma);
826 if (ap->rx_ret_prd == NULL)
827 goto fail;
828
829 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
830 &ap->tx_csm_dma);
831 if (ap->tx_csm == NULL)
832 goto fail;
833
834 return 0;
835
836fail:
837 /* Clean up. */
838 ace_init_cleanup(dev);
839 return 1;
840}
841
842
843/*
844 * Generic cleanup handling data allocated during init. Used when the
845 * module is unloaded or if an error occurs during initialization
846 */
847static void ace_init_cleanup(struct net_device *dev)
848{
849 struct ace_private *ap;
850
851 ap = netdev_priv(dev);
852
853 ace_free_descriptors(dev);
854
855 if (ap->info)
856 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
857 ap->info, ap->info_dma);
Jesper Juhlb4558ea2005-10-28 16:53:13 -0400858 kfree(ap->skb);
859 kfree(ap->trace_buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700860
861 if (dev->irq)
862 free_irq(dev->irq, dev);
863
864 iounmap(ap->regs);
865}
866
867
868/*
869 * Commands are considered to be slow.
870 */
871static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
872{
873 u32 idx;
874
875 idx = readl(&regs->CmdPrd);
876
877 writel(*(u32 *)(cmd), &regs->CmdRng[idx]);
878 idx = (idx + 1) % CMD_RING_ENTRIES;
879
880 writel(idx, &regs->CmdPrd);
881}
882
883
884static int __devinit ace_init(struct net_device *dev)
885{
886 struct ace_private *ap;
887 struct ace_regs __iomem *regs;
888 struct ace_info *info = NULL;
889 struct pci_dev *pdev;
890 unsigned long myjif;
891 u64 tmp_ptr;
892 u32 tig_ver, mac1, mac2, tmp, pci_state;
893 int board_idx, ecode = 0;
894 short i;
895 unsigned char cache_size;
Joe Perches0795af52007-10-03 17:59:30 -0700896 DECLARE_MAC_BUF(mac);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700897
898 ap = netdev_priv(dev);
899 regs = ap->regs;
900
901 board_idx = ap->board_idx;
902
903 /*
904 * aman@sgi.com - its useful to do a NIC reset here to
905 * address the `Firmware not running' problem subsequent
906 * to any crashes involving the NIC
907 */
908 writel(HW_RESET | (HW_RESET << 24), &regs->HostCtrl);
909 readl(&regs->HostCtrl); /* PCI write posting */
910 udelay(5);
911
912 /*
913 * Don't access any other registers before this point!
914 */
915#ifdef __BIG_ENDIAN
916 /*
917 * This will most likely need BYTE_SWAP once we switch
918 * to using __raw_writel()
919 */
920 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
921 &regs->HostCtrl);
922#else
923 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
924 &regs->HostCtrl);
925#endif
926 readl(&regs->HostCtrl); /* PCI write posting */
927
928 /*
929 * Stop the NIC CPU and clear pending interrupts
930 */
931 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
932 readl(&regs->CpuCtrl); /* PCI write posting */
933 writel(0, &regs->Mb0Lo);
934
935 tig_ver = readl(&regs->HostCtrl) >> 28;
936
937 switch(tig_ver){
938#ifndef CONFIG_ACENIC_OMIT_TIGON_I
939 case 4:
940 case 5:
941 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
942 tig_ver, tigonFwReleaseMajor, tigonFwReleaseMinor,
943 tigonFwReleaseFix);
944 writel(0, &regs->LocalCtrl);
945 ap->version = 1;
946 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
947 break;
948#endif
949 case 6:
950 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
951 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
952 tigon2FwReleaseFix);
953 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
954 readl(&regs->CpuBCtrl); /* PCI write posting */
955 /*
956 * The SRAM bank size does _not_ indicate the amount
957 * of memory on the card, it controls the _bank_ size!
958 * Ie. a 1MB AceNIC will have two banks of 512KB.
959 */
960 writel(SRAM_BANK_512K, &regs->LocalCtrl);
961 writel(SYNC_SRAM_TIMING, &regs->MiscCfg);
962 ap->version = 2;
963 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
964 break;
965 default:
966 printk(KERN_WARNING " Unsupported Tigon version detected "
967 "(%i)\n", tig_ver);
968 ecode = -ENODEV;
969 goto init_error;
970 }
971
972 /*
973 * ModeStat _must_ be set after the SRAM settings as this change
974 * seems to corrupt the ModeStat and possible other registers.
975 * The SRAM settings survive resets and setting it to the same
976 * value a second time works as well. This is what caused the
977 * `Firmware not running' problem on the Tigon II.
978 */
979#ifdef __BIG_ENDIAN
980 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
981 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
982#else
983 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
984 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
985#endif
986 readl(&regs->ModeStat); /* PCI write posting */
987
988 mac1 = 0;
989 for(i = 0; i < 4; i++) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -0700990 int t;
Eric Sesterhenn6f9d4722006-01-20 23:32:56 +0300991
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992 mac1 = mac1 << 8;
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -0700993 t = read_eeprom_byte(dev, 0x8c+i);
994 if (t < 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700995 ecode = -EIO;
996 goto init_error;
997 } else
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -0700998 mac1 |= (t & 0xff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700999 }
1000 mac2 = 0;
1001 for(i = 4; i < 8; i++) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07001002 int t;
Eric Sesterhenn6f9d4722006-01-20 23:32:56 +03001003
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004 mac2 = mac2 << 8;
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07001005 t = read_eeprom_byte(dev, 0x8c+i);
1006 if (t < 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001007 ecode = -EIO;
1008 goto init_error;
1009 } else
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07001010 mac2 |= (t & 0xff);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011 }
1012
1013 writel(mac1, &regs->MacAddrHi);
1014 writel(mac2, &regs->MacAddrLo);
1015
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1017 dev->dev_addr[1] = mac1 & 0xff;
1018 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1019 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1020 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1021 dev->dev_addr[5] = mac2 & 0xff;
1022
Joe Perches0795af52007-10-03 17:59:30 -07001023 printk("MAC: %s\n", print_mac(mac, dev->dev_addr));
1024
Linus Torvalds1da177e2005-04-16 15:20:36 -07001025 /*
1026 * Looks like this is necessary to deal with on all architectures,
1027 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1028 * Ie. having two NICs in the machine, one will have the cache
1029 * line set at boot time, the other will not.
1030 */
1031 pdev = ap->pdev;
1032 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1033 cache_size <<= 2;
1034 if (cache_size != SMP_CACHE_BYTES) {
1035 printk(KERN_INFO " PCI cache line size set incorrectly "
1036 "(%i bytes) by BIOS/FW, ", cache_size);
1037 if (cache_size > SMP_CACHE_BYTES)
1038 printk("expecting %i\n", SMP_CACHE_BYTES);
1039 else {
1040 printk("correcting to %i\n", SMP_CACHE_BYTES);
1041 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1042 SMP_CACHE_BYTES >> 2);
1043 }
1044 }
1045
1046 pci_state = readl(&regs->PciState);
1047 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1048 "latency: %i clks\n",
1049 (pci_state & PCI_32BIT) ? 32 : 64,
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001050 (pci_state & PCI_66MHZ) ? 66 : 33,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001051 ap->pci_latency);
1052
1053 /*
1054 * Set the max DMA transfer size. Seems that for most systems
1055 * the performance is better when no MAX parameter is
1056 * set. However for systems enabling PCI write and invalidate,
1057 * DMA writes must be set to the L1 cache line size to get
1058 * optimal performance.
1059 *
1060 * The default is now to turn the PCI write and invalidate off
1061 * - that is what Alteon does for NT.
1062 */
1063 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1064 if (ap->version >= 2) {
1065 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1066 /*
1067 * Tuning parameters only supported for 8 cards
1068 */
1069 if (board_idx == BOARD_IDX_OVERFLOW ||
1070 dis_pci_mem_inval[board_idx]) {
1071 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1072 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1073 pci_write_config_word(pdev, PCI_COMMAND,
1074 ap->pci_command);
1075 printk(KERN_INFO " Disabling PCI memory "
1076 "write and invalidate\n");
1077 }
1078 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1079 printk(KERN_INFO " PCI memory write & invalidate "
1080 "enabled by BIOS, enabling counter measures\n");
1081
1082 switch(SMP_CACHE_BYTES) {
1083 case 16:
1084 tmp |= DMA_WRITE_MAX_16;
1085 break;
1086 case 32:
1087 tmp |= DMA_WRITE_MAX_32;
1088 break;
1089 case 64:
1090 tmp |= DMA_WRITE_MAX_64;
1091 break;
1092 case 128:
1093 tmp |= DMA_WRITE_MAX_128;
1094 break;
1095 default:
1096 printk(KERN_INFO " Cache line size %i not "
1097 "supported, PCI write and invalidate "
1098 "disabled\n", SMP_CACHE_BYTES);
1099 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1100 pci_write_config_word(pdev, PCI_COMMAND,
1101 ap->pci_command);
1102 }
1103 }
1104 }
1105
1106#ifdef __sparc__
1107 /*
1108 * On this platform, we know what the best dma settings
1109 * are. We use 64-byte maximum bursts, because if we
1110 * burst larger than the cache line size (or even cross
1111 * a 64byte boundary in a single burst) the UltraSparc
1112 * PCI controller will disconnect at 64-byte multiples.
1113 *
1114 * Read-multiple will be properly enabled above, and when
1115 * set will give the PCI controller proper hints about
1116 * prefetching.
1117 */
1118 tmp &= ~DMA_READ_WRITE_MASK;
1119 tmp |= DMA_READ_MAX_64;
1120 tmp |= DMA_WRITE_MAX_64;
1121#endif
1122#ifdef __alpha__
1123 tmp &= ~DMA_READ_WRITE_MASK;
1124 tmp |= DMA_READ_MAX_128;
1125 /*
1126 * All the docs say MUST NOT. Well, I did.
1127 * Nothing terrible happens, if we load wrong size.
1128 * Bit w&i still works better!
1129 */
1130 tmp |= DMA_WRITE_MAX_128;
1131#endif
1132 writel(tmp, &regs->PciState);
1133
1134#if 0
1135 /*
1136 * The Host PCI bus controller driver has to set FBB.
1137 * If all devices on that PCI bus support FBB, then the controller
1138 * can enable FBB support in the Host PCI Bus controller (or on
1139 * the PCI-PCI bridge if that applies).
1140 * -ggg
1141 */
1142 /*
1143 * I have received reports from people having problems when this
1144 * bit is enabled.
1145 */
1146 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1147 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1148 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1149 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1150 }
1151#endif
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001152
Linus Torvalds1da177e2005-04-16 15:20:36 -07001153 /*
1154 * Configure DMA attributes.
1155 */
Domen Puncer1e7f0bd2005-06-26 18:22:14 -04001156 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001157 ap->pci_using_dac = 1;
Domen Puncer1e7f0bd2005-06-26 18:22:14 -04001158 } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001159 ap->pci_using_dac = 0;
1160 } else {
1161 ecode = -ENODEV;
1162 goto init_error;
1163 }
1164
1165 /*
1166 * Initialize the generic info block and the command+event rings
1167 * and the control blocks for the transmit and receive rings
1168 * as they need to be setup once and for all.
1169 */
1170 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1171 &ap->info_dma))) {
1172 ecode = -EAGAIN;
1173 goto init_error;
1174 }
1175 ap->info = info;
1176
1177 /*
1178 * Get the memory for the skb rings.
1179 */
1180 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1181 ecode = -EAGAIN;
1182 goto init_error;
1183 }
1184
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001185 ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001186 DRV_NAME, dev);
1187 if (ecode) {
1188 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1189 DRV_NAME, pdev->irq);
1190 goto init_error;
1191 } else
1192 dev->irq = pdev->irq;
1193
1194#ifdef INDEX_DEBUG
1195 spin_lock_init(&ap->debug_lock);
1196 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1197 ap->last_std_rx = 0;
1198 ap->last_mini_rx = 0;
1199#endif
1200
1201 memset(ap->info, 0, sizeof(struct ace_info));
1202 memset(ap->skb, 0, sizeof(struct ace_skb));
1203
1204 ace_load_firmware(dev);
1205 ap->fw_running = 0;
1206
1207 tmp_ptr = ap->info_dma;
1208 writel(tmp_ptr >> 32, &regs->InfoPtrHi);
1209 writel(tmp_ptr & 0xffffffff, &regs->InfoPtrLo);
1210
1211 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1212
1213 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1214 info->evt_ctrl.flags = 0;
1215
1216 *(ap->evt_prd) = 0;
1217 wmb();
1218 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1219 writel(0, &regs->EvtCsm);
1220
1221 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1222 info->cmd_ctrl.flags = 0;
1223 info->cmd_ctrl.max_len = 0;
1224
1225 for (i = 0; i < CMD_RING_ENTRIES; i++)
1226 writel(0, &regs->CmdRng[i]);
1227
1228 writel(0, &regs->CmdPrd);
1229 writel(0, &regs->CmdCsm);
1230
1231 tmp_ptr = ap->info_dma;
1232 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1233 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1234
1235 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1236 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1237 info->rx_std_ctrl.flags =
1238 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1239
1240 memset(ap->rx_std_ring, 0,
1241 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1242
1243 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1244 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1245
1246 ap->rx_std_skbprd = 0;
1247 atomic_set(&ap->cur_rx_bufs, 0);
1248
1249 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1250 (ap->rx_ring_base_dma +
1251 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1252 info->rx_jumbo_ctrl.max_len = 0;
1253 info->rx_jumbo_ctrl.flags =
1254 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1255
1256 memset(ap->rx_jumbo_ring, 0,
1257 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1258
1259 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1260 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1261
1262 ap->rx_jumbo_skbprd = 0;
1263 atomic_set(&ap->cur_jumbo_bufs, 0);
1264
1265 memset(ap->rx_mini_ring, 0,
1266 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1267
1268 if (ap->version >= 2) {
1269 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1270 (ap->rx_ring_base_dma +
1271 (sizeof(struct rx_desc) *
1272 (RX_STD_RING_ENTRIES +
1273 RX_JUMBO_RING_ENTRIES))));
1274 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001275 info->rx_mini_ctrl.flags =
Linus Torvalds1da177e2005-04-16 15:20:36 -07001276 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1277
1278 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1279 ap->rx_mini_ring[i].flags =
1280 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1281 } else {
1282 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1283 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1284 info->rx_mini_ctrl.max_len = 0;
1285 }
1286
1287 ap->rx_mini_skbprd = 0;
1288 atomic_set(&ap->cur_mini_bufs, 0);
1289
1290 set_aceaddr(&info->rx_return_ctrl.rngptr,
1291 (ap->rx_ring_base_dma +
1292 (sizeof(struct rx_desc) *
1293 (RX_STD_RING_ENTRIES +
1294 RX_JUMBO_RING_ENTRIES +
1295 RX_MINI_RING_ENTRIES))));
1296 info->rx_return_ctrl.flags = 0;
1297 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1298
1299 memset(ap->rx_return_ring, 0,
1300 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1301
1302 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1303 *(ap->rx_ret_prd) = 0;
1304
1305 writel(TX_RING_BASE, &regs->WinBase);
1306
1307 if (ACE_IS_TIGON_I(ap)) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07001308 ap->tx_ring = (__force struct tx_desc *) regs->Window;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001309 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001310 * sizeof(struct tx_desc)) / sizeof(u32); i++)
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07001311 writel(0, (__force void __iomem *)ap->tx_ring + i * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001312
1313 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1314 } else {
1315 memset(ap->tx_ring, 0,
1316 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1317
1318 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1319 }
1320
1321 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1322 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1323
1324 /*
1325 * The Tigon I does not like having the TX ring in host memory ;-(
1326 */
1327 if (!ACE_IS_TIGON_I(ap))
1328 tmp |= RCB_FLG_TX_HOST_RING;
1329#if TX_COAL_INTS_ONLY
1330 tmp |= RCB_FLG_COAL_INT_ONLY;
1331#endif
1332 info->tx_ctrl.flags = tmp;
1333
1334 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1335
1336 /*
1337 * Potential item for tuning parameter
1338 */
1339#if 0 /* NO */
1340 writel(DMA_THRESH_16W, &regs->DmaReadCfg);
1341 writel(DMA_THRESH_16W, &regs->DmaWriteCfg);
1342#else
1343 writel(DMA_THRESH_8W, &regs->DmaReadCfg);
1344 writel(DMA_THRESH_8W, &regs->DmaWriteCfg);
1345#endif
1346
1347 writel(0, &regs->MaskInt);
1348 writel(1, &regs->IfIdx);
1349#if 0
1350 /*
1351 * McKinley boxes do not like us fiddling with AssistState
1352 * this early
1353 */
1354 writel(1, &regs->AssistState);
1355#endif
1356
1357 writel(DEF_STAT, &regs->TuneStatTicks);
1358 writel(DEF_TRACE, &regs->TuneTrace);
1359
1360 ace_set_rxtx_parms(dev, 0);
1361
1362 if (board_idx == BOARD_IDX_OVERFLOW) {
1363 printk(KERN_WARNING "%s: more than %i NICs detected, "
1364 "ignoring module parameters!\n",
1365 ap->name, ACE_MAX_MOD_PARMS);
1366 } else if (board_idx >= 0) {
1367 if (tx_coal_tick[board_idx])
1368 writel(tx_coal_tick[board_idx],
1369 &regs->TuneTxCoalTicks);
1370 if (max_tx_desc[board_idx])
1371 writel(max_tx_desc[board_idx], &regs->TuneMaxTxDesc);
1372
1373 if (rx_coal_tick[board_idx])
1374 writel(rx_coal_tick[board_idx],
1375 &regs->TuneRxCoalTicks);
1376 if (max_rx_desc[board_idx])
1377 writel(max_rx_desc[board_idx], &regs->TuneMaxRxDesc);
1378
1379 if (trace[board_idx])
1380 writel(trace[board_idx], &regs->TuneTrace);
1381
1382 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1383 writel(tx_ratio[board_idx], &regs->TxBufRat);
1384 }
1385
1386 /*
1387 * Default link parameters
1388 */
1389 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1390 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1391 if(ap->version >= 2)
1392 tmp |= LNK_TX_FLOW_CTL_Y;
1393
1394 /*
1395 * Override link default parameters
1396 */
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07001397 if ((board_idx >= 0) && link_state[board_idx]) {
1398 int option = link_state[board_idx];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001399
1400 tmp = LNK_ENABLE;
1401
1402 if (option & 0x01) {
1403 printk(KERN_INFO "%s: Setting half duplex link\n",
1404 ap->name);
1405 tmp &= ~LNK_FULL_DUPLEX;
1406 }
1407 if (option & 0x02)
1408 tmp &= ~LNK_NEGOTIATE;
1409 if (option & 0x10)
1410 tmp |= LNK_10MB;
1411 if (option & 0x20)
1412 tmp |= LNK_100MB;
1413 if (option & 0x40)
1414 tmp |= LNK_1000MB;
1415 if ((option & 0x70) == 0) {
1416 printk(KERN_WARNING "%s: No media speed specified, "
1417 "forcing auto negotiation\n", ap->name);
1418 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1419 LNK_100MB | LNK_10MB;
1420 }
1421 if ((option & 0x100) == 0)
1422 tmp |= LNK_NEG_FCTL;
1423 else
1424 printk(KERN_INFO "%s: Disabling flow control "
1425 "negotiation\n", ap->name);
1426 if (option & 0x200)
1427 tmp |= LNK_RX_FLOW_CTL_Y;
1428 if ((option & 0x400) && (ap->version >= 2)) {
1429 printk(KERN_INFO "%s: Enabling TX flow control\n",
1430 ap->name);
1431 tmp |= LNK_TX_FLOW_CTL_Y;
1432 }
1433 }
1434
1435 ap->link = tmp;
1436 writel(tmp, &regs->TuneLink);
1437 if (ap->version >= 2)
1438 writel(tmp, &regs->TuneFastLink);
1439
1440 if (ACE_IS_TIGON_I(ap))
1441 writel(tigonFwStartAddr, &regs->Pc);
1442 if (ap->version == 2)
1443 writel(tigon2FwStartAddr, &regs->Pc);
1444
1445 writel(0, &regs->Mb0Lo);
1446
1447 /*
1448 * Set tx_csm before we start receiving interrupts, otherwise
1449 * the interrupt handler might think it is supposed to process
1450 * tx ints before we are up and running, which may cause a null
1451 * pointer access in the int handler.
1452 */
1453 ap->cur_rx = 0;
1454 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1455
1456 wmb();
1457 ace_set_txprd(regs, ap, 0);
1458 writel(0, &regs->RxRetCsm);
1459
Linus Torvalds1da177e2005-04-16 15:20:36 -07001460 /*
1461 * Enable DMA engine now.
1462 * If we do this sooner, Mckinley box pukes.
1463 * I assume it's because Tigon II DMA engine wants to check
1464 * *something* even before the CPU is started.
1465 */
1466 writel(1, &regs->AssistState); /* enable DMA */
1467
1468 /*
1469 * Start the NIC CPU
1470 */
1471 writel(readl(&regs->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), &regs->CpuCtrl);
1472 readl(&regs->CpuCtrl);
1473
1474 /*
1475 * Wait for the firmware to spin up - max 3 seconds.
1476 */
1477 myjif = jiffies + 3 * HZ;
1478 while (time_before(jiffies, myjif) && !ap->fw_running)
1479 cpu_relax();
1480
1481 if (!ap->fw_running) {
1482 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1483
1484 ace_dump_trace(ap);
1485 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
1486 readl(&regs->CpuCtrl);
1487
1488 /* aman@sgi.com - account for badly behaving firmware/NIC:
1489 * - have observed that the NIC may continue to generate
1490 * interrupts for some reason; attempt to stop it - halt
1491 * second CPU for Tigon II cards, and also clear Mb0
1492 * - if we're a module, we'll fail to load if this was
1493 * the only GbE card in the system => if the kernel does
1494 * see an interrupt from the NIC, code to handle it is
1495 * gone and OOps! - so free_irq also
1496 */
1497 if (ap->version >= 2)
1498 writel(readl(&regs->CpuBCtrl) | CPU_HALT,
1499 &regs->CpuBCtrl);
1500 writel(0, &regs->Mb0Lo);
1501 readl(&regs->Mb0Lo);
1502
1503 ecode = -EBUSY;
1504 goto init_error;
1505 }
1506
1507 /*
1508 * We load the ring here as there seem to be no way to tell the
1509 * firmware to wipe the ring without re-initializing it.
1510 */
1511 if (!test_and_set_bit(0, &ap->std_refill_busy))
1512 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1513 else
1514 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1515 ap->name);
1516 if (ap->version >= 2) {
1517 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1518 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1519 else
1520 printk(KERN_ERR "%s: Someone is busy refilling "
1521 "the RX mini ring\n", ap->name);
1522 }
1523 return 0;
1524
1525 init_error:
1526 ace_init_cleanup(dev);
1527 return ecode;
1528}
1529
1530
1531static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1532{
1533 struct ace_private *ap = netdev_priv(dev);
1534 struct ace_regs __iomem *regs = ap->regs;
1535 int board_idx = ap->board_idx;
1536
1537 if (board_idx >= 0) {
1538 if (!jumbo) {
1539 if (!tx_coal_tick[board_idx])
1540 writel(DEF_TX_COAL, &regs->TuneTxCoalTicks);
1541 if (!max_tx_desc[board_idx])
1542 writel(DEF_TX_MAX_DESC, &regs->TuneMaxTxDesc);
1543 if (!rx_coal_tick[board_idx])
1544 writel(DEF_RX_COAL, &regs->TuneRxCoalTicks);
1545 if (!max_rx_desc[board_idx])
1546 writel(DEF_RX_MAX_DESC, &regs->TuneMaxRxDesc);
1547 if (!tx_ratio[board_idx])
1548 writel(DEF_TX_RATIO, &regs->TxBufRat);
1549 } else {
1550 if (!tx_coal_tick[board_idx])
1551 writel(DEF_JUMBO_TX_COAL,
1552 &regs->TuneTxCoalTicks);
1553 if (!max_tx_desc[board_idx])
1554 writel(DEF_JUMBO_TX_MAX_DESC,
1555 &regs->TuneMaxTxDesc);
1556 if (!rx_coal_tick[board_idx])
1557 writel(DEF_JUMBO_RX_COAL,
1558 &regs->TuneRxCoalTicks);
1559 if (!max_rx_desc[board_idx])
1560 writel(DEF_JUMBO_RX_MAX_DESC,
1561 &regs->TuneMaxRxDesc);
1562 if (!tx_ratio[board_idx])
1563 writel(DEF_JUMBO_TX_RATIO, &regs->TxBufRat);
1564 }
1565 }
1566}
1567
1568
1569static void ace_watchdog(struct net_device *data)
1570{
1571 struct net_device *dev = data;
1572 struct ace_private *ap = netdev_priv(dev);
1573 struct ace_regs __iomem *regs = ap->regs;
1574
1575 /*
1576 * We haven't received a stats update event for more than 2.5
1577 * seconds and there is data in the transmit queue, thus we
1578 * asume the card is stuck.
1579 */
1580 if (*ap->tx_csm != ap->tx_ret_csm) {
1581 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1582 dev->name, (unsigned int)readl(&regs->HostCtrl));
1583 /* This can happen due to ieee flow control. */
1584 } else {
1585 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1586 dev->name);
1587#if 0
1588 netif_wake_queue(dev);
1589#endif
1590 }
1591}
1592
1593
1594static void ace_tasklet(unsigned long dev)
1595{
1596 struct ace_private *ap = netdev_priv((struct net_device *)dev);
1597 int cur_size;
1598
1599 cur_size = atomic_read(&ap->cur_rx_bufs);
1600 if ((cur_size < RX_LOW_STD_THRES) &&
1601 !test_and_set_bit(0, &ap->std_refill_busy)) {
1602#ifdef DEBUG
1603 printk("refilling buffers (current %i)\n", cur_size);
1604#endif
1605 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1606 }
1607
1608 if (ap->version >= 2) {
1609 cur_size = atomic_read(&ap->cur_mini_bufs);
1610 if ((cur_size < RX_LOW_MINI_THRES) &&
1611 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1612#ifdef DEBUG
1613 printk("refilling mini buffers (current %i)\n",
1614 cur_size);
1615#endif
1616 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1617 }
1618 }
1619
1620 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1621 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1622 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1623#ifdef DEBUG
1624 printk("refilling jumbo buffers (current %i)\n", cur_size);
1625#endif
1626 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1627 }
1628 ap->tasklet_pending = 0;
1629}
1630
1631
1632/*
1633 * Copy the contents of the NIC's trace buffer to kernel memory.
1634 */
1635static void ace_dump_trace(struct ace_private *ap)
1636{
1637#if 0
1638 if (!ap->trace_buf)
1639 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1640 return;
1641#endif
1642}
1643
1644
1645/*
1646 * Load the standard rx ring.
1647 *
1648 * Loading rings is safe without holding the spin lock since this is
1649 * done only before the device is enabled, thus no interrupts are
1650 * generated and by the interrupt handler/tasklet handler.
1651 */
1652static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1653{
1654 struct ace_regs __iomem *regs = ap->regs;
1655 short i, idx;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001656
Linus Torvalds1da177e2005-04-16 15:20:36 -07001657
1658 prefetchw(&ap->cur_rx_bufs);
1659
1660 idx = ap->rx_std_skbprd;
1661
1662 for (i = 0; i < nr_bufs; i++) {
1663 struct sk_buff *skb;
1664 struct rx_desc *rd;
1665 dma_addr_t mapping;
1666
1667 skb = alloc_skb(ACE_STD_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1668 if (!skb)
1669 break;
1670
1671 skb_reserve(skb, NET_IP_ALIGN);
1672 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1673 offset_in_page(skb->data),
1674 ACE_STD_BUFSIZE,
1675 PCI_DMA_FROMDEVICE);
1676 ap->skb->rx_std_skbuff[idx].skb = skb;
1677 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1678 mapping, mapping);
1679
1680 rd = &ap->rx_std_ring[idx];
1681 set_aceaddr(&rd->addr, mapping);
1682 rd->size = ACE_STD_BUFSIZE;
1683 rd->idx = idx;
1684 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1685 }
1686
1687 if (!i)
1688 goto error_out;
1689
1690 atomic_add(i, &ap->cur_rx_bufs);
1691 ap->rx_std_skbprd = idx;
1692
1693 if (ACE_IS_TIGON_I(ap)) {
1694 struct cmd cmd;
1695 cmd.evt = C_SET_RX_PRD_IDX;
1696 cmd.code = 0;
1697 cmd.idx = ap->rx_std_skbprd;
1698 ace_issue_cmd(regs, &cmd);
1699 } else {
1700 writel(idx, &regs->RxStdPrd);
1701 wmb();
1702 }
1703
1704 out:
1705 clear_bit(0, &ap->std_refill_busy);
1706 return;
1707
1708 error_out:
1709 printk(KERN_INFO "Out of memory when allocating "
1710 "standard receive buffers\n");
1711 goto out;
1712}
1713
1714
1715static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1716{
1717 struct ace_regs __iomem *regs = ap->regs;
1718 short i, idx;
1719
1720 prefetchw(&ap->cur_mini_bufs);
1721
1722 idx = ap->rx_mini_skbprd;
1723 for (i = 0; i < nr_bufs; i++) {
1724 struct sk_buff *skb;
1725 struct rx_desc *rd;
1726 dma_addr_t mapping;
1727
1728 skb = alloc_skb(ACE_MINI_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1729 if (!skb)
1730 break;
1731
1732 skb_reserve(skb, NET_IP_ALIGN);
1733 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1734 offset_in_page(skb->data),
1735 ACE_MINI_BUFSIZE,
1736 PCI_DMA_FROMDEVICE);
1737 ap->skb->rx_mini_skbuff[idx].skb = skb;
1738 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1739 mapping, mapping);
1740
1741 rd = &ap->rx_mini_ring[idx];
1742 set_aceaddr(&rd->addr, mapping);
1743 rd->size = ACE_MINI_BUFSIZE;
1744 rd->idx = idx;
1745 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1746 }
1747
1748 if (!i)
1749 goto error_out;
1750
1751 atomic_add(i, &ap->cur_mini_bufs);
1752
1753 ap->rx_mini_skbprd = idx;
1754
1755 writel(idx, &regs->RxMiniPrd);
1756 wmb();
1757
1758 out:
1759 clear_bit(0, &ap->mini_refill_busy);
1760 return;
1761 error_out:
1762 printk(KERN_INFO "Out of memory when allocating "
1763 "mini receive buffers\n");
1764 goto out;
1765}
1766
1767
1768/*
1769 * Load the jumbo rx ring, this may happen at any time if the MTU
1770 * is changed to a value > 1500.
1771 */
1772static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1773{
1774 struct ace_regs __iomem *regs = ap->regs;
1775 short i, idx;
1776
1777 idx = ap->rx_jumbo_skbprd;
1778
1779 for (i = 0; i < nr_bufs; i++) {
1780 struct sk_buff *skb;
1781 struct rx_desc *rd;
1782 dma_addr_t mapping;
1783
1784 skb = alloc_skb(ACE_JUMBO_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1785 if (!skb)
1786 break;
1787
1788 skb_reserve(skb, NET_IP_ALIGN);
1789 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1790 offset_in_page(skb->data),
1791 ACE_JUMBO_BUFSIZE,
1792 PCI_DMA_FROMDEVICE);
1793 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1794 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1795 mapping, mapping);
1796
1797 rd = &ap->rx_jumbo_ring[idx];
1798 set_aceaddr(&rd->addr, mapping);
1799 rd->size = ACE_JUMBO_BUFSIZE;
1800 rd->idx = idx;
1801 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1802 }
1803
1804 if (!i)
1805 goto error_out;
1806
1807 atomic_add(i, &ap->cur_jumbo_bufs);
1808 ap->rx_jumbo_skbprd = idx;
1809
1810 if (ACE_IS_TIGON_I(ap)) {
1811 struct cmd cmd;
1812 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1813 cmd.code = 0;
1814 cmd.idx = ap->rx_jumbo_skbprd;
1815 ace_issue_cmd(regs, &cmd);
1816 } else {
1817 writel(idx, &regs->RxJumboPrd);
1818 wmb();
1819 }
1820
1821 out:
1822 clear_bit(0, &ap->jumbo_refill_busy);
1823 return;
1824 error_out:
1825 if (net_ratelimit())
1826 printk(KERN_INFO "Out of memory when allocating "
1827 "jumbo receive buffers\n");
1828 goto out;
1829}
1830
1831
1832/*
1833 * All events are considered to be slow (RX/TX ints do not generate
1834 * events) and are handled here, outside the main interrupt handler,
1835 * to reduce the size of the handler.
1836 */
1837static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1838{
1839 struct ace_private *ap;
1840
1841 ap = netdev_priv(dev);
1842
1843 while (evtcsm != evtprd) {
1844 switch (ap->evt_ring[evtcsm].evt) {
1845 case E_FW_RUNNING:
1846 printk(KERN_INFO "%s: Firmware up and running\n",
1847 ap->name);
1848 ap->fw_running = 1;
1849 wmb();
1850 break;
1851 case E_STATS_UPDATED:
1852 break;
1853 case E_LNK_STATE:
1854 {
1855 u16 code = ap->evt_ring[evtcsm].code;
1856 switch (code) {
1857 case E_C_LINK_UP:
1858 {
1859 u32 state = readl(&ap->regs->GigLnkState);
1860 printk(KERN_WARNING "%s: Optical link UP "
1861 "(%s Duplex, Flow Control: %s%s)\n",
1862 ap->name,
1863 state & LNK_FULL_DUPLEX ? "Full":"Half",
1864 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1865 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1866 break;
1867 }
1868 case E_C_LINK_DOWN:
1869 printk(KERN_WARNING "%s: Optical link DOWN\n",
1870 ap->name);
1871 break;
1872 case E_C_LINK_10_100:
1873 printk(KERN_WARNING "%s: 10/100BaseT link "
1874 "UP\n", ap->name);
1875 break;
1876 default:
1877 printk(KERN_ERR "%s: Unknown optical link "
1878 "state %02x\n", ap->name, code);
1879 }
1880 break;
1881 }
1882 case E_ERROR:
1883 switch(ap->evt_ring[evtcsm].code) {
1884 case E_C_ERR_INVAL_CMD:
1885 printk(KERN_ERR "%s: invalid command error\n",
1886 ap->name);
1887 break;
1888 case E_C_ERR_UNIMP_CMD:
1889 printk(KERN_ERR "%s: unimplemented command "
1890 "error\n", ap->name);
1891 break;
1892 case E_C_ERR_BAD_CFG:
1893 printk(KERN_ERR "%s: bad config error\n",
1894 ap->name);
1895 break;
1896 default:
1897 printk(KERN_ERR "%s: unknown error %02x\n",
1898 ap->name, ap->evt_ring[evtcsm].code);
1899 }
1900 break;
1901 case E_RESET_JUMBO_RNG:
1902 {
1903 int i;
1904 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1905 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1906 ap->rx_jumbo_ring[i].size = 0;
1907 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1908 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1909 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1910 }
1911 }
1912
1913 if (ACE_IS_TIGON_I(ap)) {
1914 struct cmd cmd;
1915 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1916 cmd.code = 0;
1917 cmd.idx = 0;
1918 ace_issue_cmd(ap->regs, &cmd);
1919 } else {
1920 writel(0, &((ap->regs)->RxJumboPrd));
1921 wmb();
1922 }
1923
1924 ap->jumbo = 0;
1925 ap->rx_jumbo_skbprd = 0;
1926 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1927 ap->name);
1928 clear_bit(0, &ap->jumbo_refill_busy);
1929 break;
1930 }
1931 default:
1932 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1933 ap->name, ap->evt_ring[evtcsm].evt);
1934 }
1935 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1936 }
1937
1938 return evtcsm;
1939}
1940
1941
1942static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1943{
1944 struct ace_private *ap = netdev_priv(dev);
1945 u32 idx;
1946 int mini_count = 0, std_count = 0;
1947
1948 idx = rxretcsm;
1949
1950 prefetchw(&ap->cur_rx_bufs);
1951 prefetchw(&ap->cur_mini_bufs);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001952
Linus Torvalds1da177e2005-04-16 15:20:36 -07001953 while (idx != rxretprd) {
1954 struct ring_info *rip;
1955 struct sk_buff *skb;
1956 struct rx_desc *rxdesc, *retdesc;
1957 u32 skbidx;
1958 int bd_flags, desc_type, mapsize;
1959 u16 csum;
1960
1961
1962 /* make sure the rx descriptor isn't read before rxretprd */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001963 if (idx == rxretcsm)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001964 rmb();
1965
1966 retdesc = &ap->rx_return_ring[idx];
1967 skbidx = retdesc->idx;
1968 bd_flags = retdesc->flags;
1969 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1970
1971 switch(desc_type) {
1972 /*
1973 * Normal frames do not have any flags set
1974 *
1975 * Mini and normal frames arrive frequently,
1976 * so use a local counter to avoid doing
1977 * atomic operations for each packet arriving.
1978 */
1979 case 0:
1980 rip = &ap->skb->rx_std_skbuff[skbidx];
1981 mapsize = ACE_STD_BUFSIZE;
1982 rxdesc = &ap->rx_std_ring[skbidx];
1983 std_count++;
1984 break;
1985 case BD_FLG_JUMBO:
1986 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1987 mapsize = ACE_JUMBO_BUFSIZE;
1988 rxdesc = &ap->rx_jumbo_ring[skbidx];
1989 atomic_dec(&ap->cur_jumbo_bufs);
1990 break;
1991 case BD_FLG_MINI:
1992 rip = &ap->skb->rx_mini_skbuff[skbidx];
1993 mapsize = ACE_MINI_BUFSIZE;
1994 rxdesc = &ap->rx_mini_ring[skbidx];
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001995 mini_count++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001996 break;
1997 default:
1998 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
1999 "returned by NIC\n", dev->name,
2000 retdesc->flags);
2001 goto error;
2002 }
2003
2004 skb = rip->skb;
2005 rip->skb = NULL;
2006 pci_unmap_page(ap->pdev,
2007 pci_unmap_addr(rip, mapping),
2008 mapsize,
2009 PCI_DMA_FROMDEVICE);
2010 skb_put(skb, retdesc->size);
2011
2012 /*
2013 * Fly baby, fly!
2014 */
2015 csum = retdesc->tcp_udp_csum;
2016
Linus Torvalds1da177e2005-04-16 15:20:36 -07002017 skb->protocol = eth_type_trans(skb, dev);
2018
2019 /*
2020 * Instead of forcing the poor tigon mips cpu to calculate
2021 * pseudo hdr checksum, we do this ourselves.
2022 */
2023 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2024 skb->csum = htons(csum);
Patrick McHardy84fa7932006-08-29 16:44:56 -07002025 skb->ip_summed = CHECKSUM_COMPLETE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002026 } else {
2027 skb->ip_summed = CHECKSUM_NONE;
2028 }
2029
2030 /* send it up */
2031#if ACENIC_DO_VLAN
2032 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2033 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2034 } else
2035#endif
2036 netif_rx(skb);
2037
2038 dev->last_rx = jiffies;
Paulius Zaleckas966e37b2008-04-30 02:03:55 +03002039 dev->stats.rx_packets++;
2040 dev->stats.rx_bytes += retdesc->size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002041
2042 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2043 }
2044
2045 atomic_sub(std_count, &ap->cur_rx_bufs);
2046 if (!ACE_IS_TIGON_I(ap))
2047 atomic_sub(mini_count, &ap->cur_mini_bufs);
2048
2049 out:
2050 /*
2051 * According to the documentation RxRetCsm is obsolete with
2052 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2053 */
2054 if (ACE_IS_TIGON_I(ap)) {
2055 writel(idx, &ap->regs->RxRetCsm);
2056 }
2057 ap->cur_rx = idx;
2058
2059 return;
2060 error:
2061 idx = rxretprd;
2062 goto out;
2063}
2064
2065
2066static inline void ace_tx_int(struct net_device *dev,
2067 u32 txcsm, u32 idx)
2068{
2069 struct ace_private *ap = netdev_priv(dev);
2070
2071 do {
2072 struct sk_buff *skb;
2073 dma_addr_t mapping;
2074 struct tx_ring_info *info;
2075
2076 info = ap->skb->tx_skbuff + idx;
2077 skb = info->skb;
2078 mapping = pci_unmap_addr(info, mapping);
2079
2080 if (mapping) {
2081 pci_unmap_page(ap->pdev, mapping,
2082 pci_unmap_len(info, maplen),
2083 PCI_DMA_TODEVICE);
2084 pci_unmap_addr_set(info, mapping, 0);
2085 }
2086
2087 if (skb) {
Paulius Zaleckas966e37b2008-04-30 02:03:55 +03002088 dev->stats.tx_packets++;
2089 dev->stats.tx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002090 dev_kfree_skb_irq(skb);
2091 info->skb = NULL;
2092 }
2093
2094 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2095 } while (idx != txcsm);
2096
2097 if (netif_queue_stopped(dev))
2098 netif_wake_queue(dev);
2099
2100 wmb();
2101 ap->tx_ret_csm = txcsm;
2102
2103 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2104 *
2105 * We could try to make it before. In this case we would get
2106 * the following race condition: hard_start_xmit on other cpu
2107 * enters after we advanced tx_ret_csm and fills space,
2108 * which we have just freed, so that we make illegal device wakeup.
2109 * There is no good way to workaround this (at entry
2110 * to ace_start_xmit detects this condition and prevents
2111 * ring corruption, but it is not a good workaround.)
2112 *
2113 * When tx_ret_csm is advanced after, we wake up device _only_
2114 * if we really have some space in ring (though the core doing
2115 * hard_start_xmit can see full ring for some period and has to
2116 * synchronize.) Superb.
2117 * BUT! We get another subtle race condition. hard_start_xmit
2118 * may think that ring is full between wakeup and advancing
2119 * tx_ret_csm and will stop device instantly! It is not so bad.
2120 * We are guaranteed that there is something in ring, so that
2121 * the next irq will resume transmission. To speedup this we could
2122 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2123 * (see ace_start_xmit).
2124 *
2125 * Well, this dilemma exists in all lock-free devices.
2126 * We, following scheme used in drivers by Donald Becker,
2127 * select the least dangerous.
2128 * --ANK
2129 */
2130}
2131
2132
David Howells7d12e782006-10-05 14:55:46 +01002133static irqreturn_t ace_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002134{
2135 struct net_device *dev = (struct net_device *)dev_id;
2136 struct ace_private *ap = netdev_priv(dev);
2137 struct ace_regs __iomem *regs = ap->regs;
2138 u32 idx;
2139 u32 txcsm, rxretcsm, rxretprd;
2140 u32 evtcsm, evtprd;
2141
2142 /*
2143 * In case of PCI shared interrupts or spurious interrupts,
2144 * we want to make sure it is actually our interrupt before
2145 * spending any time in here.
2146 */
2147 if (!(readl(&regs->HostCtrl) & IN_INT))
2148 return IRQ_NONE;
2149
2150 /*
2151 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2152 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2153 * writel(0, &regs->Mb0Lo).
2154 *
2155 * "IRQ avoidance" recommended in docs applies to IRQs served
2156 * threads and it is wrong even for that case.
2157 */
2158 writel(0, &regs->Mb0Lo);
2159 readl(&regs->Mb0Lo);
2160
2161 /*
2162 * There is no conflict between transmit handling in
2163 * start_xmit and receive processing, thus there is no reason
2164 * to take a spin lock for RX handling. Wait until we start
2165 * working on the other stuff - hey we don't need a spin lock
2166 * anymore.
2167 */
2168 rxretprd = *ap->rx_ret_prd;
2169 rxretcsm = ap->cur_rx;
2170
2171 if (rxretprd != rxretcsm)
2172 ace_rx_int(dev, rxretprd, rxretcsm);
2173
2174 txcsm = *ap->tx_csm;
2175 idx = ap->tx_ret_csm;
2176
2177 if (txcsm != idx) {
2178 /*
2179 * If each skb takes only one descriptor this check degenerates
2180 * to identity, because new space has just been opened.
2181 * But if skbs are fragmented we must check that this index
2182 * update releases enough of space, otherwise we just
2183 * wait for device to make more work.
2184 */
2185 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2186 ace_tx_int(dev, txcsm, idx);
2187 }
2188
2189 evtcsm = readl(&regs->EvtCsm);
2190 evtprd = *ap->evt_prd;
2191
2192 if (evtcsm != evtprd) {
2193 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2194 writel(evtcsm, &regs->EvtCsm);
2195 }
2196
2197 /*
2198 * This has to go last in the interrupt handler and run with
2199 * the spin lock released ... what lock?
2200 */
2201 if (netif_running(dev)) {
2202 int cur_size;
2203 int run_tasklet = 0;
2204
2205 cur_size = atomic_read(&ap->cur_rx_bufs);
2206 if (cur_size < RX_LOW_STD_THRES) {
2207 if ((cur_size < RX_PANIC_STD_THRES) &&
2208 !test_and_set_bit(0, &ap->std_refill_busy)) {
2209#ifdef DEBUG
2210 printk("low on std buffers %i\n", cur_size);
2211#endif
2212 ace_load_std_rx_ring(ap,
2213 RX_RING_SIZE - cur_size);
2214 } else
2215 run_tasklet = 1;
2216 }
2217
2218 if (!ACE_IS_TIGON_I(ap)) {
2219 cur_size = atomic_read(&ap->cur_mini_bufs);
2220 if (cur_size < RX_LOW_MINI_THRES) {
2221 if ((cur_size < RX_PANIC_MINI_THRES) &&
2222 !test_and_set_bit(0,
2223 &ap->mini_refill_busy)) {
2224#ifdef DEBUG
2225 printk("low on mini buffers %i\n",
2226 cur_size);
2227#endif
2228 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2229 } else
2230 run_tasklet = 1;
2231 }
2232 }
2233
2234 if (ap->jumbo) {
2235 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2236 if (cur_size < RX_LOW_JUMBO_THRES) {
2237 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2238 !test_and_set_bit(0,
2239 &ap->jumbo_refill_busy)){
2240#ifdef DEBUG
2241 printk("low on jumbo buffers %i\n",
2242 cur_size);
2243#endif
2244 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2245 } else
2246 run_tasklet = 1;
2247 }
2248 }
2249 if (run_tasklet && !ap->tasklet_pending) {
2250 ap->tasklet_pending = 1;
2251 tasklet_schedule(&ap->ace_tasklet);
2252 }
2253 }
2254
2255 return IRQ_HANDLED;
2256}
2257
2258
2259#if ACENIC_DO_VLAN
2260static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2261{
2262 struct ace_private *ap = netdev_priv(dev);
2263 unsigned long flags;
2264
2265 local_irq_save(flags);
2266 ace_mask_irq(dev);
2267
2268 ap->vlgrp = grp;
2269
2270 ace_unmask_irq(dev);
2271 local_irq_restore(flags);
2272}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002273#endif /* ACENIC_DO_VLAN */
2274
2275
2276static int ace_open(struct net_device *dev)
2277{
2278 struct ace_private *ap = netdev_priv(dev);
2279 struct ace_regs __iomem *regs = ap->regs;
2280 struct cmd cmd;
2281
2282 if (!(ap->fw_running)) {
2283 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2284 return -EBUSY;
2285 }
2286
2287 writel(dev->mtu + ETH_HLEN + 4, &regs->IfMtu);
2288
2289 cmd.evt = C_CLEAR_STATS;
2290 cmd.code = 0;
2291 cmd.idx = 0;
2292 ace_issue_cmd(regs, &cmd);
2293
2294 cmd.evt = C_HOST_STATE;
2295 cmd.code = C_C_STACK_UP;
2296 cmd.idx = 0;
2297 ace_issue_cmd(regs, &cmd);
2298
2299 if (ap->jumbo &&
2300 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2301 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2302
2303 if (dev->flags & IFF_PROMISC) {
2304 cmd.evt = C_SET_PROMISC_MODE;
2305 cmd.code = C_C_PROMISC_ENABLE;
2306 cmd.idx = 0;
2307 ace_issue_cmd(regs, &cmd);
2308
2309 ap->promisc = 1;
2310 }else
2311 ap->promisc = 0;
2312 ap->mcast_all = 0;
2313
2314#if 0
2315 cmd.evt = C_LNK_NEGOTIATION;
2316 cmd.code = 0;
2317 cmd.idx = 0;
2318 ace_issue_cmd(regs, &cmd);
2319#endif
2320
2321 netif_start_queue(dev);
2322
2323 /*
2324 * Setup the bottom half rx ring refill handler
2325 */
2326 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2327 return 0;
2328}
2329
2330
2331static int ace_close(struct net_device *dev)
2332{
2333 struct ace_private *ap = netdev_priv(dev);
2334 struct ace_regs __iomem *regs = ap->regs;
2335 struct cmd cmd;
2336 unsigned long flags;
2337 short i;
2338
2339 /*
2340 * Without (or before) releasing irq and stopping hardware, this
2341 * is an absolute non-sense, by the way. It will be reset instantly
2342 * by the first irq.
2343 */
2344 netif_stop_queue(dev);
2345
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002346
Linus Torvalds1da177e2005-04-16 15:20:36 -07002347 if (ap->promisc) {
2348 cmd.evt = C_SET_PROMISC_MODE;
2349 cmd.code = C_C_PROMISC_DISABLE;
2350 cmd.idx = 0;
2351 ace_issue_cmd(regs, &cmd);
2352 ap->promisc = 0;
2353 }
2354
2355 cmd.evt = C_HOST_STATE;
2356 cmd.code = C_C_STACK_DOWN;
2357 cmd.idx = 0;
2358 ace_issue_cmd(regs, &cmd);
2359
2360 tasklet_kill(&ap->ace_tasklet);
2361
2362 /*
2363 * Make sure one CPU is not processing packets while
2364 * buffers are being released by another.
2365 */
2366
2367 local_irq_save(flags);
2368 ace_mask_irq(dev);
2369
2370 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2371 struct sk_buff *skb;
2372 dma_addr_t mapping;
2373 struct tx_ring_info *info;
2374
2375 info = ap->skb->tx_skbuff + i;
2376 skb = info->skb;
2377 mapping = pci_unmap_addr(info, mapping);
2378
2379 if (mapping) {
2380 if (ACE_IS_TIGON_I(ap)) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07002381 /* NB: TIGON_1 is special, tx_ring is in io space */
2382 struct tx_desc __iomem *tx;
2383 tx = (__force struct tx_desc __iomem *) &ap->tx_ring[i];
Linus Torvalds1da177e2005-04-16 15:20:36 -07002384 writel(0, &tx->addr.addrhi);
2385 writel(0, &tx->addr.addrlo);
2386 writel(0, &tx->flagsize);
2387 } else
2388 memset(ap->tx_ring + i, 0,
2389 sizeof(struct tx_desc));
2390 pci_unmap_page(ap->pdev, mapping,
2391 pci_unmap_len(info, maplen),
2392 PCI_DMA_TODEVICE);
2393 pci_unmap_addr_set(info, mapping, 0);
2394 }
2395 if (skb) {
2396 dev_kfree_skb(skb);
2397 info->skb = NULL;
2398 }
2399 }
2400
2401 if (ap->jumbo) {
2402 cmd.evt = C_RESET_JUMBO_RNG;
2403 cmd.code = 0;
2404 cmd.idx = 0;
2405 ace_issue_cmd(regs, &cmd);
2406 }
2407
2408 ace_unmask_irq(dev);
2409 local_irq_restore(flags);
2410
2411 return 0;
2412}
2413
2414
2415static inline dma_addr_t
2416ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2417 struct sk_buff *tail, u32 idx)
2418{
2419 dma_addr_t mapping;
2420 struct tx_ring_info *info;
2421
2422 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2423 offset_in_page(skb->data),
2424 skb->len, PCI_DMA_TODEVICE);
2425
2426 info = ap->skb->tx_skbuff + idx;
2427 info->skb = tail;
2428 pci_unmap_addr_set(info, mapping, mapping);
2429 pci_unmap_len_set(info, maplen, skb->len);
2430 return mapping;
2431}
2432
2433
2434static inline void
2435ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2436 u32 flagsize, u32 vlan_tag)
2437{
2438#if !USE_TX_COAL_NOW
2439 flagsize &= ~BD_FLG_COAL_NOW;
2440#endif
2441
2442 if (ACE_IS_TIGON_I(ap)) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07002443 struct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002444 writel(addr >> 32, &io->addr.addrhi);
2445 writel(addr & 0xffffffff, &io->addr.addrlo);
2446 writel(flagsize, &io->flagsize);
2447#if ACENIC_DO_VLAN
2448 writel(vlan_tag, &io->vlanres);
2449#endif
2450 } else {
2451 desc->addr.addrhi = addr >> 32;
2452 desc->addr.addrlo = addr;
2453 desc->flagsize = flagsize;
2454#if ACENIC_DO_VLAN
2455 desc->vlanres = vlan_tag;
2456#endif
2457 }
2458}
2459
2460
2461static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2462{
2463 struct ace_private *ap = netdev_priv(dev);
2464 struct ace_regs __iomem *regs = ap->regs;
2465 struct tx_desc *desc;
2466 u32 idx, flagsize;
2467 unsigned long maxjiff = jiffies + 3*HZ;
2468
2469restart:
2470 idx = ap->tx_prd;
2471
2472 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2473 goto overflow;
2474
2475 if (!skb_shinfo(skb)->nr_frags) {
2476 dma_addr_t mapping;
2477 u32 vlan_tag = 0;
2478
2479 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2480 flagsize = (skb->len << 16) | (BD_FLG_END);
Patrick McHardy84fa7932006-08-29 16:44:56 -07002481 if (skb->ip_summed == CHECKSUM_PARTIAL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002482 flagsize |= BD_FLG_TCP_UDP_SUM;
2483#if ACENIC_DO_VLAN
2484 if (vlan_tx_tag_present(skb)) {
2485 flagsize |= BD_FLG_VLAN_TAG;
2486 vlan_tag = vlan_tx_tag_get(skb);
2487 }
2488#endif
2489 desc = ap->tx_ring + idx;
2490 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2491
2492 /* Look at ace_tx_int for explanations. */
2493 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2494 flagsize |= BD_FLG_COAL_NOW;
2495
2496 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2497 } else {
2498 dma_addr_t mapping;
2499 u32 vlan_tag = 0;
2500 int i, len = 0;
2501
2502 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2503 flagsize = (skb_headlen(skb) << 16);
Patrick McHardy84fa7932006-08-29 16:44:56 -07002504 if (skb->ip_summed == CHECKSUM_PARTIAL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002505 flagsize |= BD_FLG_TCP_UDP_SUM;
2506#if ACENIC_DO_VLAN
2507 if (vlan_tx_tag_present(skb)) {
2508 flagsize |= BD_FLG_VLAN_TAG;
2509 vlan_tag = vlan_tx_tag_get(skb);
2510 }
2511#endif
2512
2513 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2514
2515 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2516
2517 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2518 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2519 struct tx_ring_info *info;
2520
2521 len += frag->size;
2522 info = ap->skb->tx_skbuff + idx;
2523 desc = ap->tx_ring + idx;
2524
2525 mapping = pci_map_page(ap->pdev, frag->page,
2526 frag->page_offset, frag->size,
2527 PCI_DMA_TODEVICE);
2528
2529 flagsize = (frag->size << 16);
Patrick McHardy84fa7932006-08-29 16:44:56 -07002530 if (skb->ip_summed == CHECKSUM_PARTIAL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002531 flagsize |= BD_FLG_TCP_UDP_SUM;
2532 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2533
2534 if (i == skb_shinfo(skb)->nr_frags - 1) {
2535 flagsize |= BD_FLG_END;
2536 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2537 flagsize |= BD_FLG_COAL_NOW;
2538
2539 /*
2540 * Only the last fragment frees
2541 * the skb!
2542 */
2543 info->skb = skb;
2544 } else {
2545 info->skb = NULL;
2546 }
2547 pci_unmap_addr_set(info, mapping, mapping);
2548 pci_unmap_len_set(info, maplen, frag->size);
2549 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2550 }
2551 }
2552
2553 wmb();
2554 ap->tx_prd = idx;
2555 ace_set_txprd(regs, ap, idx);
2556
2557 if (flagsize & BD_FLG_COAL_NOW) {
2558 netif_stop_queue(dev);
2559
2560 /*
2561 * A TX-descriptor producer (an IRQ) might have gotten
2562 * inbetween, making the ring free again. Since xmit is
2563 * serialized, this is the only situation we have to
2564 * re-test.
2565 */
2566 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2567 netif_wake_queue(dev);
2568 }
2569
2570 dev->trans_start = jiffies;
2571 return NETDEV_TX_OK;
2572
2573overflow:
2574 /*
2575 * This race condition is unavoidable with lock-free drivers.
2576 * We wake up the queue _before_ tx_prd is advanced, so that we can
2577 * enter hard_start_xmit too early, while tx ring still looks closed.
2578 * This happens ~1-4 times per 100000 packets, so that we can allow
2579 * to loop syncing to other CPU. Probably, we need an additional
2580 * wmb() in ace_tx_intr as well.
2581 *
2582 * Note that this race is relieved by reserving one more entry
2583 * in tx ring than it is necessary (see original non-SG driver).
2584 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2585 * is already overkill.
2586 *
2587 * Alternative is to return with 1 not throttling queue. In this
2588 * case loop becomes longer, no more useful effects.
2589 */
2590 if (time_before(jiffies, maxjiff)) {
2591 barrier();
2592 cpu_relax();
2593 goto restart;
2594 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002595
Linus Torvalds1da177e2005-04-16 15:20:36 -07002596 /* The ring is stuck full. */
2597 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2598 return NETDEV_TX_BUSY;
2599}
2600
2601
2602static int ace_change_mtu(struct net_device *dev, int new_mtu)
2603{
2604 struct ace_private *ap = netdev_priv(dev);
2605 struct ace_regs __iomem *regs = ap->regs;
2606
2607 if (new_mtu > ACE_JUMBO_MTU)
2608 return -EINVAL;
2609
2610 writel(new_mtu + ETH_HLEN + 4, &regs->IfMtu);
2611 dev->mtu = new_mtu;
2612
2613 if (new_mtu > ACE_STD_MTU) {
2614 if (!(ap->jumbo)) {
2615 printk(KERN_INFO "%s: Enabling Jumbo frame "
2616 "support\n", dev->name);
2617 ap->jumbo = 1;
2618 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2619 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2620 ace_set_rxtx_parms(dev, 1);
2621 }
2622 } else {
2623 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2624 ace_sync_irq(dev->irq);
2625 ace_set_rxtx_parms(dev, 0);
2626 if (ap->jumbo) {
2627 struct cmd cmd;
2628
2629 cmd.evt = C_RESET_JUMBO_RNG;
2630 cmd.code = 0;
2631 cmd.idx = 0;
2632 ace_issue_cmd(regs, &cmd);
2633 }
2634 }
2635
2636 return 0;
2637}
2638
2639static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2640{
2641 struct ace_private *ap = netdev_priv(dev);
2642 struct ace_regs __iomem *regs = ap->regs;
2643 u32 link;
2644
2645 memset(ecmd, 0, sizeof(struct ethtool_cmd));
2646 ecmd->supported =
2647 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2648 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2649 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2650 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2651
2652 ecmd->port = PORT_FIBRE;
2653 ecmd->transceiver = XCVR_INTERNAL;
2654
2655 link = readl(&regs->GigLnkState);
2656 if (link & LNK_1000MB)
2657 ecmd->speed = SPEED_1000;
2658 else {
2659 link = readl(&regs->FastLnkState);
2660 if (link & LNK_100MB)
2661 ecmd->speed = SPEED_100;
2662 else if (link & LNK_10MB)
2663 ecmd->speed = SPEED_10;
2664 else
2665 ecmd->speed = 0;
2666 }
2667 if (link & LNK_FULL_DUPLEX)
2668 ecmd->duplex = DUPLEX_FULL;
2669 else
2670 ecmd->duplex = DUPLEX_HALF;
2671
2672 if (link & LNK_NEGOTIATE)
2673 ecmd->autoneg = AUTONEG_ENABLE;
2674 else
2675 ecmd->autoneg = AUTONEG_DISABLE;
2676
2677#if 0
2678 /*
2679 * Current struct ethtool_cmd is insufficient
2680 */
2681 ecmd->trace = readl(&regs->TuneTrace);
2682
2683 ecmd->txcoal = readl(&regs->TuneTxCoalTicks);
2684 ecmd->rxcoal = readl(&regs->TuneRxCoalTicks);
2685#endif
2686 ecmd->maxtxpkt = readl(&regs->TuneMaxTxDesc);
2687 ecmd->maxrxpkt = readl(&regs->TuneMaxRxDesc);
2688
2689 return 0;
2690}
2691
2692static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2693{
2694 struct ace_private *ap = netdev_priv(dev);
2695 struct ace_regs __iomem *regs = ap->regs;
2696 u32 link, speed;
2697
2698 link = readl(&regs->GigLnkState);
2699 if (link & LNK_1000MB)
2700 speed = SPEED_1000;
2701 else {
2702 link = readl(&regs->FastLnkState);
2703 if (link & LNK_100MB)
2704 speed = SPEED_100;
2705 else if (link & LNK_10MB)
2706 speed = SPEED_10;
2707 else
2708 speed = SPEED_100;
2709 }
2710
2711 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2712 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2713 if (!ACE_IS_TIGON_I(ap))
2714 link |= LNK_TX_FLOW_CTL_Y;
2715 if (ecmd->autoneg == AUTONEG_ENABLE)
2716 link |= LNK_NEGOTIATE;
2717 if (ecmd->speed != speed) {
2718 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2719 switch (speed) {
2720 case SPEED_1000:
2721 link |= LNK_1000MB;
2722 break;
2723 case SPEED_100:
2724 link |= LNK_100MB;
2725 break;
2726 case SPEED_10:
2727 link |= LNK_10MB;
2728 break;
2729 }
2730 }
2731
2732 if (ecmd->duplex == DUPLEX_FULL)
2733 link |= LNK_FULL_DUPLEX;
2734
2735 if (link != ap->link) {
2736 struct cmd cmd;
2737 printk(KERN_INFO "%s: Renegotiating link state\n",
2738 dev->name);
2739
2740 ap->link = link;
2741 writel(link, &regs->TuneLink);
2742 if (!ACE_IS_TIGON_I(ap))
2743 writel(link, &regs->TuneFastLink);
2744 wmb();
2745
2746 cmd.evt = C_LNK_NEGOTIATION;
2747 cmd.code = 0;
2748 cmd.idx = 0;
2749 ace_issue_cmd(regs, &cmd);
2750 }
2751 return 0;
2752}
2753
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002754static void ace_get_drvinfo(struct net_device *dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002755 struct ethtool_drvinfo *info)
2756{
2757 struct ace_private *ap = netdev_priv(dev);
2758
2759 strlcpy(info->driver, "acenic", sizeof(info->driver));
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002760 snprintf(info->version, sizeof(info->version), "%i.%i.%i",
Linus Torvalds1da177e2005-04-16 15:20:36 -07002761 tigonFwReleaseMajor, tigonFwReleaseMinor,
2762 tigonFwReleaseFix);
2763
2764 if (ap->pdev)
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002765 strlcpy(info->bus_info, pci_name(ap->pdev),
Linus Torvalds1da177e2005-04-16 15:20:36 -07002766 sizeof(info->bus_info));
2767
2768}
2769
2770/*
2771 * Set the hardware MAC address.
2772 */
2773static int ace_set_mac_addr(struct net_device *dev, void *p)
2774{
2775 struct ace_private *ap = netdev_priv(dev);
2776 struct ace_regs __iomem *regs = ap->regs;
2777 struct sockaddr *addr=p;
2778 u8 *da;
2779 struct cmd cmd;
2780
2781 if(netif_running(dev))
2782 return -EBUSY;
2783
2784 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2785
2786 da = (u8 *)dev->dev_addr;
2787
2788 writel(da[0] << 8 | da[1], &regs->MacAddrHi);
2789 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2790 &regs->MacAddrLo);
2791
2792 cmd.evt = C_SET_MAC_ADDR;
2793 cmd.code = 0;
2794 cmd.idx = 0;
2795 ace_issue_cmd(regs, &cmd);
2796
2797 return 0;
2798}
2799
2800
2801static void ace_set_multicast_list(struct net_device *dev)
2802{
2803 struct ace_private *ap = netdev_priv(dev);
2804 struct ace_regs __iomem *regs = ap->regs;
2805 struct cmd cmd;
2806
2807 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2808 cmd.evt = C_SET_MULTICAST_MODE;
2809 cmd.code = C_C_MCAST_ENABLE;
2810 cmd.idx = 0;
2811 ace_issue_cmd(regs, &cmd);
2812 ap->mcast_all = 1;
2813 } else if (ap->mcast_all) {
2814 cmd.evt = C_SET_MULTICAST_MODE;
2815 cmd.code = C_C_MCAST_DISABLE;
2816 cmd.idx = 0;
2817 ace_issue_cmd(regs, &cmd);
2818 ap->mcast_all = 0;
2819 }
2820
2821 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2822 cmd.evt = C_SET_PROMISC_MODE;
2823 cmd.code = C_C_PROMISC_ENABLE;
2824 cmd.idx = 0;
2825 ace_issue_cmd(regs, &cmd);
2826 ap->promisc = 1;
2827 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2828 cmd.evt = C_SET_PROMISC_MODE;
2829 cmd.code = C_C_PROMISC_DISABLE;
2830 cmd.idx = 0;
2831 ace_issue_cmd(regs, &cmd);
2832 ap->promisc = 0;
2833 }
2834
2835 /*
2836 * For the time being multicast relies on the upper layers
2837 * filtering it properly. The Firmware does not allow one to
2838 * set the entire multicast list at a time and keeping track of
2839 * it here is going to be messy.
2840 */
2841 if ((dev->mc_count) && !(ap->mcast_all)) {
2842 cmd.evt = C_SET_MULTICAST_MODE;
2843 cmd.code = C_C_MCAST_ENABLE;
2844 cmd.idx = 0;
2845 ace_issue_cmd(regs, &cmd);
2846 }else if (!ap->mcast_all) {
2847 cmd.evt = C_SET_MULTICAST_MODE;
2848 cmd.code = C_C_MCAST_DISABLE;
2849 cmd.idx = 0;
2850 ace_issue_cmd(regs, &cmd);
2851 }
2852}
2853
2854
2855static struct net_device_stats *ace_get_stats(struct net_device *dev)
2856{
2857 struct ace_private *ap = netdev_priv(dev);
2858 struct ace_mac_stats __iomem *mac_stats =
2859 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2860
Paulius Zaleckas966e37b2008-04-30 02:03:55 +03002861 dev->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2862 dev->stats.multicast = readl(&mac_stats->kept_mc);
2863 dev->stats.collisions = readl(&mac_stats->coll);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002864
Paulius Zaleckas966e37b2008-04-30 02:03:55 +03002865 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002866}
2867
2868
2869static void __devinit ace_copy(struct ace_regs __iomem *regs, void *src,
2870 u32 dest, int size)
2871{
2872 void __iomem *tdest;
2873 u32 *wsrc;
2874 short tsize, i;
2875
2876 if (size <= 0)
2877 return;
2878
2879 while (size > 0) {
2880 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2881 min_t(u32, size, ACE_WINDOW_SIZE));
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002882 tdest = (void __iomem *) &regs->Window +
Linus Torvalds1da177e2005-04-16 15:20:36 -07002883 (dest & (ACE_WINDOW_SIZE - 1));
2884 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
2885 /*
2886 * This requires byte swapping on big endian, however
2887 * writel does that for us
2888 */
2889 wsrc = src;
2890 for (i = 0; i < (tsize / 4); i++) {
2891 writel(wsrc[i], tdest + i*4);
2892 }
2893 dest += tsize;
2894 src += tsize;
2895 size -= tsize;
2896 }
2897
2898 return;
2899}
2900
2901
2902static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2903{
2904 void __iomem *tdest;
2905 short tsize = 0, i;
2906
2907 if (size <= 0)
2908 return;
2909
2910 while (size > 0) {
2911 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2912 min_t(u32, size, ACE_WINDOW_SIZE));
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002913 tdest = (void __iomem *) &regs->Window +
Linus Torvalds1da177e2005-04-16 15:20:36 -07002914 (dest & (ACE_WINDOW_SIZE - 1));
2915 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
2916
2917 for (i = 0; i < (tsize / 4); i++) {
2918 writel(0, tdest + i*4);
2919 }
2920
2921 dest += tsize;
2922 size -= tsize;
2923 }
2924
2925 return;
2926}
2927
2928
2929/*
2930 * Download the firmware into the SRAM on the NIC
2931 *
2932 * This operation requires the NIC to be halted and is performed with
2933 * interrupts disabled and with the spinlock hold.
2934 */
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07002935static int __devinit ace_load_firmware(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002936{
2937 struct ace_private *ap = netdev_priv(dev);
2938 struct ace_regs __iomem *regs = ap->regs;
2939
2940 if (!(readl(&regs->CpuCtrl) & CPU_HALTED)) {
2941 printk(KERN_ERR "%s: trying to download firmware while the "
2942 "CPU is running!\n", ap->name);
2943 return -EFAULT;
2944 }
2945
2946 /*
2947 * Do not try to clear more than 512KB or we end up seeing
2948 * funny things on NICs with only 512KB SRAM
2949 */
2950 ace_clear(regs, 0x2000, 0x80000-0x2000);
2951 if (ACE_IS_TIGON_I(ap)) {
2952 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
2953 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
2954 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
2955 tigonFwRodataLen);
2956 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
2957 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
2958 }else if (ap->version == 2) {
2959 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
2960 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
2961 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
2962 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
2963 tigon2FwRodataLen);
2964 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
2965 }
2966
2967 return 0;
2968}
2969
2970
2971/*
2972 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
2973 *
2974 * Accessing the EEPROM is `interesting' to say the least - don't read
2975 * this code right after dinner.
2976 *
2977 * This is all about black magic and bit-banging the device .... I
2978 * wonder in what hospital they have put the guy who designed the i2c
2979 * specs.
2980 *
2981 * Oh yes, this is only the beginning!
2982 *
2983 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
2984 * code i2c readout code by beta testing all my hacks.
2985 */
2986static void __devinit eeprom_start(struct ace_regs __iomem *regs)
2987{
2988 u32 local;
2989
2990 readl(&regs->LocalCtrl);
2991 udelay(ACE_SHORT_DELAY);
2992 local = readl(&regs->LocalCtrl);
2993 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
2994 writel(local, &regs->LocalCtrl);
2995 readl(&regs->LocalCtrl);
2996 mb();
2997 udelay(ACE_SHORT_DELAY);
2998 local |= EEPROM_CLK_OUT;
2999 writel(local, &regs->LocalCtrl);
3000 readl(&regs->LocalCtrl);
3001 mb();
3002 udelay(ACE_SHORT_DELAY);
3003 local &= ~EEPROM_DATA_OUT;
3004 writel(local, &regs->LocalCtrl);
3005 readl(&regs->LocalCtrl);
3006 mb();
3007 udelay(ACE_SHORT_DELAY);
3008 local &= ~EEPROM_CLK_OUT;
3009 writel(local, &regs->LocalCtrl);
3010 readl(&regs->LocalCtrl);
3011 mb();
3012}
3013
3014
3015static void __devinit eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
3016{
3017 short i;
3018 u32 local;
3019
3020 udelay(ACE_SHORT_DELAY);
3021 local = readl(&regs->LocalCtrl);
3022 local &= ~EEPROM_DATA_OUT;
3023 local |= EEPROM_WRITE_ENABLE;
3024 writel(local, &regs->LocalCtrl);
3025 readl(&regs->LocalCtrl);
3026 mb();
3027
3028 for (i = 0; i < 8; i++, magic <<= 1) {
3029 udelay(ACE_SHORT_DELAY);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003030 if (magic & 0x80)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003031 local |= EEPROM_DATA_OUT;
3032 else
3033 local &= ~EEPROM_DATA_OUT;
3034 writel(local, &regs->LocalCtrl);
3035 readl(&regs->LocalCtrl);
3036 mb();
3037
3038 udelay(ACE_SHORT_DELAY);
3039 local |= EEPROM_CLK_OUT;
3040 writel(local, &regs->LocalCtrl);
3041 readl(&regs->LocalCtrl);
3042 mb();
3043 udelay(ACE_SHORT_DELAY);
3044 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3045 writel(local, &regs->LocalCtrl);
3046 readl(&regs->LocalCtrl);
3047 mb();
3048 }
3049}
3050
3051
3052static int __devinit eeprom_check_ack(struct ace_regs __iomem *regs)
3053{
3054 int state;
3055 u32 local;
3056
3057 local = readl(&regs->LocalCtrl);
3058 local &= ~EEPROM_WRITE_ENABLE;
3059 writel(local, &regs->LocalCtrl);
3060 readl(&regs->LocalCtrl);
3061 mb();
3062 udelay(ACE_LONG_DELAY);
3063 local |= EEPROM_CLK_OUT;
3064 writel(local, &regs->LocalCtrl);
3065 readl(&regs->LocalCtrl);
3066 mb();
3067 udelay(ACE_SHORT_DELAY);
3068 /* sample data in middle of high clk */
3069 state = (readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0;
3070 udelay(ACE_SHORT_DELAY);
3071 mb();
3072 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3073 readl(&regs->LocalCtrl);
3074 mb();
3075
3076 return state;
3077}
3078
3079
3080static void __devinit eeprom_stop(struct ace_regs __iomem *regs)
3081{
3082 u32 local;
3083
3084 udelay(ACE_SHORT_DELAY);
3085 local = readl(&regs->LocalCtrl);
3086 local |= EEPROM_WRITE_ENABLE;
3087 writel(local, &regs->LocalCtrl);
3088 readl(&regs->LocalCtrl);
3089 mb();
3090 udelay(ACE_SHORT_DELAY);
3091 local &= ~EEPROM_DATA_OUT;
3092 writel(local, &regs->LocalCtrl);
3093 readl(&regs->LocalCtrl);
3094 mb();
3095 udelay(ACE_SHORT_DELAY);
3096 local |= EEPROM_CLK_OUT;
3097 writel(local, &regs->LocalCtrl);
3098 readl(&regs->LocalCtrl);
3099 mb();
3100 udelay(ACE_SHORT_DELAY);
3101 local |= EEPROM_DATA_OUT;
3102 writel(local, &regs->LocalCtrl);
3103 readl(&regs->LocalCtrl);
3104 mb();
3105 udelay(ACE_LONG_DELAY);
3106 local &= ~EEPROM_CLK_OUT;
3107 writel(local, &regs->LocalCtrl);
3108 mb();
3109}
3110
3111
3112/*
3113 * Read a whole byte from the EEPROM.
3114 */
3115static int __devinit read_eeprom_byte(struct net_device *dev,
3116 unsigned long offset)
3117{
3118 struct ace_private *ap = netdev_priv(dev);
3119 struct ace_regs __iomem *regs = ap->regs;
3120 unsigned long flags;
3121 u32 local;
3122 int result = 0;
3123 short i;
3124
Linus Torvalds1da177e2005-04-16 15:20:36 -07003125 /*
3126 * Don't take interrupts on this CPU will bit banging
3127 * the %#%#@$ I2C device
3128 */
3129 local_irq_save(flags);
3130
3131 eeprom_start(regs);
3132
3133 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3134 if (eeprom_check_ack(regs)) {
3135 local_irq_restore(flags);
3136 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3137 result = -EIO;
3138 goto eeprom_read_error;
3139 }
3140
3141 eeprom_prep(regs, (offset >> 8) & 0xff);
3142 if (eeprom_check_ack(regs)) {
3143 local_irq_restore(flags);
3144 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3145 ap->name);
3146 result = -EIO;
3147 goto eeprom_read_error;
3148 }
3149
3150 eeprom_prep(regs, offset & 0xff);
3151 if (eeprom_check_ack(regs)) {
3152 local_irq_restore(flags);
3153 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3154 ap->name);
3155 result = -EIO;
3156 goto eeprom_read_error;
3157 }
3158
3159 eeprom_start(regs);
3160 eeprom_prep(regs, EEPROM_READ_SELECT);
3161 if (eeprom_check_ack(regs)) {
3162 local_irq_restore(flags);
3163 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3164 ap->name);
3165 result = -EIO;
3166 goto eeprom_read_error;
3167 }
3168
3169 for (i = 0; i < 8; i++) {
3170 local = readl(&regs->LocalCtrl);
3171 local &= ~EEPROM_WRITE_ENABLE;
3172 writel(local, &regs->LocalCtrl);
3173 readl(&regs->LocalCtrl);
3174 udelay(ACE_LONG_DELAY);
3175 mb();
3176 local |= EEPROM_CLK_OUT;
3177 writel(local, &regs->LocalCtrl);
3178 readl(&regs->LocalCtrl);
3179 mb();
3180 udelay(ACE_SHORT_DELAY);
3181 /* sample data mid high clk */
3182 result = (result << 1) |
3183 ((readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0);
3184 udelay(ACE_SHORT_DELAY);
3185 mb();
3186 local = readl(&regs->LocalCtrl);
3187 local &= ~EEPROM_CLK_OUT;
3188 writel(local, &regs->LocalCtrl);
3189 readl(&regs->LocalCtrl);
3190 udelay(ACE_SHORT_DELAY);
3191 mb();
3192 if (i == 7) {
3193 local |= EEPROM_WRITE_ENABLE;
3194 writel(local, &regs->LocalCtrl);
3195 readl(&regs->LocalCtrl);
3196 mb();
3197 udelay(ACE_SHORT_DELAY);
3198 }
3199 }
3200
3201 local |= EEPROM_DATA_OUT;
3202 writel(local, &regs->LocalCtrl);
3203 readl(&regs->LocalCtrl);
3204 mb();
3205 udelay(ACE_SHORT_DELAY);
3206 writel(readl(&regs->LocalCtrl) | EEPROM_CLK_OUT, &regs->LocalCtrl);
3207 readl(&regs->LocalCtrl);
3208 udelay(ACE_LONG_DELAY);
3209 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3210 readl(&regs->LocalCtrl);
3211 mb();
3212 udelay(ACE_SHORT_DELAY);
3213 eeprom_stop(regs);
3214
3215 local_irq_restore(flags);
3216 out:
3217 return result;
3218
3219 eeprom_read_error:
3220 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3221 ap->name, offset);
3222 goto out;
3223}
3224
3225
3226/*
3227 * Local variables:
3228 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"
3229 * End:
3230 */