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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
7 default y
8 ---help---
9 Say Y here if you want to compile device drivers for IO Memory
10 Management Units into the kernel. These devices usually allow to
11 remap DMA requests and/or remap interrupts from other devices on the
12 system.
13
14if IOMMU_SUPPORT
15
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030016config OF_IOMMU
17 def_bool y
18 depends on OF
19
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030020# MSM IOMMU support
21config MSM_IOMMU
22 bool "MSM IOMMU Support"
23 depends on ARCH_MSM8X60 || ARCH_MSM8960
24 select IOMMU_API
25 help
26 Support for the IOMMUs found on certain Qualcomm SOCs.
27 These IOMMUs allow virtualization of the address space used by most
28 cores within the multimedia subsystem.
29
30 If unsure, say N here.
31
32config IOMMU_PGTABLES_L2
33 def_bool y
34 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030035
36# AMD IOMMU support
37config AMD_IOMMU
38 bool "AMD IOMMU support"
39 select SWIOTLB
40 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010041 select PCI_ATS
42 select PCI_PRI
43 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030044 select IOMMU_API
Joerg Roedeleb1eb7a2012-07-05 11:58:02 +020045 depends on X86_64 && PCI && ACPI && X86_IO_APIC
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030046 ---help---
47 With this option you can enable support for AMD IOMMU hardware in
48 your system. An IOMMU is a hardware component which provides
49 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090050 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030051 system from misbehaving device drivers or hardware.
52
53 You can find out if your system has an AMD IOMMU if you look into
54 your BIOS for an option to enable it or if you have an IVRS ACPI
55 table.
56
57config AMD_IOMMU_STATS
58 bool "Export AMD IOMMU statistics to debugfs"
59 depends on AMD_IOMMU
60 select DEBUG_FS
61 ---help---
62 This option enables code in the AMD IOMMU driver to collect various
63 statistics about whats happening in the driver and exports that
64 information to userspace via debugfs.
65 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030066
Joerg Roedele3c495c2011-11-09 12:31:15 +010067config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -080068 tristate "AMD IOMMU Version 2 driver"
69 depends on AMD_IOMMU && PROFILING
Joerg Roedel8736b2c2011-11-24 16:21:52 +010070 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +010071 ---help---
72 This option enables support for the AMD IOMMUv2 features of the IOMMU
73 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +090074 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +010075
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030076# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -070077config DMAR_TABLE
78 bool
79
80config INTEL_IOMMU
81 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030082 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
83 select IOMMU_API
Suresh Siddhad3f13812011-08-23 17:05:25 -070084 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030085 help
86 DMA remapping (DMAR) devices support enables independent address
87 translations for Direct Memory Access (DMA) from devices.
88 These DMA remapping devices are reported via ACPI tables
89 and include PCI device scope covered by these DMA
90 remapping devices.
91
Suresh Siddhad3f13812011-08-23 17:05:25 -070092config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030093 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -070094 prompt "Enable Intel DMA Remapping Devices by default"
95 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030096 help
97 Selecting this option will enable a DMAR device at boot time if
98 one is found. If this option is not selected, DMAR support can
99 be enabled by passing intel_iommu=on to the kernel.
100
Suresh Siddhad3f13812011-08-23 17:05:25 -0700101config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300102 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700103 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300104 ---help---
105 Current Graphics drivers tend to use physical address
106 for DMA and avoid using DMA APIs. Setting this config
107 option permits the IOMMU driver to set a unity map for
108 all the OS-visible memory. Hence the driver can continue
109 to use physical addresses for DMA, at least until this
110 option is removed in the 2.6.32 kernel.
111
Suresh Siddhad3f13812011-08-23 17:05:25 -0700112config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300113 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700114 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300115 ---help---
116 Floppy disk drivers are known to bypass DMA API calls
117 thereby failing to work when IOMMU is enabled. This
118 workaround will setup a 1:1 mapping for the first
119 16MiB to make floppy (an ISA device) work.
120
Suresh Siddhad3f13812011-08-23 17:05:25 -0700121config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800122 bool "Support for Interrupt Remapping"
123 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700124 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300125 ---help---
126 Supports Interrupt remapping for IO-APIC and MSI devices.
127 To use x2apic mode in the CPU's which support x2APIC enhancements or
128 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200129
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300130# OMAP IOMMU support
131config OMAP_IOMMU
132 bool "OMAP IOMMU Support"
Ohad Ben-Cohen024ae882011-08-29 07:57:44 +0300133 depends on ARCH_OMAP
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300134 select IOMMU_API
135
136config OMAP_IOVMM
Joerg Roedel7b6d45f2011-09-14 16:03:45 +0200137 tristate "OMAP IO Virtual Memory Manager Support"
138 depends on OMAP_IOMMU
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300139
140config OMAP_IOMMU_DEBUG
141 tristate "Export OMAP IOMMU/IOVMM internals in DebugFS"
142 depends on OMAP_IOVMM && DEBUG_FS
143 help
144 Select this to see extensive information about
145 the internal state of OMAP IOMMU/IOVMM in debugfs.
146
147 Say N unless you know you need this.
148
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200149config TEGRA_IOMMU_GART
150 bool "Tegra GART IOMMU Support"
151 depends on ARCH_TEGRA_2x_SOC
152 select IOMMU_API
153 help
154 Enables support for remapping discontiguous physical memory
155 shared with the operating system into contiguous I/O virtual
156 space through the GART (Graphics Address Relocation Table)
157 hardware included on Tegra SoCs.
158
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200159config TEGRA_IOMMU_SMMU
160 bool "Tegra SMMU IOMMU Support"
Hiroshi Doyud3003562013-01-31 12:43:08 +0200161 depends on ARCH_TEGRA && TEGRA_AHB
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200162 select IOMMU_API
163 help
164 Enables support for remapping discontiguous physical memory
165 shared with the operating system into contiguous I/O virtual
166 space through the SMMU (System Memory Management Unit)
167 hardware included on Tegra SoCs.
168
KyongHo Cho2a965362012-05-12 05:56:09 +0900169config EXYNOS_IOMMU
170 bool "Exynos IOMMU Support"
171 depends on ARCH_EXYNOS && EXYNOS_DEV_SYSMMU
172 select IOMMU_API
173 help
174 Support for the IOMMU(System MMU) of Samsung Exynos application
175 processor family. This enables H/W multimedia accellerators to see
176 non-linear physical memory chunks as a linear memory in their
177 address spaces
178
179 If unsure, say N here.
180
181config EXYNOS_IOMMU_DEBUG
182 bool "Debugging log for Exynos IOMMU"
183 depends on EXYNOS_IOMMU
184 help
185 Select this to see the detailed log message that shows what
186 happens in the IOMMU driver
187
188 Say N unless you need kernel log message for IOMMU debugging
189
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900190config SHMOBILE_IPMMU
191 bool
192
193config SHMOBILE_IPMMU_TLB
194 bool
195
196config SHMOBILE_IOMMU
197 bool "IOMMU for Renesas IPMMU/IPMMUI"
198 default n
199 depends on (ARM && ARCH_SHMOBILE)
200 select IOMMU_API
201 select ARM_DMA_USE_IOMMU
202 select SHMOBILE_IPMMU
203 select SHMOBILE_IPMMU_TLB
204 help
205 Support for Renesas IPMMU/IPMMUI. This option enables
206 remapping of DMA memory accesses from all of the IP blocks
207 on the ICB.
208
209 Warning: Drivers (including userspace drivers of UIO
210 devices) of the IP blocks on the ICB *must* use addresses
211 allocated from the IPMMU (iova) for DMA with this option
212 enabled.
213
214 If unsure, say N.
215
216choice
217 prompt "IPMMU/IPMMUI address space size"
218 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
219 depends on SHMOBILE_IOMMU
220 help
221 This option sets IPMMU/IPMMUI address space size by
222 adjusting the 1st level page table size. The page table size
223 is calculated as follows:
224
225 page table size = number of page table entries * 4 bytes
226 number of page table entries = address space size / 1 MiB
227
228 For example, when the address space size is 2048 MiB, the
229 1st level page table size is 8192 bytes.
230
231 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
232 bool "2 GiB"
233
234 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
235 bool "1 GiB"
236
237 config SHMOBILE_IOMMU_ADDRSIZE_512MB
238 bool "512 MiB"
239
240 config SHMOBILE_IOMMU_ADDRSIZE_256MB
241 bool "256 MiB"
242
243 config SHMOBILE_IOMMU_ADDRSIZE_128MB
244 bool "128 MiB"
245
246 config SHMOBILE_IOMMU_ADDRSIZE_64MB
247 bool "64 MiB"
248
249 config SHMOBILE_IOMMU_ADDRSIZE_32MB
250 bool "32 MiB"
251
252endchoice
253
254config SHMOBILE_IOMMU_L1SIZE
255 int
256 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
257 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
258 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
259 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
260 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
261 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
262 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
263
Joerg Roedel68255b62011-06-14 15:51:54 +0200264endif # IOMMU_SUPPORT