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Chris Leechc13c8262006-05-23 17:18:44 -07001#
2# DMA engine configuration
3#
4
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07005menuconfig DMADEVICES
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08006 bool "DMA Engine support"
Dan Williams04ce9ab2009-06-03 14:22:28 -07007 depends on HAS_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07008 help
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08009 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
Dan Williams9c402f42008-06-27 01:21:11 -070012 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
Chris Leechc13c8262006-05-23 17:18:44 -070015
Linus Walleij6c664a82010-02-09 22:34:54 +010016config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
19 help
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
26 help
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
30
31
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070032if DMADEVICES
Chris Leechdb217332006-06-17 21:24:58 -070033
Chris Leech0bbd5f42006-05-23 17:35:34 -070034comment "DMA Devices"
35
Vinod Koulb3c567e2010-07-21 13:28:10 +053036config INTEL_MID_DMAC
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
38 depends on PCI && X86
39 select DMA_ENGINE
40 default n
41 help
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
44
45 Say Y here if you have such a chipset.
46
47 If unsure, say N.
48
Dan Williams138f4c32009-09-08 17:42:51 -070049config ASYNC_TX_DISABLE_CHANNEL_SWITCH
50 bool
51
Chris Leech0bbd5f42006-05-23 17:35:34 -070052config INTEL_IOATDMA
53 tristate "Intel I/OAT DMA support"
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070054 depends on PCI && X86
55 select DMA_ENGINE
56 select DCA
Dan Williams138f4c32009-09-08 17:42:51 -070057 select ASYNC_TX_DISABLE_CHANNEL_SWITCH
Dan Williams7b3cc2b2009-11-19 17:10:37 -070058 select ASYNC_TX_DISABLE_PQ_VAL_DMA
59 select ASYNC_TX_DISABLE_XOR_VAL_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070060 help
61 Enable support for the Intel(R) I/OAT DMA engine present
62 in recent Intel Xeon chipsets.
63
64 Say Y here if you have such a chipset.
65
66 If unsure, say N.
Dan Williamsc2110922007-01-02 13:52:26 -070067
68config INTEL_IOP_ADMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070069 tristate "Intel IOP ADMA support"
70 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070071 select DMA_ENGINE
72 help
73 Enable support for the Intel(R) IOP Series RAID engines.
Dan Williamsc2110922007-01-02 13:52:26 -070074
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -070075config DW_DMAC
76 tristate "Synopsys DesignWare AHB DMA support"
77 depends on AVR32
78 select DMA_ENGINE
79 default y if CPU_AT32AP7000
80 help
81 Support the Synopsys DesignWare AHB DMA controller. This
82 can be integrated in chips such as the Atmel AT32ap7000.
83
Nicolas Ferredc78baa2009-07-03 19:24:33 +020084config AT_HDMAC
85 tristate "Atmel AHB DMA support"
Yegor Yefremovcd3abf92009-10-23 11:27:59 +010086 depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
Nicolas Ferredc78baa2009-07-03 19:24:33 +020087 select DMA_ENGINE
88 help
89 Support the Atmel AHB DMA controller. This can be integrated in
90 chips such as the Atmel AT91SAM9RL.
91
Zhang Wei173acc72008-03-01 07:42:48 -070092config FSL_DMA
Timur Tabi77cd62e2008-09-26 17:00:11 -070093 tristate "Freescale Elo and Elo Plus DMA support"
94 depends on FSL_SOC
Zhang Wei173acc72008-03-01 07:42:48 -070095 select DMA_ENGINE
96 ---help---
Timur Tabi77cd62e2008-09-26 17:00:11 -070097 Enable support for the Freescale Elo and Elo Plus DMA controllers.
98 The Elo is the DMA controller on some 82xx and 83xx parts, and the
99 Elo Plus is the DMA controller on 85xx and 86xx parts.
Zhang Wei173acc72008-03-01 07:42:48 -0700100
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000101config MPC512X_DMA
102 tristate "Freescale MPC512x built-in DMA engine support"
103 depends on PPC_MPC512x
104 select DMA_ENGINE
105 ---help---
106 Enable support for the Freescale MPC512x built-in DMA engine.
107
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700108config MV_XOR
109 bool "Marvell XOR engine support"
110 depends on PLAT_ORION
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700111 select DMA_ENGINE
112 ---help---
113 Enable support for the Marvell XOR engine.
114
Guennadi Liakhovetski5296b562009-01-19 15:36:21 -0700115config MX3_IPU
116 bool "MX3x Image Processing Unit support"
117 depends on ARCH_MX3
118 select DMA_ENGINE
119 default y
120 help
121 If you plan to use the Image Processing unit in the i.MX3x, say
122 Y here. If unsure, select Y.
123
124config MX3_IPU_IRQS
125 int "Number of dynamically mapped interrupts for IPU"
126 depends on MX3_IPU
127 range 2 137
128 default 4
129 help
130 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
131 To avoid bloating the irq_desc[] array we allocate a sufficient
132 number of IRQ slots and map them dynamically to specific sources.
133
Atsushi Nemotoea76f0b2009-04-23 00:40:30 +0900134config TXX9_DMAC
135 tristate "Toshiba TXx9 SoC DMA support"
136 depends on MACH_TX49XX || MACH_TX39XX
137 select DMA_ENGINE
138 help
139 Support the TXx9 SoC internal DMA controller. This can be
140 integrated in chips such as the Toshiba TX4927/38/39.
141
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000142config SH_DMAE
143 tristate "Renesas SuperH DMAC support"
Magnus Damm927a7c92010-03-19 04:47:19 +0000144 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000145 depends on !SH_DMA_API
146 select DMA_ENGINE
147 help
148 Enable support for the Renesas SuperH DMA controllers.
149
Linus Walleij61f135b2009-11-19 19:49:17 +0100150config COH901318
151 bool "ST-Ericsson COH901318 DMA support"
152 select DMA_ENGINE
153 depends on ARCH_U300
154 help
155 Enable support for ST-Ericsson COH 901 318 DMA.
156
Linus Walleij8d318a52010-03-30 15:33:42 +0200157config STE_DMA40
158 bool "ST-Ericsson DMA40 support"
159 depends on ARCH_U8500
160 select DMA_ENGINE
161 help
162 Support for ST-Ericsson DMA40 controller
163
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700164config AMCC_PPC440SPE_ADMA
165 tristate "AMCC PPC440SPe ADMA support"
166 depends on 440SPe || 440SP
167 select DMA_ENGINE
168 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
169 help
170 Enable support for the AMCC PPC440SPe RAID engines.
171
Richard Röjforsde5d4452010-03-25 19:44:21 +0100172config TIMB_DMA
173 tristate "Timberdale FPGA DMA support"
174 depends on MFD_TIMBERDALE || HAS_IOMEM
175 select DMA_ENGINE
176 help
177 Enable support for the Timberdale FPGA DMA engine.
178
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700179config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
180 bool
181
Jassi Brarb3040e42010-05-23 20:28:19 -0700182config PL330_DMA
183 tristate "DMA API Driver for PL330"
184 select DMA_ENGINE
185 depends on PL330
186 help
187 Select if your platform has one or more PL330 DMACs.
188 You need to provide platform specific settings via
189 platform_data for a dma-pl330 device.
190
Yong Wang0c42bd02010-07-30 16:23:03 +0800191config PCH_DMA
192 tristate "Topcliff PCH DMA support"
193 depends on PCI && X86
194 select DMA_ENGINE
195 help
196 Enable support for the Topcliff PCH DMA engine.
197
Sascha Hauer1ec1e822010-09-30 13:56:34 +0000198config IMX_SDMA
199 tristate "i.MX SDMA support"
200 depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5
201 select DMA_ENGINE
202 help
203 Support the i.MX SDMA engine. This engine is integrated into
204 Freescale i.MX25/31/35/51 chips.
205
Sascha Hauer1f1846c2010-10-06 10:25:55 +0200206config IMX_DMA
207 tristate "i.MX DMA support"
208 depends on ARCH_MX1 || ARCH_MX21 || MACH_MX27
209 select DMA_ENGINE
210 help
211 Support the i.MX DMA engine. This engine is integrated into
212 Freescale i.MX1/21/27 chips.
213
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700214config DMA_ENGINE
215 bool
216
217comment "DMA Clients"
218 depends on DMA_ENGINE
219
220config NET_DMA
221 bool "Network: TCP receive copy offload"
222 depends on DMA_ENGINE && NET
Dan Williams9c402f42008-06-27 01:21:11 -0700223 default (INTEL_IOATDMA || FSL_DMA)
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700224 help
225 This enables the use of DMA engines in the network stack to
226 offload receive copy-to-user operations, freeing CPU cycles.
Dan Williams9c402f42008-06-27 01:21:11 -0700227
228 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
229 say N.
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700230
Dan Williams729b5d12009-03-25 09:13:25 -0700231config ASYNC_TX_DMA
232 bool "Async_tx: Offload support for the async_tx api"
Dan Williams9a8de632009-09-08 15:06:10 -0700233 depends on DMA_ENGINE
Dan Williams729b5d12009-03-25 09:13:25 -0700234 help
235 This allows the async_tx api to take advantage of offload engines for
236 memcpy, memset, xor, and raid6 p+q operations. If your platform has
237 a dma engine that can perform raid operations and you have enabled
238 MD_RAID456 say Y.
239
240 If unsure, say N.
241
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700242config DMATEST
243 tristate "DMA Test client"
244 depends on DMA_ENGINE
245 help
246 Simple DMA test client. Say N unless you're debugging a
247 DMA Device driver.
248
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700249endif