Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/pcmcia/soc_common.h |
| 3 | * |
| 4 | * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu> |
| 5 | * |
| 6 | * This file contains definitions for the PCMCIA support code common to |
| 7 | * integrated SOCs like the SA-11x0 and PXA2xx microprocessors. |
| 8 | */ |
| 9 | #ifndef _ASM_ARCH_PCMCIA |
| 10 | #define _ASM_ARCH_PCMCIA |
| 11 | |
| 12 | /* include the world */ |
| 13 | #include <linux/cpufreq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <pcmcia/cs_types.h> |
| 15 | #include <pcmcia/cs.h> |
| 16 | #include <pcmcia/ss.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <pcmcia/cistpl.h> |
| 18 | #include "cs_internal.h" |
| 19 | |
| 20 | |
| 21 | struct device; |
| 22 | struct pcmcia_low_level; |
| 23 | |
| 24 | /* |
| 25 | * This structure encapsulates per-socket state which we might need to |
| 26 | * use when responding to a Card Services query of some kind. |
| 27 | */ |
| 28 | struct soc_pcmcia_socket { |
| 29 | struct pcmcia_socket socket; |
| 30 | |
| 31 | /* |
| 32 | * Info from low level handler |
| 33 | */ |
| 34 | struct device *dev; |
| 35 | unsigned int nr; |
| 36 | unsigned int irq; |
| 37 | |
| 38 | /* |
| 39 | * Core PCMCIA state |
| 40 | */ |
| 41 | struct pcmcia_low_level *ops; |
| 42 | |
| 43 | unsigned int status; |
| 44 | socket_state_t cs_state; |
| 45 | |
| 46 | unsigned short spd_io[MAX_IO_WIN]; |
| 47 | unsigned short spd_mem[MAX_WIN]; |
| 48 | unsigned short spd_attr[MAX_WIN]; |
| 49 | |
| 50 | struct resource res_skt; |
| 51 | struct resource res_io; |
| 52 | struct resource res_mem; |
| 53 | struct resource res_attr; |
| 54 | void __iomem *virt_io; |
| 55 | |
| 56 | unsigned int irq_state; |
| 57 | |
| 58 | struct timer_list poll_timer; |
| 59 | struct list_head node; |
| 60 | }; |
| 61 | |
| 62 | struct pcmcia_state { |
| 63 | unsigned detect: 1, |
| 64 | ready: 1, |
| 65 | bvd1: 1, |
| 66 | bvd2: 1, |
| 67 | wrprot: 1, |
| 68 | vs_3v: 1, |
| 69 | vs_Xv: 1; |
| 70 | }; |
| 71 | |
| 72 | struct pcmcia_low_level { |
| 73 | struct module *owner; |
| 74 | |
| 75 | /* first socket in system */ |
| 76 | int first; |
| 77 | /* nr of sockets */ |
| 78 | int nr; |
| 79 | |
| 80 | int (*hw_init)(struct soc_pcmcia_socket *); |
| 81 | void (*hw_shutdown)(struct soc_pcmcia_socket *); |
| 82 | |
| 83 | void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *); |
| 84 | int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *); |
| 85 | |
| 86 | /* |
| 87 | * Enable card status IRQs on (re-)initialisation. This can |
| 88 | * be called at initialisation, power management event, or |
| 89 | * pcmcia event. |
| 90 | */ |
| 91 | void (*socket_init)(struct soc_pcmcia_socket *); |
| 92 | |
| 93 | /* |
| 94 | * Disable card status IRQs and PCMCIA bus on suspend. |
| 95 | */ |
| 96 | void (*socket_suspend)(struct soc_pcmcia_socket *); |
| 97 | |
| 98 | /* |
| 99 | * Hardware specific timing routines. |
| 100 | * If provided, the get_timing routine overrides the SOC default. |
| 101 | */ |
| 102 | unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int); |
| 103 | int (*set_timing)(struct soc_pcmcia_socket *); |
| 104 | int (*show_timing)(struct soc_pcmcia_socket *, char *); |
| 105 | |
| 106 | #ifdef CONFIG_CPU_FREQ |
| 107 | /* |
| 108 | * CPUFREQ support. |
| 109 | */ |
| 110 | int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *); |
| 111 | #endif |
| 112 | }; |
| 113 | |
| 114 | |
| 115 | struct pcmcia_irqs { |
| 116 | int sock; |
| 117 | int irq; |
| 118 | const char *str; |
| 119 | }; |
| 120 | |
| 121 | struct soc_pcmcia_timing { |
| 122 | unsigned short io; |
| 123 | unsigned short mem; |
| 124 | unsigned short attr; |
| 125 | }; |
| 126 | |
| 127 | extern int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); |
| 128 | extern void soc_pcmcia_free_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); |
| 129 | extern void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); |
| 130 | extern void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); |
| 131 | extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *); |
| 132 | |
| 133 | |
| 134 | extern struct list_head soc_pcmcia_sockets; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | |
| 136 | extern int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr); |
| 137 | extern int soc_common_drv_pcmcia_remove(struct device *dev); |
| 138 | |
| 139 | |
| 140 | #ifdef DEBUG |
| 141 | |
| 142 | extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func, |
| 143 | int lvl, const char *fmt, ...); |
| 144 | |
| 145 | #define debug(skt, lvl, fmt, arg...) \ |
| 146 | soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg) |
| 147 | |
| 148 | #else |
| 149 | #define debug(skt, lvl, fmt, arg...) do { } while (0) |
| 150 | #endif |
| 151 | |
| 152 | |
| 153 | /* |
| 154 | * The PC Card Standard, Release 7, section 4.13.4, says that twIORD |
| 155 | * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has |
| 156 | * a minimum value of 165ns, as well. Section 4.7.2 (describing |
| 157 | * common and attribute memory write timing) says that twWE has a |
| 158 | * minimum value of 150ns for a 250ns cycle time (for 5V operation; |
| 159 | * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V |
| 160 | * operation, also section 4.7.4). Section 4.7.3 says that taOE |
| 161 | * has a maximum value of 150ns for a 300ns cycle time (for 5V |
| 162 | * operation), or 300ns for a 600ns cycle time (for 3.3V operation). |
| 163 | * |
| 164 | * When configuring memory maps, Card Services appears to adopt the policy |
| 165 | * that a memory access time of "0" means "use the default." The default |
| 166 | * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute |
| 167 | * and memory command width time is 150ns; the PCMCIA 3.3V attribute and |
| 168 | * memory command width time is 300ns. |
| 169 | */ |
| 170 | #define SOC_PCMCIA_IO_ACCESS (165) |
| 171 | #define SOC_PCMCIA_5V_MEM_ACCESS (150) |
| 172 | #define SOC_PCMCIA_3V_MEM_ACCESS (300) |
| 173 | #define SOC_PCMCIA_ATTR_MEM_ACCESS (300) |
| 174 | |
| 175 | /* |
| 176 | * The socket driver actually works nicely in interrupt-driven form, |
| 177 | * so the (relatively infrequent) polling is "just to be sure." |
| 178 | */ |
| 179 | #define SOC_PCMCIA_POLL_PERIOD (2*HZ) |
| 180 | |
| 181 | |
| 182 | /* I/O pins replacing memory pins |
| 183 | * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75) |
| 184 | * |
| 185 | * These signals change meaning when going from memory-only to |
| 186 | * memory-or-I/O interface: |
| 187 | */ |
| 188 | #define iostschg bvd1 |
| 189 | #define iospkr bvd2 |
| 190 | |
| 191 | #endif |