Stephen Rothwell | 78b0973 | 2005-11-19 01:40:46 +1100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2004 IBM |
| 3 | * |
| 4 | * Implements the generic device dma API for powerpc. |
| 5 | * the pci and vio busses |
| 6 | */ |
| 7 | #ifndef _ASM_DMA_MAPPING_H |
| 8 | #define _ASM_DMA_MAPPING_H |
| 9 | |
| 10 | #include <linux/config.h> |
| 11 | #include <linux/types.h> |
| 12 | #include <linux/cache.h> |
| 13 | /* need struct page definitions */ |
| 14 | #include <linux/mm.h> |
| 15 | #include <asm/scatterlist.h> |
| 16 | #include <asm/io.h> |
| 17 | #include <asm/bug.h> |
| 18 | |
| 19 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) |
| 20 | |
| 21 | #ifdef CONFIG_NOT_COHERENT_CACHE |
| 22 | /* |
| 23 | * DMA-consistent mapping functions for PowerPCs that don't support |
| 24 | * cache snooping. These allocate/free a region of uncached mapped |
| 25 | * memory space for use with DMA devices. Alternatively, you could |
| 26 | * allocate the space "normally" and use the cache management functions |
| 27 | * to ensure it is consistent. |
| 28 | */ |
| 29 | extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp); |
| 30 | extern void __dma_free_coherent(size_t size, void *vaddr); |
| 31 | extern void __dma_sync(void *vaddr, size_t size, int direction); |
| 32 | extern void __dma_sync_page(struct page *page, unsigned long offset, |
| 33 | size_t size, int direction); |
| 34 | |
| 35 | #else /* ! CONFIG_NOT_COHERENT_CACHE */ |
| 36 | /* |
| 37 | * Cache coherent cores. |
| 38 | */ |
| 39 | |
| 40 | #define __dma_alloc_coherent(gfp, size, handle) NULL |
| 41 | #define __dma_free_coherent(size, addr) do { } while (0) |
| 42 | #define __dma_sync(addr, size, rw) do { } while (0) |
| 43 | #define __dma_sync_page(pg, off, sz, rw) do { } while (0) |
| 44 | |
| 45 | #endif /* ! CONFIG_NOT_COHERENT_CACHE */ |
| 46 | |
| 47 | #ifdef CONFIG_PPC64 |
| 48 | |
| 49 | extern int dma_supported(struct device *dev, u64 mask); |
| 50 | extern int dma_set_mask(struct device *dev, u64 dma_mask); |
| 51 | extern void *dma_alloc_coherent(struct device *dev, size_t size, |
| 52 | dma_addr_t *dma_handle, gfp_t flag); |
| 53 | extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, |
| 54 | dma_addr_t dma_handle); |
| 55 | extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, |
| 56 | size_t size, enum dma_data_direction direction); |
| 57 | extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, |
| 58 | size_t size, enum dma_data_direction direction); |
| 59 | extern dma_addr_t dma_map_page(struct device *dev, struct page *page, |
| 60 | unsigned long offset, size_t size, |
| 61 | enum dma_data_direction direction); |
| 62 | extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, |
| 63 | size_t size, enum dma_data_direction direction); |
| 64 | extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, |
| 65 | enum dma_data_direction direction); |
| 66 | extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, |
| 67 | int nhwentries, enum dma_data_direction direction); |
| 68 | |
| 69 | #else /* CONFIG_PPC64 */ |
| 70 | |
| 71 | #define dma_supported(dev, mask) (1) |
| 72 | |
| 73 | static inline int dma_set_mask(struct device *dev, u64 dma_mask) |
| 74 | { |
| 75 | if (!dev->dma_mask || !dma_supported(dev, mask)) |
| 76 | return -EIO; |
| 77 | |
| 78 | *dev->dma_mask = dma_mask; |
| 79 | |
| 80 | return 0; |
| 81 | } |
| 82 | |
| 83 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
| 84 | dma_addr_t * dma_handle, |
| 85 | gfp_t gfp) |
| 86 | { |
| 87 | #ifdef CONFIG_NOT_COHERENT_CACHE |
| 88 | return __dma_alloc_coherent(size, dma_handle, gfp); |
| 89 | #else |
| 90 | void *ret; |
| 91 | /* ignore region specifiers */ |
| 92 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); |
| 93 | |
| 94 | if (dev == NULL || dev->coherent_dma_mask < 0xffffffff) |
| 95 | gfp |= GFP_DMA; |
| 96 | |
| 97 | ret = (void *)__get_free_pages(gfp, get_order(size)); |
| 98 | |
| 99 | if (ret != NULL) { |
| 100 | memset(ret, 0, size); |
| 101 | *dma_handle = virt_to_bus(ret); |
| 102 | } |
| 103 | |
| 104 | return ret; |
| 105 | #endif |
| 106 | } |
| 107 | |
| 108 | static inline void |
| 109 | dma_free_coherent(struct device *dev, size_t size, void *vaddr, |
| 110 | dma_addr_t dma_handle) |
| 111 | { |
| 112 | #ifdef CONFIG_NOT_COHERENT_CACHE |
| 113 | __dma_free_coherent(size, vaddr); |
| 114 | #else |
| 115 | free_pages((unsigned long)vaddr, get_order(size)); |
| 116 | #endif |
| 117 | } |
| 118 | |
| 119 | static inline dma_addr_t |
| 120 | dma_map_single(struct device *dev, void *ptr, size_t size, |
| 121 | enum dma_data_direction direction) |
| 122 | { |
| 123 | BUG_ON(direction == DMA_NONE); |
| 124 | |
| 125 | __dma_sync(ptr, size, direction); |
| 126 | |
| 127 | return virt_to_bus(ptr); |
| 128 | } |
| 129 | |
| 130 | /* We do nothing. */ |
| 131 | #define dma_unmap_single(dev, addr, size, dir) do { } while (0) |
| 132 | |
| 133 | static inline dma_addr_t |
| 134 | dma_map_page(struct device *dev, struct page *page, |
| 135 | unsigned long offset, size_t size, |
| 136 | enum dma_data_direction direction) |
| 137 | { |
| 138 | BUG_ON(direction == DMA_NONE); |
| 139 | |
| 140 | __dma_sync_page(page, offset, size, direction); |
| 141 | |
| 142 | return page_to_bus(page) + offset; |
| 143 | } |
| 144 | |
| 145 | /* We do nothing. */ |
| 146 | #define dma_unmap_page(dev, handle, size, dir) do { } while (0) |
| 147 | |
| 148 | static inline int |
| 149 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, |
| 150 | enum dma_data_direction direction) |
| 151 | { |
| 152 | int i; |
| 153 | |
| 154 | BUG_ON(direction == DMA_NONE); |
| 155 | |
| 156 | for (i = 0; i < nents; i++, sg++) { |
| 157 | BUG_ON(!sg->page); |
| 158 | __dma_sync_page(sg->page, sg->offset, sg->length, direction); |
| 159 | sg->dma_address = page_to_bus(sg->page) + sg->offset; |
| 160 | } |
| 161 | |
| 162 | return nents; |
| 163 | } |
| 164 | |
| 165 | /* We don't do anything here. */ |
| 166 | #define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) |
| 167 | |
| 168 | #endif /* CONFIG_PPC64 */ |
| 169 | |
| 170 | static inline void dma_sync_single_for_cpu(struct device *dev, |
| 171 | dma_addr_t dma_handle, size_t size, |
| 172 | enum dma_data_direction direction) |
| 173 | { |
| 174 | BUG_ON(direction == DMA_NONE); |
| 175 | __dma_sync(bus_to_virt(dma_handle), size, direction); |
| 176 | } |
| 177 | |
| 178 | static inline void dma_sync_single_for_device(struct device *dev, |
| 179 | dma_addr_t dma_handle, size_t size, |
| 180 | enum dma_data_direction direction) |
| 181 | { |
| 182 | BUG_ON(direction == DMA_NONE); |
| 183 | __dma_sync(bus_to_virt(dma_handle), size, direction); |
| 184 | } |
| 185 | |
| 186 | static inline void dma_sync_sg_for_cpu(struct device *dev, |
| 187 | struct scatterlist *sg, int nents, |
| 188 | enum dma_data_direction direction) |
| 189 | { |
| 190 | int i; |
| 191 | |
| 192 | BUG_ON(direction == DMA_NONE); |
| 193 | |
| 194 | for (i = 0; i < nents; i++, sg++) |
| 195 | __dma_sync_page(sg->page, sg->offset, sg->length, direction); |
| 196 | } |
| 197 | |
| 198 | static inline void dma_sync_sg_for_device(struct device *dev, |
| 199 | struct scatterlist *sg, int nents, |
| 200 | enum dma_data_direction direction) |
| 201 | { |
| 202 | int i; |
| 203 | |
| 204 | BUG_ON(direction == DMA_NONE); |
| 205 | |
| 206 | for (i = 0; i < nents; i++, sg++) |
| 207 | __dma_sync_page(sg->page, sg->offset, sg->length, direction); |
| 208 | } |
| 209 | |
| 210 | static inline int dma_mapping_error(dma_addr_t dma_addr) |
| 211 | { |
| 212 | #ifdef CONFIG_PPC64 |
| 213 | return (dma_addr == DMA_ERROR_CODE); |
| 214 | #else |
| 215 | return 0; |
| 216 | #endif |
| 217 | } |
| 218 | |
| 219 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
| 220 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) |
| 221 | #ifdef CONFIG_NOT_COHERENT_CACHE |
| 222 | #define dma_is_consistent(d) (0) |
| 223 | #else |
| 224 | #define dma_is_consistent(d) (1) |
| 225 | #endif |
| 226 | |
| 227 | static inline int dma_get_cache_alignment(void) |
| 228 | { |
| 229 | #ifdef CONFIG_PPC64 |
| 230 | /* no easy way to get cache size on all processors, so return |
| 231 | * the maximum possible, to be safe */ |
Ravikiran G Thirumalai | 1fd73c6 | 2006-01-08 01:01:28 -0800 | [diff] [blame^] | 232 | return (1 << INTERNODE_CACHE_SHIFT); |
Stephen Rothwell | 78b0973 | 2005-11-19 01:40:46 +1100 | [diff] [blame] | 233 | #else |
| 234 | /* |
| 235 | * Each processor family will define its own L1_CACHE_SHIFT, |
| 236 | * L1_CACHE_BYTES wraps to this, so this is always safe. |
| 237 | */ |
| 238 | return L1_CACHE_BYTES; |
| 239 | #endif |
| 240 | } |
| 241 | |
| 242 | static inline void dma_sync_single_range_for_cpu(struct device *dev, |
| 243 | dma_addr_t dma_handle, unsigned long offset, size_t size, |
| 244 | enum dma_data_direction direction) |
| 245 | { |
| 246 | /* just sync everything for now */ |
| 247 | dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction); |
| 248 | } |
| 249 | |
| 250 | static inline void dma_sync_single_range_for_device(struct device *dev, |
| 251 | dma_addr_t dma_handle, unsigned long offset, size_t size, |
| 252 | enum dma_data_direction direction) |
| 253 | { |
| 254 | /* just sync everything for now */ |
| 255 | dma_sync_single_for_device(dev, dma_handle, offset + size, direction); |
| 256 | } |
| 257 | |
| 258 | static inline void dma_cache_sync(void *vaddr, size_t size, |
| 259 | enum dma_data_direction direction) |
| 260 | { |
| 261 | BUG_ON(direction == DMA_NONE); |
| 262 | __dma_sync(vaddr, size, (int)direction); |
| 263 | } |
| 264 | |
| 265 | /* |
| 266 | * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO |
| 267 | */ |
| 268 | struct dma_mapping_ops { |
| 269 | void * (*alloc_coherent)(struct device *dev, size_t size, |
| 270 | dma_addr_t *dma_handle, gfp_t flag); |
| 271 | void (*free_coherent)(struct device *dev, size_t size, |
| 272 | void *vaddr, dma_addr_t dma_handle); |
| 273 | dma_addr_t (*map_single)(struct device *dev, void *ptr, |
| 274 | size_t size, enum dma_data_direction direction); |
| 275 | void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, |
| 276 | size_t size, enum dma_data_direction direction); |
| 277 | int (*map_sg)(struct device *dev, struct scatterlist *sg, |
| 278 | int nents, enum dma_data_direction direction); |
| 279 | void (*unmap_sg)(struct device *dev, struct scatterlist *sg, |
| 280 | int nents, enum dma_data_direction direction); |
| 281 | int (*dma_supported)(struct device *dev, u64 mask); |
| 282 | int (*dac_dma_supported)(struct device *dev, u64 mask); |
| 283 | }; |
| 284 | |
| 285 | #endif /* _ASM_DMA_MAPPING_H */ |