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Bryan Wu1394f032007-05-06 14:50:22 -07001/*
2 * File: include/asm-blackfin/simple_bf533_dma.h
3 * Based on: none - original work
4 * Author: LG Soft India
5 * Copyright (C) 2004-2005 Analog Devices Inc.
6 * Created: Tue Sep 21 2004
7 * Description: This file contains the major Data structures and constants
8 * used for DMA Implementation in BF533
9 * Modified:
10 *
11 * Bugs: Enter bugs at http://blackfin.uclinux.org/
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2, or (at your option)
16 * any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; see the file COPYING.
25 * If not, write to the Free Software Foundation,
26 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#ifndef _BLACKFIN_DMA_H_
30#define _BLACKFIN_DMA_H_
31
32#include <asm/io.h>
33#include <linux/slab.h>
34#include <asm/irq.h>
35#include <asm/signal.h>
36#include <asm/semaphore.h>
37
38#include <linux/kernel.h>
39#include <asm/mach/dma.h>
40#include <linux/mm.h>
41#include <linux/interrupt.h>
42#include <asm/blackfin.h>
43
44#define MAX_DMA_ADDRESS PAGE_OFFSET
45
46/*****************************************************************************
47* Generic DMA Declarations
48*
49****************************************************************************/
50enum dma_chan_status {
51 DMA_CHANNEL_FREE,
52 DMA_CHANNEL_REQUESTED,
53 DMA_CHANNEL_ENABLED,
54};
55
56/*-------------------------
57 * config reg bits value
58 *-------------------------*/
59#define DATA_SIZE_8 0
60#define DATA_SIZE_16 1
61#define DATA_SIZE_32 2
62
63#define DMA_FLOW_STOP 0
64#define DMA_FLOW_AUTO 1
65#define DMA_FLOW_ARRAY 4
66#define DMA_FLOW_SMALL 6
67#define DMA_FLOW_LARGE 7
68
69#define DIMENSION_LINEAR 0
70#define DIMENSION_2D 1
71
72#define DIR_READ 0
73#define DIR_WRITE 1
74
75#define INTR_DISABLE 0
76#define INTR_ON_BUF 2
77#define INTR_ON_ROW 3
78
Michael Hennerich2047e402008-01-22 15:29:18 +080079#define DMA_NOSYNC_KEEP_DMA_BUF 0
80#define DMA_SYNC_RESTART 1
81
Bryan Wu1394f032007-05-06 14:50:22 -070082struct dmasg {
83 unsigned long next_desc_addr;
84 unsigned long start_addr;
85 unsigned short cfg;
86 unsigned short x_count;
87 short x_modify;
88 unsigned short y_count;
89 short y_modify;
90} __attribute__((packed));
91
92struct dma_register {
93 unsigned long next_desc_ptr; /* DMA Next Descriptor Pointer register */
94 unsigned long start_addr; /* DMA Start address register */
95
96 unsigned short cfg; /* DMA Configuration register */
97 unsigned short dummy1; /* DMA Configuration register */
98
99 unsigned long reserved;
100
101 unsigned short x_count; /* DMA x_count register */
102 unsigned short dummy2;
103
104 short x_modify; /* DMA x_modify register */
105 unsigned short dummy3;
106
107 unsigned short y_count; /* DMA y_count register */
108 unsigned short dummy4;
109
110 short y_modify; /* DMA y_modify register */
111 unsigned short dummy5;
112
113 unsigned long curr_desc_ptr; /* DMA Current Descriptor Pointer
114 register */
Bryan Wu452af712007-10-22 00:02:14 +0800115 unsigned long curr_addr_ptr; /* DMA Current Address Pointer
Bryan Wu1394f032007-05-06 14:50:22 -0700116 register */
117 unsigned short irq_status; /* DMA irq status register */
118 unsigned short dummy6;
119
120 unsigned short peripheral_map; /* DMA peripheral map register */
121 unsigned short dummy7;
122
123 unsigned short curr_x_count; /* DMA Current x-count register */
124 unsigned short dummy8;
125
126 unsigned long reserved2;
127
128 unsigned short curr_y_count; /* DMA Current y-count register */
129 unsigned short dummy9;
130
131 unsigned long reserved3;
132
133};
134
135typedef irqreturn_t(*dma_interrupt_t) (int irq, void *dev_id);
136
137struct dma_channel {
138 struct mutex dmalock;
139 char *device_id;
140 enum dma_chan_status chan_status;
141 struct dma_register *regs;
142 struct dmasg *sg; /* large mode descriptor */
143 unsigned int ctrl_num; /* controller number */
144 dma_interrupt_t irq_callback;
145 void *data;
146 unsigned int dma_enable_flag;
147 unsigned int loopback_flag;
148};
149
150/*******************************************************************************
151* DMA API's
152*******************************************************************************/
153/* functions to set register mode */
154void set_dma_start_addr(unsigned int channel, unsigned long addr);
155void set_dma_next_desc_addr(unsigned int channel, unsigned long addr);
Sonic Zhang8a26ac72007-08-05 16:14:58 +0800156void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr);
Bryan Wu1394f032007-05-06 14:50:22 -0700157void set_dma_x_count(unsigned int channel, unsigned short x_count);
158void set_dma_x_modify(unsigned int channel, short x_modify);
159void set_dma_y_count(unsigned int channel, unsigned short y_count);
160void set_dma_y_modify(unsigned int channel, short y_modify);
161void set_dma_config(unsigned int channel, unsigned short config);
162unsigned short set_bfin_dma_config(char direction, char flow_mode,
Michael Hennerich2047e402008-01-22 15:29:18 +0800163 char intr_mode, char dma_mode, char width,
164 char syncmode);
Roy Huang1d945e22007-10-10 23:31:19 +0800165void set_dma_curr_addr(unsigned int channel, unsigned long addr);
Bryan Wu1394f032007-05-06 14:50:22 -0700166
167/* get curr status for polling */
168unsigned short get_dma_curr_irqstat(unsigned int channel);
169unsigned short get_dma_curr_xcount(unsigned int channel);
170unsigned short get_dma_curr_ycount(unsigned int channel);
Bryan Wu452af712007-10-22 00:02:14 +0800171unsigned long get_dma_next_desc_ptr(unsigned int channel);
172unsigned long get_dma_curr_desc_ptr(unsigned int channel);
173unsigned long get_dma_curr_addr(unsigned int channel);
Bryan Wu1394f032007-05-06 14:50:22 -0700174
175/* set large DMA mode descriptor */
176void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg);
177
178/* check if current channel is in use */
179int dma_channel_active(unsigned int channel);
180
181/* common functions must be called in any mode */
182void free_dma(unsigned int channel);
183int dma_channel_active(unsigned int channel); /* check if a channel is in use */
184void disable_dma(unsigned int channel);
185void enable_dma(unsigned int channel);
186int request_dma(unsigned int channel, char *device_id);
187int set_dma_callback(unsigned int channel, dma_interrupt_t callback,
188 void *data);
189void dma_disable_irq(unsigned int channel);
190void dma_enable_irq(unsigned int channel);
191void clear_dma_irqstat(unsigned int channel);
192void *dma_memcpy(void *dest, const void *src, size_t count);
193void *safe_dma_memcpy(void *dest, const void *src, size_t count);
194
195#endif