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Linus Torvalds1da177e2005-04-16 15:20:36 -07001AMD64 specific boot options
2
3There are many others (usually documented in driver documentation), but
4only the AMD64 specific ones are listed here.
5
6Machine check
7
Andi Kleen8780e8e2009-05-27 21:56:56 +02008 Please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables.
9
Hidetoshi Seto62fdac52009-06-11 16:06:07 +090010 mce=off
11 Disable machine check
12 mce=no_cmci
13 Disable CMCI(Corrected Machine Check Interrupt) that
14 Intel processor supports. Usually this disablement is
15 not recommended, but it might be handy if your hardware
16 is misbehaving.
17 Note that you'll get more problems without CMCI than with
18 due to the shared banks, i.e. you might get duplicated
19 error logs.
20 mce=dont_log_ce
21 Don't make logs for corrected errors. All events reported
22 as corrected are silently cleared by OS.
23 This option will be useful if you have no interest in any
24 of corrected errors.
25 mce=ignore_ce
26 Disable features for corrected errors, e.g. polling timer
27 and CMCI. All events reported as corrected are not cleared
28 by OS and remained in its error banks.
29 Usually this disablement is not recommended, however if
30 there is an agent checking/clearing corrected errors
31 (e.g. BIOS or hardware monitoring applications), conflicting
32 with OS's error handling, and you cannot deactivate the agent,
33 then this option will be a help.
34 mce=bootlog
35 Enable logging of machine checks left over from booting.
36 Disabled by default on AMD because some BIOS leave bogus ones.
37 If your BIOS doesn't do that it's a good idea to enable though
38 to make sure you log even machine check events that result
39 in a reboot. On Intel systems it is enabled by default.
Andi Kleene5835382005-11-05 17:25:54 +010040 mce=nobootlog
41 Disable boot machine check logging.
Andi Kleen3c079792009-05-27 21:56:55 +020042 mce=tolerancelevel[,monarchtimeout] (number,number)
43 tolerance levels:
Tim Hockinbd784322007-07-21 17:10:37 +020044 0: always panic on uncorrected errors, log corrected errors
45 1: panic or SIGBUS on uncorrected errors, log corrected errors
46 2: SIGBUS or log uncorrected errors, log corrected errors
47 3: never panic or SIGBUS, log all errors (for testing only)
48 Default is 1
Andi Kleen8c566ef2005-09-12 18:49:24 +020049 Can be also set using sysfs which is preferable.
Andi Kleen3c079792009-05-27 21:56:55 +020050 monarchtimeout:
51 Sets the time in us to wait for other CPUs on machine checks. 0
52 to disable.
Naveen N. Rao450cc202012-09-27 10:08:00 -070053 mce=bios_cmci_threshold
54 Don't overwrite the bios-set CMCI threshold. This boot option
55 prevents Linux from overwriting the CMCI threshold set by the
56 bios. Without this option, Linux always sets the CMCI
57 threshold to 1. Enabling this may make memory predictive failure
58 analysis less effective if the bios sets thresholds for memory
59 errors since we will not see details for all errors.
Linus Torvalds1da177e2005-04-16 15:20:36 -070060
61 nomce (for compatibility with i386): same as mce=off
62
63 Everything else is in sysfs now.
64
65APICs
66
67 apic Use IO-APIC. Default
68
69 noapic Don't use the IO-APIC.
70
71 disableapic Don't use the local APIC
72
73 nolapic Don't use the local APIC (alias for i386 compatibility)
74
Uwe Hermann71cced62008-10-20 09:32:21 -070075 pirq=... See Documentation/x86/i386/IO-APIC.txt
Linus Torvalds1da177e2005-04-16 15:20:36 -070076
77 noapictimer Don't set up the APIC timer
78
Andi Kleen14d98ca2005-05-20 14:27:59 -070079 no_timer_check Don't check the IO-APIC timer. This can work around
80 problems with incorrect timer initialization on some boards.
Andi Kleen0c3749c2006-02-03 21:51:41 +010081 apicpmtimer
82 Do APIC timer calibration using the pmtimer. Implies
83 apicmaintimer. Useful when your PIT timer is totally
84 broken.
85
Linus Torvalds1da177e2005-04-16 15:20:36 -070086Timing
87
88 notsc
89 Don't use the CPU time stamp counter to read the wall time.
90 This can be used to work around timing problems on multiprocessor systems
Andi Kleenef4d7cb2005-07-28 21:15:34 -070091 with not properly synchronized CPUs.
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
Linus Torvalds1da177e2005-04-16 15:20:36 -070093 nohpet
94 Don't use the HPET timer.
95
96Idle loop
97
98 idle=poll
99 Don't do power saving in the idle loop using HLT, but poll for rescheduling
100 event. This will make the CPUs eat a lot more power, but may be useful
101 to get slightly better performance in multiprocessor benchmarks. It also
102 makes some profiling using performance counters more accurate.
Andi Kleenef4d7cb2005-07-28 21:15:34 -0700103 Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
104 CPUs) this option has no performance advantage over the normal idle loop.
105 It may also interact badly with hyperthreading.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106
107Rebooting
108
Huang, Ying9ad65e42008-01-30 13:31:19 +0100109 reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]
Matt LaPlanted6bc8ac2006-10-03 22:54:15 +0200110 bios Use the CPU reboot vector for warm reset
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 warm Don't set the cold reboot flag
112 cold Set the cold reboot flag
113 triple Force a triple fault (init)
114 kbd Use the keyboard controller. cold reset (default)
Aaron Durbinfa20efd2008-01-30 13:31:17 +0100115 acpi Use the ACPI RESET_REG in the FADT. If ACPI is not configured or the
116 ACPI reset does not work, the reboot path attempts the reset using
117 the keyboard controller.
Huang, Ying9ad65e42008-01-30 13:31:19 +0100118 efi Use efi reset_system runtime service. If EFI is not configured or the
119 EFI reset does not work, the reboot path attempts the reset using
120 the keyboard controller.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
122 Using warm reset will be much faster especially on big memory
123 systems because the BIOS will not go through the memory check.
124 Disadvantage is that not all hardware will be completely reinitialized
125 on reboot so there may be boot problems on some systems.
126
127 reboot=force
128
129 Don't stop other CPUs on reboot. This can make reboot more reliable
130 in some cases.
131
132Non Executable Mappings
133
134 noexec=on|off
135
136 on Enable(default)
137 off Disable
138
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139NUMA
140
141 numa=off Only set up a single NUMA node spanning all memory.
142
143 numa=noacpi Don't parse the SRAT table for NUMA setup
144
David Rientjes8df5bb342010-02-15 13:43:30 -0800145 numa=fake=<size>[MG]
146 If given as a memory unit, fills all system RAM with nodes of
147 size interleaved over physical nodes.
148
David Rientjesca2107c2010-02-15 13:43:33 -0800149 numa=fake=<N>
150 If given as an integer, fills all system RAM with N fake nodes
151 interleaved over physical nodes.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152
153ACPI
154
155 acpi=off Don't enable ACPI
156 acpi=ht Use ACPI boot table parsing, but don't enable ACPI
157 interpreter
158 acpi=force Force ACPI on (currently not needed)
159
160 acpi=strict Disable out of spec ACPI workarounds.
161
162 acpi_sci={edge,level,high,low} Set up ACPI SCI interrupt.
163
164 acpi=noirq Don't route interrupts
165
Naveen N. Rao9ad95872013-07-01 21:08:54 +0530166 acpi=nocmcff Disable firmware first mode for corrected errors. This
167 disables parsing the HEST CMC error source to check if
168 firmware has set the FF flag. This may result in
169 duplicate corrected error reports.
170
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171PCI
172
Lucas De Marchia6c32702011-03-17 16:24:15 -0300173 pci=off Don't use PCI
174 pci=conf1 Use conf1 access.
175 pci=conf2 Use conf2 access.
176 pci=rom Assign ROMs.
177 pci=assign-busses Assign busses
178 pci=irqmask=MASK Set PCI interrupt mask to MASK
179 pci=lastbus=NUMBER Scan up to NUMBER busses, no matter what the mptable says.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180 pci=noacpi Don't use ACPI to set up PCI interrupt routing.
181
Karsten Weiss55588702007-02-13 13:26:21 +0100182IOMMU (input/output memory management unit)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183
Karsten Weiss55588702007-02-13 13:26:21 +0100184 Currently four x86-64 PCI-DMA mapping implementations exist:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185
Karsten Weiss55588702007-02-13 13:26:21 +0100186 1. <arch/x86_64/kernel/pci-nommu.c>: use no hardware/software IOMMU at all
187 (e.g. because you have < 3 GB memory).
188 Kernel boot message: "PCI-DMA: Disabling IOMMU"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189
Joerg Roedelfffcda12011-05-10 17:22:06 +0200190 2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
Karsten Weiss55588702007-02-13 13:26:21 +0100191 Kernel boot message: "PCI-DMA: using GART IOMMU"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192
Karsten Weiss55588702007-02-13 13:26:21 +0100193 3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
194 e.g. if there is no hardware IOMMU in the system and it is need because
195 you have >3GB memory or told the kernel to us it (iommu=soft))
196 Kernel boot message: "PCI-DMA: Using software bounce buffering
197 for IO (SWIOTLB)"
198
199 4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
200 pSeries and xSeries servers. This hardware IOMMU supports DMA address
201 mapping with memory protection, etc.
202 Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
203
204 iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
205 [,memaper[=<order>]][,merge][,forcesac][,fullflush][,nomerge]
206 [,noaperture][,calgary]
207
208 General iommu options:
209 off Don't initialize and use any kind of IOMMU.
210 noforce Don't force hardware IOMMU usage when it is not needed.
211 (default).
212 force Force the use of the hardware IOMMU even when it is
213 not actually needed (e.g. because < 3 GB memory).
214 soft Use software bounce buffering (SWIOTLB) (default for
215 Intel machines). This can be used to prevent the usage
216 of an available hardware IOMMU.
217
218 iommu options only relevant to the AMD GART hardware IOMMU:
219 <size> Set the size of the remapping area in bytes.
220 allowed Overwrite iommu off workarounds for specific chipsets.
221 fullflush Flush IOMMU on each allocation (default).
222 nofullflush Don't use IOMMU fullflush.
223 leak Turn on simple iommu leak tracing (only when
224 CONFIG_IOMMU_LEAK is on). Default number of leak pages
225 is 20.
226 memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order.
227 (default: order=1, i.e. 64MB)
Randy Dunlap57d30772007-02-13 13:26:23 +0100228 merge Do scatter-gather (SG) merging. Implies "force"
Karsten Weiss55588702007-02-13 13:26:21 +0100229 (experimental).
Randy Dunlap57d30772007-02-13 13:26:23 +0100230 nomerge Don't do scatter-gather (SG) merging.
Karsten Weiss55588702007-02-13 13:26:21 +0100231 noaperture Ask the IOMMU not to touch the aperture for AGP.
232 forcesac Force single-address cycle (SAC) mode for masks <40bits
233 (experimental).
234 noagp Don't initialize the AGP driver and use full aperture.
235 allowdac Allow double-address cycle (DAC) mode, i.e. DMA >4GB.
236 DAC is used with 32-bit PCI to push a 64-bit address in
237 two cycles. When off all DMA over >4GB is forced through
238 an IOMMU or software bounce buffering.
239 nodac Forbid DAC mode, i.e. DMA >4GB.
240 panic Always panic when IOMMU overflows.
241 calgary Use the Calgary IOMMU if it is available
242
243 iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
244 implementation:
245 swiotlb=<pages>[,force]
246 <pages> Prereserve that many 128K pages for the software IO
247 bounce buffering.
248 force Force all IO through the software TLB.
249
250 Settings for the IBM Calgary hardware IOMMU currently found in IBM
251 pSeries and xSeries machines:
252
253 calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
254 calgary=[translate_empty_slots]
255 calgary=[disable=<PCI bus number>]
256 panic Always panic when IOMMU overflows
Jon Masone4650582006-06-26 13:58:14 +0200257
258 64k,...,8M - Set the size of each PCI slot's translation table
259 when using the Calgary IOMMU. This is the size of the translation
260 table itself in main memory. The smallest table, 64k, covers an IO
261 space of 32MB; the largest, 8MB table, can cover an IO space of
262 4GB. Normally the kernel will make the right choice by itself.
263
264 translate_empty_slots - Enable translation even on slots that have
265 no devices attached to them, in case a device will be hotplugged
266 in the future.
267
268 disable=<PCI bus number> - Disable translation on a given PHB. For
269 example, the built-in graphics adapter resides on the first bridge
270 (PCI bus number 0); if translation (isolation) is enabled on this
271 bridge, X servers that access the hardware directly from user
272 space might stop working. Use this option if you have devices that
273 are accessed from userspace directly on some PCI host bridge.
274
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275Debugging
276
Randy Dunlap57d30772007-02-13 13:26:23 +0100277 kstack=N Print N words from the kernel stack in oops dumps.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278
Randy Dunlap57d30772007-02-13 13:26:23 +0100279Miscellaneous
Ingo Molnar00d1c5e2008-04-17 17:40:45 +0200280
281 nogbpages
282 Do not use GB pages for kernel direct mappings.
283 gbpages
284 Use GB pages for kernel direct mappings.