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gerrit-public.fairphone.software / kernel / msm-4.9 / 20ee7ccd76442de5360106d2d1d0a8b5513c00fb / . / drivers / gpu / drm / msm / sde_dbg.c
blob: 58069f21f1791cd5014cacfa93625565e4e2b704 [file] [log] [blame]
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]1/* Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
14
15#include <linux/delay.h>
16#include <linux/spinlock.h>
17#include <linux/ktime.h>
18#include <linux/debugfs.h>
19#include <linux/uaccess.h>
20#include <linux/dma-buf.h>
21#include <linux/slab.h>
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]22#include <linux/list_sort.h>
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]23
24#include "sde_dbg.h"
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]25#include "sde/sde_hw_catalog.h"
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]26
27#define SDE_DBG_BASE_MAX 10
28
29#define DEFAULT_PANIC 1
30#define DEFAULT_REGDUMP SDE_DBG_DUMP_IN_MEM
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]31#define DEFAULT_DBGBUS_SDE SDE_DBG_DUMP_IN_MEM
32#define DEFAULT_DBGBUS_VBIFRT SDE_DBG_DUMP_IN_MEM
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]33#define DEFAULT_BASE_REG_CNT 0x100
34#define GROUP_BYTES 4
35#define ROW_BYTES 16
36#define RANGE_NAME_LEN 40
37#define REG_BASE_NAME_LEN 80
38
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]39#define DBGBUS_FLAGS_DSPP BIT(0)
40#define DBGBUS_DSPP_STATUS 0x34C
41
42#define DBGBUS_NAME_SDE "sde"
43#define DBGBUS_NAME_VBIF_RT "vbif_rt"
44
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]45/* offsets from sde top address for the debug buses */
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]46#define DBGBUS_SSPP0 0x188
47#define DBGBUS_SSPP1 0x298
48#define DBGBUS_DSPP 0x348
49#define DBGBUS_PERIPH 0x418
50
51#define TEST_MASK(id, tp) ((id << 4) | (tp << 1) | BIT(0))
52
53/* following offsets are with respect to MDP VBIF base for DBG BUS access */
54#define MMSS_VBIF_CLKON 0x4
55#define MMSS_VBIF_TEST_BUS_OUT_CTRL 0x210
56#define MMSS_VBIF_TEST_BUS_OUT 0x230
57
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]58/* Vbif error info */
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]59#define MMSS_VBIF_PND_ERR 0x190
60#define MMSS_VBIF_SRC_ERR 0x194
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]61#define MMSS_VBIF_XIN_HALT_CTRL1 0x204
62#define MMSS_VBIF_ERR_INFO 0X1a0
63#define MMSS_VBIF_ERR_INFO_1 0x1a4
64#define MMSS_VBIF_CLIENT_NUM 14
65
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]66/* print debug ranges in groups of 4 u32s */
67#define REG_DUMP_ALIGN 16
68
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]69/**
70 * struct sde_dbg_reg_offset - tracking for start and end of region
71 * @start: start offset
72 * @start: end offset
73 */
74struct sde_dbg_reg_offset {
75 u32 start;
76 u32 end;
77};
78
79/**
80 * struct sde_dbg_reg_range - register dumping named sub-range
81 * @head: head of this node
82 * @reg_dump: address for the mem dump
83 * @range_name: name of this range
84 * @offset: offsets for range to dump
85 * @xin_id: client xin id
86 */
87struct sde_dbg_reg_range {
88 struct list_head head;
89 u32 *reg_dump;
90 char range_name[RANGE_NAME_LEN];
91 struct sde_dbg_reg_offset offset;
92 uint32_t xin_id;
93};
94
95/**
96 * struct sde_dbg_reg_base - register region base.
97 * may sub-ranges: sub-ranges are used for dumping
98 * or may not have sub-ranges: dumping is base -> max_offset
99 * @reg_base_head: head of this node
100 * @sub_range_list: head to the list with dump ranges
101 * @name: register base name
102 * @base: base pointer
103 * @off: cached offset of region for manual register dumping
104 * @cnt: cached range of region for manual register dumping
105 * @max_offset: length of region
106 * @buf: buffer used for manual register dumping
107 * @buf_len: buffer length used for manual register dumping
108 * @reg_dump: address for the mem dump if no ranges used
109 */
110struct sde_dbg_reg_base {
111 struct list_head reg_base_head;
112 struct list_head sub_range_list;
113 char name[REG_BASE_NAME_LEN];
114 void __iomem *base;
115 size_t off;
116 size_t cnt;
117 size_t max_offset;
118 char *buf;
119 size_t buf_len;
120 u32 *reg_dump;
121};
122
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]123struct sde_debug_bus_entry {
124 u32 wr_addr;
125 u32 block_id;
126 u32 test_id;
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]127 void (*analyzer)(struct sde_debug_bus_entry *entry, u32 val);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]128};
129
130struct vbif_debug_bus_entry {
131 u32 disable_bus_addr;
132 u32 block_bus_addr;
133 u32 bit_offset;
134 u32 block_cnt;
135 u32 test_pnt_start;
136 u32 test_pnt_cnt;
137};
138
139struct sde_dbg_debug_bus_common {
140 char *name;
141 u32 enable_mask;
142 bool include_in_deferred_work;
143 u32 flags;
144 u32 entries_size;
145 u32 *dumped_content;
146};
147
148struct sde_dbg_sde_debug_bus {
149 struct sde_dbg_debug_bus_common cmn;
150 struct sde_debug_bus_entry *entries;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]151 u32 top_blk_off;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]152};
153
154struct sde_dbg_vbif_debug_bus {
155 struct sde_dbg_debug_bus_common cmn;
156 struct vbif_debug_bus_entry *entries;
157};
158
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]159/**
160 * struct sde_dbg_base - global sde debug base structure
161 * @evtlog: event log instance
162 * @reg_base_list: list of register dumping regions
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]163 * @dev: device pointer
164 * @power_ctrl: callback structure for enabling power for reading hw registers
165 * @req_dump_blks: list of blocks requested for dumping
166 * @panic_on_err: whether to kernel panic after triggering dump via debugfs
167 * @dump_work: work struct for deferring register dump work to separate thread
168 * @work_panic: panic after dump if internal user passed "panic" special region
169 * @enable_reg_dump: whether to dump registers into memory, kernel log, or both
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]170 * @dbgbus_sde: debug bus structure for the sde
171 * @dbgbus_vbif_rt: debug bus structure for the realtime vbif
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]172 * @dump_all: dump all entries in register dump
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]173 */
174static struct sde_dbg_base {
175 struct sde_dbg_evtlog *evtlog;
176 struct list_head reg_base_list;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]177 struct device *dev;
178 struct sde_dbg_power_ctrl power_ctrl;
179
180 struct sde_dbg_reg_base *req_dump_blks[SDE_DBG_BASE_MAX];
181
182 u32 panic_on_err;
183 struct work_struct dump_work;
184 bool work_panic;
185 u32 enable_reg_dump;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]186
187 struct sde_dbg_sde_debug_bus dbgbus_sde;
188 struct sde_dbg_vbif_debug_bus dbgbus_vbif_rt;
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]189 bool dump_all;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]190} sde_dbg_base;
191
192/* sde_dbg_base_evtlog - global pointer to main sde event log for macro use */
193struct sde_dbg_evtlog *sde_dbg_base_evtlog;
194
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]195static void _sde_debug_bus_xbar_dump(struct sde_debug_bus_entry *entry,
196 u32 val)
197{
198 dev_err(sde_dbg_base.dev, "xbar 0x%x %d %d 0x%x\n",
199 entry->wr_addr, entry->block_id, entry->test_id, val);
200}
201
202static void _sde_debug_bus_lm_dump(struct sde_debug_bus_entry *entry,
203 u32 val)
204{
205 if (!(val & 0xFFF000))
206 return;
207
208 dev_err(sde_dbg_base.dev, "lm 0x%x %d %d 0x%x\n",
209 entry->wr_addr, entry->block_id, entry->test_id, val);
210}
211
212static void _sde_debug_bus_ppb0_dump(struct sde_debug_bus_entry *entry,
213 u32 val)
214{
215 if (!(val & BIT(15)))
216 return;
217
218 dev_err(sde_dbg_base.dev, "ppb0 0x%x %d %d 0x%x\n",
219 entry->wr_addr, entry->block_id, entry->test_id, val);
220}
221
222static void _sde_debug_bus_ppb1_dump(struct sde_debug_bus_entry *entry,
223 u32 val)
224{
225 if (!(val & BIT(15)))
226 return;
227
228 dev_err(sde_dbg_base.dev, "ppb1 0x%x %d %d 0x%x\n",
229 entry->wr_addr, entry->block_id, entry->test_id, val);
230}
231
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]232static struct sde_debug_bus_entry dbg_bus_sde_8998[] = {
233
234 /* Unpack 0 sspp 0*/
235 { DBGBUS_SSPP0, 50, 2 },
236 { DBGBUS_SSPP0, 60, 2 },
237 { DBGBUS_SSPP0, 70, 2 },
238 { DBGBUS_SSPP0, 85, 2 },
239
240 /* Upack 0 sspp 1*/
241 { DBGBUS_SSPP1, 50, 2 },
242 { DBGBUS_SSPP1, 60, 2 },
243 { DBGBUS_SSPP1, 70, 2 },
244 { DBGBUS_SSPP1, 85, 2 },
245
246 /* scheduler */
247 { DBGBUS_DSPP, 130, 0 },
248 { DBGBUS_DSPP, 130, 1 },
249 { DBGBUS_DSPP, 130, 2 },
250 { DBGBUS_DSPP, 130, 3 },
251 { DBGBUS_DSPP, 130, 4 },
252 { DBGBUS_DSPP, 130, 5 },
253
254 /* qseed */
255 { DBGBUS_SSPP0, 6, 0},
256 { DBGBUS_SSPP0, 6, 1},
257 { DBGBUS_SSPP0, 26, 0},
258 { DBGBUS_SSPP0, 26, 1},
259 { DBGBUS_SSPP1, 6, 0},
260 { DBGBUS_SSPP1, 6, 1},
261 { DBGBUS_SSPP1, 26, 0},
262 { DBGBUS_SSPP1, 26, 1},
263
264 /* scale */
265 { DBGBUS_SSPP0, 16, 0},
266 { DBGBUS_SSPP0, 16, 1},
267 { DBGBUS_SSPP0, 36, 0},
268 { DBGBUS_SSPP0, 36, 1},
269 { DBGBUS_SSPP1, 16, 0},
270 { DBGBUS_SSPP1, 16, 1},
271 { DBGBUS_SSPP1, 36, 0},
272 { DBGBUS_SSPP1, 36, 1},
273
274 /* fetch sspp0 */
275
276 /* vig 0 */
277 { DBGBUS_SSPP0, 0, 0 },
278 { DBGBUS_SSPP0, 0, 1 },
279 { DBGBUS_SSPP0, 0, 2 },
280 { DBGBUS_SSPP0, 0, 3 },
281 { DBGBUS_SSPP0, 0, 4 },
282 { DBGBUS_SSPP0, 0, 5 },
283 { DBGBUS_SSPP0, 0, 6 },
284 { DBGBUS_SSPP0, 0, 7 },
285
286 { DBGBUS_SSPP0, 1, 0 },
287 { DBGBUS_SSPP0, 1, 1 },
288 { DBGBUS_SSPP0, 1, 2 },
289 { DBGBUS_SSPP0, 1, 3 },
290 { DBGBUS_SSPP0, 1, 4 },
291 { DBGBUS_SSPP0, 1, 5 },
292 { DBGBUS_SSPP0, 1, 6 },
293 { DBGBUS_SSPP0, 1, 7 },
294
295 { DBGBUS_SSPP0, 2, 0 },
296 { DBGBUS_SSPP0, 2, 1 },
297 { DBGBUS_SSPP0, 2, 2 },
298 { DBGBUS_SSPP0, 2, 3 },
299 { DBGBUS_SSPP0, 2, 4 },
300 { DBGBUS_SSPP0, 2, 5 },
301 { DBGBUS_SSPP0, 2, 6 },
302 { DBGBUS_SSPP0, 2, 7 },
303
304 { DBGBUS_SSPP0, 4, 0 },
305 { DBGBUS_SSPP0, 4, 1 },
306 { DBGBUS_SSPP0, 4, 2 },
307 { DBGBUS_SSPP0, 4, 3 },
308 { DBGBUS_SSPP0, 4, 4 },
309 { DBGBUS_SSPP0, 4, 5 },
310 { DBGBUS_SSPP0, 4, 6 },
311 { DBGBUS_SSPP0, 4, 7 },
312
313 { DBGBUS_SSPP0, 5, 0 },
314 { DBGBUS_SSPP0, 5, 1 },
315 { DBGBUS_SSPP0, 5, 2 },
316 { DBGBUS_SSPP0, 5, 3 },
317 { DBGBUS_SSPP0, 5, 4 },
318 { DBGBUS_SSPP0, 5, 5 },
319 { DBGBUS_SSPP0, 5, 6 },
320 { DBGBUS_SSPP0, 5, 7 },
321
322 /* vig 2 */
323 { DBGBUS_SSPP0, 20, 0 },
324 { DBGBUS_SSPP0, 20, 1 },
325 { DBGBUS_SSPP0, 20, 2 },
326 { DBGBUS_SSPP0, 20, 3 },
327 { DBGBUS_SSPP0, 20, 4 },
328 { DBGBUS_SSPP0, 20, 5 },
329 { DBGBUS_SSPP0, 20, 6 },
330 { DBGBUS_SSPP0, 20, 7 },
331
332 { DBGBUS_SSPP0, 21, 0 },
333 { DBGBUS_SSPP0, 21, 1 },
334 { DBGBUS_SSPP0, 21, 2 },
335 { DBGBUS_SSPP0, 21, 3 },
336 { DBGBUS_SSPP0, 21, 4 },
337 { DBGBUS_SSPP0, 21, 5 },
338 { DBGBUS_SSPP0, 21, 6 },
339 { DBGBUS_SSPP0, 21, 7 },
340
341 { DBGBUS_SSPP0, 22, 0 },
342 { DBGBUS_SSPP0, 22, 1 },
343 { DBGBUS_SSPP0, 22, 2 },
344 { DBGBUS_SSPP0, 22, 3 },
345 { DBGBUS_SSPP0, 22, 4 },
346 { DBGBUS_SSPP0, 22, 5 },
347 { DBGBUS_SSPP0, 22, 6 },
348 { DBGBUS_SSPP0, 22, 7 },
349
350 { DBGBUS_SSPP0, 24, 0 },
351 { DBGBUS_SSPP0, 24, 1 },
352 { DBGBUS_SSPP0, 24, 2 },
353 { DBGBUS_SSPP0, 24, 3 },
354 { DBGBUS_SSPP0, 24, 4 },
355 { DBGBUS_SSPP0, 24, 5 },
356 { DBGBUS_SSPP0, 24, 6 },
357 { DBGBUS_SSPP0, 24, 7 },
358
359 { DBGBUS_SSPP0, 25, 0 },
360 { DBGBUS_SSPP0, 25, 1 },
361 { DBGBUS_SSPP0, 25, 2 },
362 { DBGBUS_SSPP0, 25, 3 },
363 { DBGBUS_SSPP0, 25, 4 },
364 { DBGBUS_SSPP0, 25, 5 },
365 { DBGBUS_SSPP0, 25, 6 },
366 { DBGBUS_SSPP0, 25, 7 },
367
368 /* dma 2 */
369 { DBGBUS_SSPP0, 30, 0 },
370 { DBGBUS_SSPP0, 30, 1 },
371 { DBGBUS_SSPP0, 30, 2 },
372 { DBGBUS_SSPP0, 30, 3 },
373 { DBGBUS_SSPP0, 30, 4 },
374 { DBGBUS_SSPP0, 30, 5 },
375 { DBGBUS_SSPP0, 30, 6 },
376 { DBGBUS_SSPP0, 30, 7 },
377
378 { DBGBUS_SSPP0, 31, 0 },
379 { DBGBUS_SSPP0, 31, 1 },
380 { DBGBUS_SSPP0, 31, 2 },
381 { DBGBUS_SSPP0, 31, 3 },
382 { DBGBUS_SSPP0, 31, 4 },
383 { DBGBUS_SSPP0, 31, 5 },
384 { DBGBUS_SSPP0, 31, 6 },
385 { DBGBUS_SSPP0, 31, 7 },
386
387 { DBGBUS_SSPP0, 32, 0 },
388 { DBGBUS_SSPP0, 32, 1 },
389 { DBGBUS_SSPP0, 32, 2 },
390 { DBGBUS_SSPP0, 32, 3 },
391 { DBGBUS_SSPP0, 32, 4 },
392 { DBGBUS_SSPP0, 32, 5 },
393 { DBGBUS_SSPP0, 32, 6 },
394 { DBGBUS_SSPP0, 32, 7 },
395
396 { DBGBUS_SSPP0, 33, 0 },
397 { DBGBUS_SSPP0, 33, 1 },
398 { DBGBUS_SSPP0, 33, 2 },
399 { DBGBUS_SSPP0, 33, 3 },
400 { DBGBUS_SSPP0, 33, 4 },
401 { DBGBUS_SSPP0, 33, 5 },
402 { DBGBUS_SSPP0, 33, 6 },
403 { DBGBUS_SSPP0, 33, 7 },
404
405 { DBGBUS_SSPP0, 34, 0 },
406 { DBGBUS_SSPP0, 34, 1 },
407 { DBGBUS_SSPP0, 34, 2 },
408 { DBGBUS_SSPP0, 34, 3 },
409 { DBGBUS_SSPP0, 34, 4 },
410 { DBGBUS_SSPP0, 34, 5 },
411 { DBGBUS_SSPP0, 34, 6 },
412 { DBGBUS_SSPP0, 34, 7 },
413
414 { DBGBUS_SSPP0, 35, 0 },
415 { DBGBUS_SSPP0, 35, 1 },
416 { DBGBUS_SSPP0, 35, 2 },
417 { DBGBUS_SSPP0, 35, 3 },
418
419 /* dma 0 */
420 { DBGBUS_SSPP0, 40, 0 },
421 { DBGBUS_SSPP0, 40, 1 },
422 { DBGBUS_SSPP0, 40, 2 },
423 { DBGBUS_SSPP0, 40, 3 },
424 { DBGBUS_SSPP0, 40, 4 },
425 { DBGBUS_SSPP0, 40, 5 },
426 { DBGBUS_SSPP0, 40, 6 },
427 { DBGBUS_SSPP0, 40, 7 },
428
429 { DBGBUS_SSPP0, 41, 0 },
430 { DBGBUS_SSPP0, 41, 1 },
431 { DBGBUS_SSPP0, 41, 2 },
432 { DBGBUS_SSPP0, 41, 3 },
433 { DBGBUS_SSPP0, 41, 4 },
434 { DBGBUS_SSPP0, 41, 5 },
435 { DBGBUS_SSPP0, 41, 6 },
436 { DBGBUS_SSPP0, 41, 7 },
437
438 { DBGBUS_SSPP0, 42, 0 },
439 { DBGBUS_SSPP0, 42, 1 },
440 { DBGBUS_SSPP0, 42, 2 },
441 { DBGBUS_SSPP0, 42, 3 },
442 { DBGBUS_SSPP0, 42, 4 },
443 { DBGBUS_SSPP0, 42, 5 },
444 { DBGBUS_SSPP0, 42, 6 },
445 { DBGBUS_SSPP0, 42, 7 },
446
447 { DBGBUS_SSPP0, 44, 0 },
448 { DBGBUS_SSPP0, 44, 1 },
449 { DBGBUS_SSPP0, 44, 2 },
450 { DBGBUS_SSPP0, 44, 3 },
451 { DBGBUS_SSPP0, 44, 4 },
452 { DBGBUS_SSPP0, 44, 5 },
453 { DBGBUS_SSPP0, 44, 6 },
454 { DBGBUS_SSPP0, 44, 7 },
455
456 { DBGBUS_SSPP0, 45, 0 },
457 { DBGBUS_SSPP0, 45, 1 },
458 { DBGBUS_SSPP0, 45, 2 },
459 { DBGBUS_SSPP0, 45, 3 },
460 { DBGBUS_SSPP0, 45, 4 },
461 { DBGBUS_SSPP0, 45, 5 },
462 { DBGBUS_SSPP0, 45, 6 },
463 { DBGBUS_SSPP0, 45, 7 },
464
465 /* fetch sspp1 */
466 /* vig 1 */
467 { DBGBUS_SSPP1, 0, 0 },
468 { DBGBUS_SSPP1, 0, 1 },
469 { DBGBUS_SSPP1, 0, 2 },
470 { DBGBUS_SSPP1, 0, 3 },
471 { DBGBUS_SSPP1, 0, 4 },
472 { DBGBUS_SSPP1, 0, 5 },
473 { DBGBUS_SSPP1, 0, 6 },
474 { DBGBUS_SSPP1, 0, 7 },
475
476 { DBGBUS_SSPP1, 1, 0 },
477 { DBGBUS_SSPP1, 1, 1 },
478 { DBGBUS_SSPP1, 1, 2 },
479 { DBGBUS_SSPP1, 1, 3 },
480 { DBGBUS_SSPP1, 1, 4 },
481 { DBGBUS_SSPP1, 1, 5 },
482 { DBGBUS_SSPP1, 1, 6 },
483 { DBGBUS_SSPP1, 1, 7 },
484
485 { DBGBUS_SSPP1, 2, 0 },
486 { DBGBUS_SSPP1, 2, 1 },
487 { DBGBUS_SSPP1, 2, 2 },
488 { DBGBUS_SSPP1, 2, 3 },
489 { DBGBUS_SSPP1, 2, 4 },
490 { DBGBUS_SSPP1, 2, 5 },
491 { DBGBUS_SSPP1, 2, 6 },
492 { DBGBUS_SSPP1, 2, 7 },
493
494 { DBGBUS_SSPP1, 4, 0 },
495 { DBGBUS_SSPP1, 4, 1 },
496 { DBGBUS_SSPP1, 4, 2 },
497 { DBGBUS_SSPP1, 4, 3 },
498 { DBGBUS_SSPP1, 4, 4 },
499 { DBGBUS_SSPP1, 4, 5 },
500 { DBGBUS_SSPP1, 4, 6 },
501 { DBGBUS_SSPP1, 4, 7 },
502
503 { DBGBUS_SSPP1, 5, 0 },
504 { DBGBUS_SSPP1, 5, 1 },
505 { DBGBUS_SSPP1, 5, 2 },
506 { DBGBUS_SSPP1, 5, 3 },
507 { DBGBUS_SSPP1, 5, 4 },
508 { DBGBUS_SSPP1, 5, 5 },
509 { DBGBUS_SSPP1, 5, 6 },
510 { DBGBUS_SSPP1, 5, 7 },
511
512 /* vig 3 */
513 { DBGBUS_SSPP1, 20, 0 },
514 { DBGBUS_SSPP1, 20, 1 },
515 { DBGBUS_SSPP1, 20, 2 },
516 { DBGBUS_SSPP1, 20, 3 },
517 { DBGBUS_SSPP1, 20, 4 },
518 { DBGBUS_SSPP1, 20, 5 },
519 { DBGBUS_SSPP1, 20, 6 },
520 { DBGBUS_SSPP1, 20, 7 },
521
522 { DBGBUS_SSPP1, 21, 0 },
523 { DBGBUS_SSPP1, 21, 1 },
524 { DBGBUS_SSPP1, 21, 2 },
525 { DBGBUS_SSPP1, 21, 3 },
526 { DBGBUS_SSPP1, 21, 4 },
527 { DBGBUS_SSPP1, 21, 5 },
528 { DBGBUS_SSPP1, 21, 6 },
529 { DBGBUS_SSPP1, 21, 7 },
530
531 { DBGBUS_SSPP1, 22, 0 },
532 { DBGBUS_SSPP1, 22, 1 },
533 { DBGBUS_SSPP1, 22, 2 },
534 { DBGBUS_SSPP1, 22, 3 },
535 { DBGBUS_SSPP1, 22, 4 },
536 { DBGBUS_SSPP1, 22, 5 },
537 { DBGBUS_SSPP1, 22, 6 },
538 { DBGBUS_SSPP1, 22, 7 },
539
540 { DBGBUS_SSPP1, 24, 0 },
541 { DBGBUS_SSPP1, 24, 1 },
542 { DBGBUS_SSPP1, 24, 2 },
543 { DBGBUS_SSPP1, 24, 3 },
544 { DBGBUS_SSPP1, 24, 4 },
545 { DBGBUS_SSPP1, 24, 5 },
546 { DBGBUS_SSPP1, 24, 6 },
547 { DBGBUS_SSPP1, 24, 7 },
548
549 { DBGBUS_SSPP1, 25, 0 },
550 { DBGBUS_SSPP1, 25, 1 },
551 { DBGBUS_SSPP1, 25, 2 },
552 { DBGBUS_SSPP1, 25, 3 },
553 { DBGBUS_SSPP1, 25, 4 },
554 { DBGBUS_SSPP1, 25, 5 },
555 { DBGBUS_SSPP1, 25, 6 },
556 { DBGBUS_SSPP1, 25, 7 },
557
558 /* dma 3 */
559 { DBGBUS_SSPP1, 30, 0 },
560 { DBGBUS_SSPP1, 30, 1 },
561 { DBGBUS_SSPP1, 30, 2 },
562 { DBGBUS_SSPP1, 30, 3 },
563 { DBGBUS_SSPP1, 30, 4 },
564 { DBGBUS_SSPP1, 30, 5 },
565 { DBGBUS_SSPP1, 30, 6 },
566 { DBGBUS_SSPP1, 30, 7 },
567
568 { DBGBUS_SSPP1, 31, 0 },
569 { DBGBUS_SSPP1, 31, 1 },
570 { DBGBUS_SSPP1, 31, 2 },
571 { DBGBUS_SSPP1, 31, 3 },
572 { DBGBUS_SSPP1, 31, 4 },
573 { DBGBUS_SSPP1, 31, 5 },
574 { DBGBUS_SSPP1, 31, 6 },
575 { DBGBUS_SSPP1, 31, 7 },
576
577 { DBGBUS_SSPP1, 32, 0 },
578 { DBGBUS_SSPP1, 32, 1 },
579 { DBGBUS_SSPP1, 32, 2 },
580 { DBGBUS_SSPP1, 32, 3 },
581 { DBGBUS_SSPP1, 32, 4 },
582 { DBGBUS_SSPP1, 32, 5 },
583 { DBGBUS_SSPP1, 32, 6 },
584 { DBGBUS_SSPP1, 32, 7 },
585
586 { DBGBUS_SSPP1, 33, 0 },
587 { DBGBUS_SSPP1, 33, 1 },
588 { DBGBUS_SSPP1, 33, 2 },
589 { DBGBUS_SSPP1, 33, 3 },
590 { DBGBUS_SSPP1, 33, 4 },
591 { DBGBUS_SSPP1, 33, 5 },
592 { DBGBUS_SSPP1, 33, 6 },
593 { DBGBUS_SSPP1, 33, 7 },
594
595 { DBGBUS_SSPP1, 34, 0 },
596 { DBGBUS_SSPP1, 34, 1 },
597 { DBGBUS_SSPP1, 34, 2 },
598 { DBGBUS_SSPP1, 34, 3 },
599 { DBGBUS_SSPP1, 34, 4 },
600 { DBGBUS_SSPP1, 34, 5 },
601 { DBGBUS_SSPP1, 34, 6 },
602 { DBGBUS_SSPP1, 34, 7 },
603
604 { DBGBUS_SSPP1, 35, 0 },
605 { DBGBUS_SSPP1, 35, 1 },
606 { DBGBUS_SSPP1, 35, 2 },
607
608 /* dma 1 */
609 { DBGBUS_SSPP1, 40, 0 },
610 { DBGBUS_SSPP1, 40, 1 },
611 { DBGBUS_SSPP1, 40, 2 },
612 { DBGBUS_SSPP1, 40, 3 },
613 { DBGBUS_SSPP1, 40, 4 },
614 { DBGBUS_SSPP1, 40, 5 },
615 { DBGBUS_SSPP1, 40, 6 },
616 { DBGBUS_SSPP1, 40, 7 },
617
618 { DBGBUS_SSPP1, 41, 0 },
619 { DBGBUS_SSPP1, 41, 1 },
620 { DBGBUS_SSPP1, 41, 2 },
621 { DBGBUS_SSPP1, 41, 3 },
622 { DBGBUS_SSPP1, 41, 4 },
623 { DBGBUS_SSPP1, 41, 5 },
624 { DBGBUS_SSPP1, 41, 6 },
625 { DBGBUS_SSPP1, 41, 7 },
626
627 { DBGBUS_SSPP1, 42, 0 },
628 { DBGBUS_SSPP1, 42, 1 },
629 { DBGBUS_SSPP1, 42, 2 },
630 { DBGBUS_SSPP1, 42, 3 },
631 { DBGBUS_SSPP1, 42, 4 },
632 { DBGBUS_SSPP1, 42, 5 },
633 { DBGBUS_SSPP1, 42, 6 },
634 { DBGBUS_SSPP1, 42, 7 },
635
636 { DBGBUS_SSPP1, 44, 0 },
637 { DBGBUS_SSPP1, 44, 1 },
638 { DBGBUS_SSPP1, 44, 2 },
639 { DBGBUS_SSPP1, 44, 3 },
640 { DBGBUS_SSPP1, 44, 4 },
641 { DBGBUS_SSPP1, 44, 5 },
642 { DBGBUS_SSPP1, 44, 6 },
643 { DBGBUS_SSPP1, 44, 7 },
644
645 { DBGBUS_SSPP1, 45, 0 },
646 { DBGBUS_SSPP1, 45, 1 },
647 { DBGBUS_SSPP1, 45, 2 },
648 { DBGBUS_SSPP1, 45, 3 },
649 { DBGBUS_SSPP1, 45, 4 },
650 { DBGBUS_SSPP1, 45, 5 },
651 { DBGBUS_SSPP1, 45, 6 },
652 { DBGBUS_SSPP1, 45, 7 },
653
654 /* cursor 1 */
655 { DBGBUS_SSPP1, 80, 0 },
656 { DBGBUS_SSPP1, 80, 1 },
657 { DBGBUS_SSPP1, 80, 2 },
658 { DBGBUS_SSPP1, 80, 3 },
659 { DBGBUS_SSPP1, 80, 4 },
660 { DBGBUS_SSPP1, 80, 5 },
661 { DBGBUS_SSPP1, 80, 6 },
662 { DBGBUS_SSPP1, 80, 7 },
663
664 { DBGBUS_SSPP1, 81, 0 },
665 { DBGBUS_SSPP1, 81, 1 },
666 { DBGBUS_SSPP1, 81, 2 },
667 { DBGBUS_SSPP1, 81, 3 },
668 { DBGBUS_SSPP1, 81, 4 },
669 { DBGBUS_SSPP1, 81, 5 },
670 { DBGBUS_SSPP1, 81, 6 },
671 { DBGBUS_SSPP1, 81, 7 },
672
673 { DBGBUS_SSPP1, 82, 0 },
674 { DBGBUS_SSPP1, 82, 1 },
675 { DBGBUS_SSPP1, 82, 2 },
676 { DBGBUS_SSPP1, 82, 3 },
677 { DBGBUS_SSPP1, 82, 4 },
678 { DBGBUS_SSPP1, 82, 5 },
679 { DBGBUS_SSPP1, 82, 6 },
680 { DBGBUS_SSPP1, 82, 7 },
681
682 { DBGBUS_SSPP1, 83, 0 },
683 { DBGBUS_SSPP1, 83, 1 },
684 { DBGBUS_SSPP1, 83, 2 },
685 { DBGBUS_SSPP1, 83, 3 },
686 { DBGBUS_SSPP1, 83, 4 },
687 { DBGBUS_SSPP1, 83, 5 },
688 { DBGBUS_SSPP1, 83, 6 },
689 { DBGBUS_SSPP1, 83, 7 },
690
691 { DBGBUS_SSPP1, 84, 0 },
692 { DBGBUS_SSPP1, 84, 1 },
693 { DBGBUS_SSPP1, 84, 2 },
694 { DBGBUS_SSPP1, 84, 3 },
695 { DBGBUS_SSPP1, 84, 4 },
696 { DBGBUS_SSPP1, 84, 5 },
697 { DBGBUS_SSPP1, 84, 6 },
698 { DBGBUS_SSPP1, 84, 7 },
699
700 /* dspp */
701 { DBGBUS_DSPP, 13, 0 },
702 { DBGBUS_DSPP, 19, 0 },
703 { DBGBUS_DSPP, 14, 0 },
704 { DBGBUS_DSPP, 14, 1 },
705 { DBGBUS_DSPP, 14, 3 },
706 { DBGBUS_DSPP, 20, 0 },
707 { DBGBUS_DSPP, 20, 1 },
708 { DBGBUS_DSPP, 20, 3 },
709
710 /* ppb_0 */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]711 { DBGBUS_DSPP, 31, 0, _sde_debug_bus_ppb0_dump },
712 { DBGBUS_DSPP, 33, 0, _sde_debug_bus_ppb0_dump },
713 { DBGBUS_DSPP, 35, 0, _sde_debug_bus_ppb0_dump },
714 { DBGBUS_DSPP, 42, 0, _sde_debug_bus_ppb0_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]715
716 /* ppb_1 */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]717 { DBGBUS_DSPP, 32, 0, _sde_debug_bus_ppb1_dump },
718 { DBGBUS_DSPP, 34, 0, _sde_debug_bus_ppb1_dump },
719 { DBGBUS_DSPP, 36, 0, _sde_debug_bus_ppb1_dump },
720 { DBGBUS_DSPP, 43, 0, _sde_debug_bus_ppb1_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]721
722 /* lm_lut */
723 { DBGBUS_DSPP, 109, 0 },
724 { DBGBUS_DSPP, 105, 0 },
725 { DBGBUS_DSPP, 103, 0 },
726
727 /* tear-check */
728 { DBGBUS_PERIPH, 63, 0 },
729 { DBGBUS_PERIPH, 64, 0 },
730 { DBGBUS_PERIPH, 65, 0 },
731 { DBGBUS_PERIPH, 73, 0 },
732 { DBGBUS_PERIPH, 74, 0 },
733
734 /* crossbar */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]735 { DBGBUS_DSPP, 0, 0, _sde_debug_bus_xbar_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]736
737 /* rotator */
738 { DBGBUS_DSPP, 9, 0},
739
740 /* blend */
741 /* LM0 */
742 { DBGBUS_DSPP, 63, 0},
743 { DBGBUS_DSPP, 63, 1},
744 { DBGBUS_DSPP, 63, 2},
745 { DBGBUS_DSPP, 63, 3},
746 { DBGBUS_DSPP, 63, 4},
747 { DBGBUS_DSPP, 63, 5},
748 { DBGBUS_DSPP, 63, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]749 { DBGBUS_DSPP, 63, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]750
751 { DBGBUS_DSPP, 64, 0},
752 { DBGBUS_DSPP, 64, 1},
753 { DBGBUS_DSPP, 64, 2},
754 { DBGBUS_DSPP, 64, 3},
755 { DBGBUS_DSPP, 64, 4},
756 { DBGBUS_DSPP, 64, 5},
757 { DBGBUS_DSPP, 64, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]758 { DBGBUS_DSPP, 64, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]759
760 { DBGBUS_DSPP, 65, 0},
761 { DBGBUS_DSPP, 65, 1},
762 { DBGBUS_DSPP, 65, 2},
763 { DBGBUS_DSPP, 65, 3},
764 { DBGBUS_DSPP, 65, 4},
765 { DBGBUS_DSPP, 65, 5},
766 { DBGBUS_DSPP, 65, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]767 { DBGBUS_DSPP, 65, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]768
769 { DBGBUS_DSPP, 66, 0},
770 { DBGBUS_DSPP, 66, 1},
771 { DBGBUS_DSPP, 66, 2},
772 { DBGBUS_DSPP, 66, 3},
773 { DBGBUS_DSPP, 66, 4},
774 { DBGBUS_DSPP, 66, 5},
775 { DBGBUS_DSPP, 66, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]776 { DBGBUS_DSPP, 66, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]777
778 { DBGBUS_DSPP, 67, 0},
779 { DBGBUS_DSPP, 67, 1},
780 { DBGBUS_DSPP, 67, 2},
781 { DBGBUS_DSPP, 67, 3},
782 { DBGBUS_DSPP, 67, 4},
783 { DBGBUS_DSPP, 67, 5},
784 { DBGBUS_DSPP, 67, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]785 { DBGBUS_DSPP, 67, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]786
787 { DBGBUS_DSPP, 68, 0},
788 { DBGBUS_DSPP, 68, 1},
789 { DBGBUS_DSPP, 68, 2},
790 { DBGBUS_DSPP, 68, 3},
791 { DBGBUS_DSPP, 68, 4},
792 { DBGBUS_DSPP, 68, 5},
793 { DBGBUS_DSPP, 68, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]794 { DBGBUS_DSPP, 68, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]795
796 { DBGBUS_DSPP, 69, 0},
797 { DBGBUS_DSPP, 69, 1},
798 { DBGBUS_DSPP, 69, 2},
799 { DBGBUS_DSPP, 69, 3},
800 { DBGBUS_DSPP, 69, 4},
801 { DBGBUS_DSPP, 69, 5},
802 { DBGBUS_DSPP, 69, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]803 { DBGBUS_DSPP, 69, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]804
805 /* LM1 */
806 { DBGBUS_DSPP, 70, 0},
807 { DBGBUS_DSPP, 70, 1},
808 { DBGBUS_DSPP, 70, 2},
809 { DBGBUS_DSPP, 70, 3},
810 { DBGBUS_DSPP, 70, 4},
811 { DBGBUS_DSPP, 70, 5},
812 { DBGBUS_DSPP, 70, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]813 { DBGBUS_DSPP, 70, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]814
815 { DBGBUS_DSPP, 71, 0},
816 { DBGBUS_DSPP, 71, 1},
817 { DBGBUS_DSPP, 71, 2},
818 { DBGBUS_DSPP, 71, 3},
819 { DBGBUS_DSPP, 71, 4},
820 { DBGBUS_DSPP, 71, 5},
821 { DBGBUS_DSPP, 71, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]822 { DBGBUS_DSPP, 71, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]823
824 { DBGBUS_DSPP, 72, 0},
825 { DBGBUS_DSPP, 72, 1},
826 { DBGBUS_DSPP, 72, 2},
827 { DBGBUS_DSPP, 72, 3},
828 { DBGBUS_DSPP, 72, 4},
829 { DBGBUS_DSPP, 72, 5},
830 { DBGBUS_DSPP, 72, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]831 { DBGBUS_DSPP, 72, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]832
833 { DBGBUS_DSPP, 73, 0},
834 { DBGBUS_DSPP, 73, 1},
835 { DBGBUS_DSPP, 73, 2},
836 { DBGBUS_DSPP, 73, 3},
837 { DBGBUS_DSPP, 73, 4},
838 { DBGBUS_DSPP, 73, 5},
839 { DBGBUS_DSPP, 73, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]840 { DBGBUS_DSPP, 73, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]841
842 { DBGBUS_DSPP, 74, 0},
843 { DBGBUS_DSPP, 74, 1},
844 { DBGBUS_DSPP, 74, 2},
845 { DBGBUS_DSPP, 74, 3},
846 { DBGBUS_DSPP, 74, 4},
847 { DBGBUS_DSPP, 74, 5},
848 { DBGBUS_DSPP, 74, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]849 { DBGBUS_DSPP, 74, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]850
851 { DBGBUS_DSPP, 75, 0},
852 { DBGBUS_DSPP, 75, 1},
853 { DBGBUS_DSPP, 75, 2},
854 { DBGBUS_DSPP, 75, 3},
855 { DBGBUS_DSPP, 75, 4},
856 { DBGBUS_DSPP, 75, 5},
857 { DBGBUS_DSPP, 75, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]858 { DBGBUS_DSPP, 75, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]859
860 { DBGBUS_DSPP, 76, 0},
861 { DBGBUS_DSPP, 76, 1},
862 { DBGBUS_DSPP, 76, 2},
863 { DBGBUS_DSPP, 76, 3},
864 { DBGBUS_DSPP, 76, 4},
865 { DBGBUS_DSPP, 76, 5},
866 { DBGBUS_DSPP, 76, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]867 { DBGBUS_DSPP, 76, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]868
869 /* LM2 */
870 { DBGBUS_DSPP, 77, 0},
871 { DBGBUS_DSPP, 77, 1},
872 { DBGBUS_DSPP, 77, 2},
873 { DBGBUS_DSPP, 77, 3},
874 { DBGBUS_DSPP, 77, 4},
875 { DBGBUS_DSPP, 77, 5},
876 { DBGBUS_DSPP, 77, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]877 { DBGBUS_DSPP, 77, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]878
879 { DBGBUS_DSPP, 78, 0},
880 { DBGBUS_DSPP, 78, 1},
881 { DBGBUS_DSPP, 78, 2},
882 { DBGBUS_DSPP, 78, 3},
883 { DBGBUS_DSPP, 78, 4},
884 { DBGBUS_DSPP, 78, 5},
885 { DBGBUS_DSPP, 78, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]886 { DBGBUS_DSPP, 78, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]887
888 { DBGBUS_DSPP, 79, 0},
889 { DBGBUS_DSPP, 79, 1},
890 { DBGBUS_DSPP, 79, 2},
891 { DBGBUS_DSPP, 79, 3},
892 { DBGBUS_DSPP, 79, 4},
893 { DBGBUS_DSPP, 79, 5},
894 { DBGBUS_DSPP, 79, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]895 { DBGBUS_DSPP, 79, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]896
897 { DBGBUS_DSPP, 80, 0},
898 { DBGBUS_DSPP, 80, 1},
899 { DBGBUS_DSPP, 80, 2},
900 { DBGBUS_DSPP, 80, 3},
901 { DBGBUS_DSPP, 80, 4},
902 { DBGBUS_DSPP, 80, 5},
903 { DBGBUS_DSPP, 80, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]904 { DBGBUS_DSPP, 80, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]905
906 { DBGBUS_DSPP, 81, 0},
907 { DBGBUS_DSPP, 81, 1},
908 { DBGBUS_DSPP, 81, 2},
909 { DBGBUS_DSPP, 81, 3},
910 { DBGBUS_DSPP, 81, 4},
911 { DBGBUS_DSPP, 81, 5},
912 { DBGBUS_DSPP, 81, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]913 { DBGBUS_DSPP, 81, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]914
915 { DBGBUS_DSPP, 82, 0},
916 { DBGBUS_DSPP, 82, 1},
917 { DBGBUS_DSPP, 82, 2},
918 { DBGBUS_DSPP, 82, 3},
919 { DBGBUS_DSPP, 82, 4},
920 { DBGBUS_DSPP, 82, 5},
921 { DBGBUS_DSPP, 82, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]922 { DBGBUS_DSPP, 82, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]923
924 { DBGBUS_DSPP, 83, 0},
925 { DBGBUS_DSPP, 83, 1},
926 { DBGBUS_DSPP, 83, 2},
927 { DBGBUS_DSPP, 83, 3},
928 { DBGBUS_DSPP, 83, 4},
929 { DBGBUS_DSPP, 83, 5},
930 { DBGBUS_DSPP, 83, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]931 { DBGBUS_DSPP, 83, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]932
933 /* csc */
934 { DBGBUS_SSPP0, 7, 0},
935 { DBGBUS_SSPP0, 7, 1},
936 { DBGBUS_SSPP0, 27, 0},
937 { DBGBUS_SSPP0, 27, 1},
938 { DBGBUS_SSPP1, 7, 0},
939 { DBGBUS_SSPP1, 7, 1},
940 { DBGBUS_SSPP1, 27, 0},
941 { DBGBUS_SSPP1, 27, 1},
942
943 /* pcc */
944 { DBGBUS_SSPP0, 3, 3},
945 { DBGBUS_SSPP0, 23, 3},
946 { DBGBUS_SSPP0, 33, 3},
947 { DBGBUS_SSPP0, 43, 3},
948 { DBGBUS_SSPP1, 3, 3},
949 { DBGBUS_SSPP1, 23, 3},
950 { DBGBUS_SSPP1, 33, 3},
951 { DBGBUS_SSPP1, 43, 3},
952
953 /* spa */
954 { DBGBUS_SSPP0, 8, 0},
955 { DBGBUS_SSPP0, 28, 0},
956 { DBGBUS_SSPP1, 8, 0},
957 { DBGBUS_SSPP1, 28, 0},
958 { DBGBUS_DSPP, 13, 0},
959 { DBGBUS_DSPP, 19, 0},
960
961 /* igc */
962 { DBGBUS_SSPP0, 9, 0},
963 { DBGBUS_SSPP0, 9, 1},
964 { DBGBUS_SSPP0, 9, 3},
965 { DBGBUS_SSPP0, 29, 0},
966 { DBGBUS_SSPP0, 29, 1},
967 { DBGBUS_SSPP0, 29, 3},
968 { DBGBUS_SSPP0, 17, 0},
969 { DBGBUS_SSPP0, 17, 1},
970 { DBGBUS_SSPP0, 17, 3},
971 { DBGBUS_SSPP0, 37, 0},
972 { DBGBUS_SSPP0, 37, 1},
973 { DBGBUS_SSPP0, 37, 3},
974 { DBGBUS_SSPP0, 46, 0},
975 { DBGBUS_SSPP0, 46, 1},
976 { DBGBUS_SSPP0, 46, 3},
977
978 { DBGBUS_SSPP1, 9, 0},
979 { DBGBUS_SSPP1, 9, 1},
980 { DBGBUS_SSPP1, 9, 3},
981 { DBGBUS_SSPP1, 29, 0},
982 { DBGBUS_SSPP1, 29, 1},
983 { DBGBUS_SSPP1, 29, 3},
984 { DBGBUS_SSPP1, 17, 0},
985 { DBGBUS_SSPP1, 17, 1},
986 { DBGBUS_SSPP1, 17, 3},
987 { DBGBUS_SSPP1, 37, 0},
988 { DBGBUS_SSPP1, 37, 1},
989 { DBGBUS_SSPP1, 37, 3},
990 { DBGBUS_SSPP1, 46, 0},
991 { DBGBUS_SSPP1, 46, 1},
992 { DBGBUS_SSPP1, 46, 3},
993
994 { DBGBUS_DSPP, 14, 0},
995 { DBGBUS_DSPP, 14, 1},
996 { DBGBUS_DSPP, 14, 3},
997 { DBGBUS_DSPP, 20, 0},
998 { DBGBUS_DSPP, 20, 1},
999 { DBGBUS_DSPP, 20, 3},
1000
1001 { DBGBUS_PERIPH, 60, 0},
1002};
1003
1004static struct sde_debug_bus_entry dbg_bus_sde_sdm845[] = {
1005
1006 /* Unpack 0 sspp 0*/
1007 { DBGBUS_SSPP0, 50, 2 },
1008 { DBGBUS_SSPP0, 60, 2 },
1009 { DBGBUS_SSPP0, 70, 2 },
1010
1011 /* Upack 0 sspp 1*/
1012 { DBGBUS_SSPP1, 50, 2 },
1013 { DBGBUS_SSPP1, 60, 2 },
1014 { DBGBUS_SSPP1, 70, 2 },
1015
1016 /* scheduler */
1017 { DBGBUS_DSPP, 130, 0 },
1018 { DBGBUS_DSPP, 130, 1 },
1019 { DBGBUS_DSPP, 130, 2 },
1020 { DBGBUS_DSPP, 130, 3 },
1021 { DBGBUS_DSPP, 130, 4 },
1022 { DBGBUS_DSPP, 130, 5 },
1023
1024 /* qseed */
1025 { DBGBUS_SSPP0, 6, 0},
1026 { DBGBUS_SSPP0, 6, 1},
1027 { DBGBUS_SSPP0, 26, 0},
1028 { DBGBUS_SSPP0, 26, 1},
1029 { DBGBUS_SSPP1, 6, 0},
1030 { DBGBUS_SSPP1, 6, 1},
1031 { DBGBUS_SSPP1, 26, 0},
1032 { DBGBUS_SSPP1, 26, 1},
1033
1034 /* scale */
1035 { DBGBUS_SSPP0, 16, 0},
1036 { DBGBUS_SSPP0, 16, 1},
1037 { DBGBUS_SSPP0, 36, 0},
1038 { DBGBUS_SSPP0, 36, 1},
1039 { DBGBUS_SSPP1, 16, 0},
1040 { DBGBUS_SSPP1, 16, 1},
1041 { DBGBUS_SSPP1, 36, 0},
1042 { DBGBUS_SSPP1, 36, 1},
1043
1044 /* fetch sspp0 */
1045
1046 /* vig 0 */
1047 { DBGBUS_SSPP0, 0, 0 },
1048 { DBGBUS_SSPP0, 0, 1 },
1049 { DBGBUS_SSPP0, 0, 2 },
1050 { DBGBUS_SSPP0, 0, 3 },
1051 { DBGBUS_SSPP0, 0, 4 },
1052 { DBGBUS_SSPP0, 0, 5 },
1053 { DBGBUS_SSPP0, 0, 6 },
1054 { DBGBUS_SSPP0, 0, 7 },
1055
1056 { DBGBUS_SSPP0, 1, 0 },
1057 { DBGBUS_SSPP0, 1, 1 },
1058 { DBGBUS_SSPP0, 1, 2 },
1059 { DBGBUS_SSPP0, 1, 3 },
1060 { DBGBUS_SSPP0, 1, 4 },
1061 { DBGBUS_SSPP0, 1, 5 },
1062 { DBGBUS_SSPP0, 1, 6 },
1063 { DBGBUS_SSPP0, 1, 7 },
1064
1065 { DBGBUS_SSPP0, 2, 0 },
1066 { DBGBUS_SSPP0, 2, 1 },
1067 { DBGBUS_SSPP0, 2, 2 },
1068 { DBGBUS_SSPP0, 2, 3 },
1069 { DBGBUS_SSPP0, 2, 4 },
1070 { DBGBUS_SSPP0, 2, 5 },
1071 { DBGBUS_SSPP0, 2, 6 },
1072 { DBGBUS_SSPP0, 2, 7 },
1073
1074 { DBGBUS_SSPP0, 4, 0 },
1075 { DBGBUS_SSPP0, 4, 1 },
1076 { DBGBUS_SSPP0, 4, 2 },
1077 { DBGBUS_SSPP0, 4, 3 },
1078 { DBGBUS_SSPP0, 4, 4 },
1079 { DBGBUS_SSPP0, 4, 5 },
1080 { DBGBUS_SSPP0, 4, 6 },
1081 { DBGBUS_SSPP0, 4, 7 },
1082
1083 { DBGBUS_SSPP0, 5, 0 },
1084 { DBGBUS_SSPP0, 5, 1 },
1085 { DBGBUS_SSPP0, 5, 2 },
1086 { DBGBUS_SSPP0, 5, 3 },
1087 { DBGBUS_SSPP0, 5, 4 },
1088 { DBGBUS_SSPP0, 5, 5 },
1089 { DBGBUS_SSPP0, 5, 6 },
1090 { DBGBUS_SSPP0, 5, 7 },
1091
1092 /* vig 2 */
1093 { DBGBUS_SSPP0, 20, 0 },
1094 { DBGBUS_SSPP0, 20, 1 },
1095 { DBGBUS_SSPP0, 20, 2 },
1096 { DBGBUS_SSPP0, 20, 3 },
1097 { DBGBUS_SSPP0, 20, 4 },
1098 { DBGBUS_SSPP0, 20, 5 },
1099 { DBGBUS_SSPP0, 20, 6 },
1100 { DBGBUS_SSPP0, 20, 7 },
1101
1102 { DBGBUS_SSPP0, 21, 0 },
1103 { DBGBUS_SSPP0, 21, 1 },
1104 { DBGBUS_SSPP0, 21, 2 },
1105 { DBGBUS_SSPP0, 21, 3 },
1106 { DBGBUS_SSPP0, 21, 4 },
1107 { DBGBUS_SSPP0, 21, 5 },
1108 { DBGBUS_SSPP0, 21, 6 },
1109 { DBGBUS_SSPP0, 21, 7 },
1110
1111 { DBGBUS_SSPP0, 22, 0 },
1112 { DBGBUS_SSPP0, 22, 1 },
1113 { DBGBUS_SSPP0, 22, 2 },
1114 { DBGBUS_SSPP0, 22, 3 },
1115 { DBGBUS_SSPP0, 22, 4 },
1116 { DBGBUS_SSPP0, 22, 5 },
1117 { DBGBUS_SSPP0, 22, 6 },
1118 { DBGBUS_SSPP0, 22, 7 },
1119
1120 { DBGBUS_SSPP0, 24, 0 },
1121 { DBGBUS_SSPP0, 24, 1 },
1122 { DBGBUS_SSPP0, 24, 2 },
1123 { DBGBUS_SSPP0, 24, 3 },
1124 { DBGBUS_SSPP0, 24, 4 },
1125 { DBGBUS_SSPP0, 24, 5 },
1126 { DBGBUS_SSPP0, 24, 6 },
1127 { DBGBUS_SSPP0, 24, 7 },
1128
1129 { DBGBUS_SSPP0, 25, 0 },
1130 { DBGBUS_SSPP0, 25, 1 },
1131 { DBGBUS_SSPP0, 25, 2 },
1132 { DBGBUS_SSPP0, 25, 3 },
1133 { DBGBUS_SSPP0, 25, 4 },
1134 { DBGBUS_SSPP0, 25, 5 },
1135 { DBGBUS_SSPP0, 25, 6 },
1136 { DBGBUS_SSPP0, 25, 7 },
1137
1138 /* dma 2 */
1139 { DBGBUS_SSPP0, 30, 0 },
1140 { DBGBUS_SSPP0, 30, 1 },
1141 { DBGBUS_SSPP0, 30, 2 },
1142 { DBGBUS_SSPP0, 30, 3 },
1143 { DBGBUS_SSPP0, 30, 4 },
1144 { DBGBUS_SSPP0, 30, 5 },
1145 { DBGBUS_SSPP0, 30, 6 },
1146 { DBGBUS_SSPP0, 30, 7 },
1147
1148 { DBGBUS_SSPP0, 31, 0 },
1149 { DBGBUS_SSPP0, 31, 1 },
1150 { DBGBUS_SSPP0, 31, 2 },
1151 { DBGBUS_SSPP0, 31, 3 },
1152 { DBGBUS_SSPP0, 31, 4 },
1153 { DBGBUS_SSPP0, 31, 5 },
1154 { DBGBUS_SSPP0, 31, 6 },
1155 { DBGBUS_SSPP0, 31, 7 },
1156
1157 { DBGBUS_SSPP0, 32, 0 },
1158 { DBGBUS_SSPP0, 32, 1 },
1159 { DBGBUS_SSPP0, 32, 2 },
1160 { DBGBUS_SSPP0, 32, 3 },
1161 { DBGBUS_SSPP0, 32, 4 },
1162 { DBGBUS_SSPP0, 32, 5 },
1163 { DBGBUS_SSPP0, 32, 6 },
1164 { DBGBUS_SSPP0, 32, 7 },
1165
1166 { DBGBUS_SSPP0, 33, 0 },
1167 { DBGBUS_SSPP0, 33, 1 },
1168 { DBGBUS_SSPP0, 33, 2 },
1169 { DBGBUS_SSPP0, 33, 3 },
1170 { DBGBUS_SSPP0, 33, 4 },
1171 { DBGBUS_SSPP0, 33, 5 },
1172 { DBGBUS_SSPP0, 33, 6 },
1173 { DBGBUS_SSPP0, 33, 7 },
1174
1175 { DBGBUS_SSPP0, 34, 0 },
1176 { DBGBUS_SSPP0, 34, 1 },
1177 { DBGBUS_SSPP0, 34, 2 },
1178 { DBGBUS_SSPP0, 34, 3 },
1179 { DBGBUS_SSPP0, 34, 4 },
1180 { DBGBUS_SSPP0, 34, 5 },
1181 { DBGBUS_SSPP0, 34, 6 },
1182 { DBGBUS_SSPP0, 34, 7 },
1183
1184 { DBGBUS_SSPP0, 35, 0 },
1185 { DBGBUS_SSPP0, 35, 1 },
1186 { DBGBUS_SSPP0, 35, 2 },
1187 { DBGBUS_SSPP0, 35, 3 },
1188
1189 /* dma 0 */
1190 { DBGBUS_SSPP0, 40, 0 },
1191 { DBGBUS_SSPP0, 40, 1 },
1192 { DBGBUS_SSPP0, 40, 2 },
1193 { DBGBUS_SSPP0, 40, 3 },
1194 { DBGBUS_SSPP0, 40, 4 },
1195 { DBGBUS_SSPP0, 40, 5 },
1196 { DBGBUS_SSPP0, 40, 6 },
1197 { DBGBUS_SSPP0, 40, 7 },
1198
1199 { DBGBUS_SSPP0, 41, 0 },
1200 { DBGBUS_SSPP0, 41, 1 },
1201 { DBGBUS_SSPP0, 41, 2 },
1202 { DBGBUS_SSPP0, 41, 3 },
1203 { DBGBUS_SSPP0, 41, 4 },
1204 { DBGBUS_SSPP0, 41, 5 },
1205 { DBGBUS_SSPP0, 41, 6 },
1206 { DBGBUS_SSPP0, 41, 7 },
1207
1208 { DBGBUS_SSPP0, 42, 0 },
1209 { DBGBUS_SSPP0, 42, 1 },
1210 { DBGBUS_SSPP0, 42, 2 },
1211 { DBGBUS_SSPP0, 42, 3 },
1212 { DBGBUS_SSPP0, 42, 4 },
1213 { DBGBUS_SSPP0, 42, 5 },
1214 { DBGBUS_SSPP0, 42, 6 },
1215 { DBGBUS_SSPP0, 42, 7 },
1216
1217 { DBGBUS_SSPP0, 44, 0 },
1218 { DBGBUS_SSPP0, 44, 1 },
1219 { DBGBUS_SSPP0, 44, 2 },
1220 { DBGBUS_SSPP0, 44, 3 },
1221 { DBGBUS_SSPP0, 44, 4 },
1222 { DBGBUS_SSPP0, 44, 5 },
1223 { DBGBUS_SSPP0, 44, 6 },
1224 { DBGBUS_SSPP0, 44, 7 },
1225
1226 { DBGBUS_SSPP0, 45, 0 },
1227 { DBGBUS_SSPP0, 45, 1 },
1228 { DBGBUS_SSPP0, 45, 2 },
1229 { DBGBUS_SSPP0, 45, 3 },
1230 { DBGBUS_SSPP0, 45, 4 },
1231 { DBGBUS_SSPP0, 45, 5 },
1232 { DBGBUS_SSPP0, 45, 6 },
1233 { DBGBUS_SSPP0, 45, 7 },
1234
1235 /* fetch sspp1 */
1236 /* vig 1 */
1237 { DBGBUS_SSPP1, 0, 0 },
1238 { DBGBUS_SSPP1, 0, 1 },
1239 { DBGBUS_SSPP1, 0, 2 },
1240 { DBGBUS_SSPP1, 0, 3 },
1241 { DBGBUS_SSPP1, 0, 4 },
1242 { DBGBUS_SSPP1, 0, 5 },
1243 { DBGBUS_SSPP1, 0, 6 },
1244 { DBGBUS_SSPP1, 0, 7 },
1245
1246 { DBGBUS_SSPP1, 1, 0 },
1247 { DBGBUS_SSPP1, 1, 1 },
1248 { DBGBUS_SSPP1, 1, 2 },
1249 { DBGBUS_SSPP1, 1, 3 },
1250 { DBGBUS_SSPP1, 1, 4 },
1251 { DBGBUS_SSPP1, 1, 5 },
1252 { DBGBUS_SSPP1, 1, 6 },
1253 { DBGBUS_SSPP1, 1, 7 },
1254
1255 { DBGBUS_SSPP1, 2, 0 },
1256 { DBGBUS_SSPP1, 2, 1 },
1257 { DBGBUS_SSPP1, 2, 2 },
1258 { DBGBUS_SSPP1, 2, 3 },
1259 { DBGBUS_SSPP1, 2, 4 },
1260 { DBGBUS_SSPP1, 2, 5 },
1261 { DBGBUS_SSPP1, 2, 6 },
1262 { DBGBUS_SSPP1, 2, 7 },
1263
1264 { DBGBUS_SSPP1, 4, 0 },
1265 { DBGBUS_SSPP1, 4, 1 },
1266 { DBGBUS_SSPP1, 4, 2 },
1267 { DBGBUS_SSPP1, 4, 3 },
1268 { DBGBUS_SSPP1, 4, 4 },
1269 { DBGBUS_SSPP1, 4, 5 },
1270 { DBGBUS_SSPP1, 4, 6 },
1271 { DBGBUS_SSPP1, 4, 7 },
1272
1273 { DBGBUS_SSPP1, 5, 0 },
1274 { DBGBUS_SSPP1, 5, 1 },
1275 { DBGBUS_SSPP1, 5, 2 },
1276 { DBGBUS_SSPP1, 5, 3 },
1277 { DBGBUS_SSPP1, 5, 4 },
1278 { DBGBUS_SSPP1, 5, 5 },
1279 { DBGBUS_SSPP1, 5, 6 },
1280 { DBGBUS_SSPP1, 5, 7 },
1281
1282 /* vig 3 */
1283 { DBGBUS_SSPP1, 20, 0 },
1284 { DBGBUS_SSPP1, 20, 1 },
1285 { DBGBUS_SSPP1, 20, 2 },
1286 { DBGBUS_SSPP1, 20, 3 },
1287 { DBGBUS_SSPP1, 20, 4 },
1288 { DBGBUS_SSPP1, 20, 5 },
1289 { DBGBUS_SSPP1, 20, 6 },
1290 { DBGBUS_SSPP1, 20, 7 },
1291
1292 { DBGBUS_SSPP1, 21, 0 },
1293 { DBGBUS_SSPP1, 21, 1 },
1294 { DBGBUS_SSPP1, 21, 2 },
1295 { DBGBUS_SSPP1, 21, 3 },
1296 { DBGBUS_SSPP1, 21, 4 },
1297 { DBGBUS_SSPP1, 21, 5 },
1298 { DBGBUS_SSPP1, 21, 6 },
1299 { DBGBUS_SSPP1, 21, 7 },
1300
1301 { DBGBUS_SSPP1, 22, 0 },
1302 { DBGBUS_SSPP1, 22, 1 },
1303 { DBGBUS_SSPP1, 22, 2 },
1304 { DBGBUS_SSPP1, 22, 3 },
1305 { DBGBUS_SSPP1, 22, 4 },
1306 { DBGBUS_SSPP1, 22, 5 },
1307 { DBGBUS_SSPP1, 22, 6 },
1308 { DBGBUS_SSPP1, 22, 7 },
1309
1310 { DBGBUS_SSPP1, 24, 0 },
1311 { DBGBUS_SSPP1, 24, 1 },
1312 { DBGBUS_SSPP1, 24, 2 },
1313 { DBGBUS_SSPP1, 24, 3 },
1314 { DBGBUS_SSPP1, 24, 4 },
1315 { DBGBUS_SSPP1, 24, 5 },
1316 { DBGBUS_SSPP1, 24, 6 },
1317 { DBGBUS_SSPP1, 24, 7 },
1318
1319 { DBGBUS_SSPP1, 25, 0 },
1320 { DBGBUS_SSPP1, 25, 1 },
1321 { DBGBUS_SSPP1, 25, 2 },
1322 { DBGBUS_SSPP1, 25, 3 },
1323 { DBGBUS_SSPP1, 25, 4 },
1324 { DBGBUS_SSPP1, 25, 5 },
1325 { DBGBUS_SSPP1, 25, 6 },
1326 { DBGBUS_SSPP1, 25, 7 },
1327
1328 /* dma 3 */
1329 { DBGBUS_SSPP1, 30, 0 },
1330 { DBGBUS_SSPP1, 30, 1 },
1331 { DBGBUS_SSPP1, 30, 2 },
1332 { DBGBUS_SSPP1, 30, 3 },
1333 { DBGBUS_SSPP1, 30, 4 },
1334 { DBGBUS_SSPP1, 30, 5 },
1335 { DBGBUS_SSPP1, 30, 6 },
1336 { DBGBUS_SSPP1, 30, 7 },
1337
1338 { DBGBUS_SSPP1, 31, 0 },
1339 { DBGBUS_SSPP1, 31, 1 },
1340 { DBGBUS_SSPP1, 31, 2 },
1341 { DBGBUS_SSPP1, 31, 3 },
1342 { DBGBUS_SSPP1, 31, 4 },
1343 { DBGBUS_SSPP1, 31, 5 },
1344 { DBGBUS_SSPP1, 31, 6 },
1345 { DBGBUS_SSPP1, 31, 7 },
1346
1347 { DBGBUS_SSPP1, 32, 0 },
1348 { DBGBUS_SSPP1, 32, 1 },
1349 { DBGBUS_SSPP1, 32, 2 },
1350 { DBGBUS_SSPP1, 32, 3 },
1351 { DBGBUS_SSPP1, 32, 4 },
1352 { DBGBUS_SSPP1, 32, 5 },
1353 { DBGBUS_SSPP1, 32, 6 },
1354 { DBGBUS_SSPP1, 32, 7 },
1355
1356 { DBGBUS_SSPP1, 33, 0 },
1357 { DBGBUS_SSPP1, 33, 1 },
1358 { DBGBUS_SSPP1, 33, 2 },
1359 { DBGBUS_SSPP1, 33, 3 },
1360 { DBGBUS_SSPP1, 33, 4 },
1361 { DBGBUS_SSPP1, 33, 5 },
1362 { DBGBUS_SSPP1, 33, 6 },
1363 { DBGBUS_SSPP1, 33, 7 },
1364
1365 { DBGBUS_SSPP1, 34, 0 },
1366 { DBGBUS_SSPP1, 34, 1 },
1367 { DBGBUS_SSPP1, 34, 2 },
1368 { DBGBUS_SSPP1, 34, 3 },
1369 { DBGBUS_SSPP1, 34, 4 },
1370 { DBGBUS_SSPP1, 34, 5 },
1371 { DBGBUS_SSPP1, 34, 6 },
1372 { DBGBUS_SSPP1, 34, 7 },
1373
1374 { DBGBUS_SSPP1, 35, 0 },
1375 { DBGBUS_SSPP1, 35, 1 },
1376 { DBGBUS_SSPP1, 35, 2 },
1377
1378 /* dma 1 */
1379 { DBGBUS_SSPP1, 40, 0 },
1380 { DBGBUS_SSPP1, 40, 1 },
1381 { DBGBUS_SSPP1, 40, 2 },
1382 { DBGBUS_SSPP1, 40, 3 },
1383 { DBGBUS_SSPP1, 40, 4 },
1384 { DBGBUS_SSPP1, 40, 5 },
1385 { DBGBUS_SSPP1, 40, 6 },
1386 { DBGBUS_SSPP1, 40, 7 },
1387
1388 { DBGBUS_SSPP1, 41, 0 },
1389 { DBGBUS_SSPP1, 41, 1 },
1390 { DBGBUS_SSPP1, 41, 2 },
1391 { DBGBUS_SSPP1, 41, 3 },
1392 { DBGBUS_SSPP1, 41, 4 },
1393 { DBGBUS_SSPP1, 41, 5 },
1394 { DBGBUS_SSPP1, 41, 6 },
1395 { DBGBUS_SSPP1, 41, 7 },
1396
1397 { DBGBUS_SSPP1, 42, 0 },
1398 { DBGBUS_SSPP1, 42, 1 },
1399 { DBGBUS_SSPP1, 42, 2 },
1400 { DBGBUS_SSPP1, 42, 3 },
1401 { DBGBUS_SSPP1, 42, 4 },
1402 { DBGBUS_SSPP1, 42, 5 },
1403 { DBGBUS_SSPP1, 42, 6 },
1404 { DBGBUS_SSPP1, 42, 7 },
1405
1406 { DBGBUS_SSPP1, 44, 0 },
1407 { DBGBUS_SSPP1, 44, 1 },
1408 { DBGBUS_SSPP1, 44, 2 },
1409 { DBGBUS_SSPP1, 44, 3 },
1410 { DBGBUS_SSPP1, 44, 4 },
1411 { DBGBUS_SSPP1, 44, 5 },
1412 { DBGBUS_SSPP1, 44, 6 },
1413 { DBGBUS_SSPP1, 44, 7 },
1414
1415 { DBGBUS_SSPP1, 45, 0 },
1416 { DBGBUS_SSPP1, 45, 1 },
1417 { DBGBUS_SSPP1, 45, 2 },
1418 { DBGBUS_SSPP1, 45, 3 },
1419 { DBGBUS_SSPP1, 45, 4 },
1420 { DBGBUS_SSPP1, 45, 5 },
1421 { DBGBUS_SSPP1, 45, 6 },
1422 { DBGBUS_SSPP1, 45, 7 },
1423
1424 /* dspp */
1425 { DBGBUS_DSPP, 13, 0 },
1426 { DBGBUS_DSPP, 19, 0 },
1427 { DBGBUS_DSPP, 14, 0 },
1428 { DBGBUS_DSPP, 14, 1 },
1429 { DBGBUS_DSPP, 14, 3 },
1430 { DBGBUS_DSPP, 20, 0 },
1431 { DBGBUS_DSPP, 20, 1 },
1432 { DBGBUS_DSPP, 20, 3 },
1433
1434 /* ppb_0 */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1435 { DBGBUS_DSPP, 31, 0, _sde_debug_bus_ppb0_dump },
1436 { DBGBUS_DSPP, 33, 0, _sde_debug_bus_ppb0_dump },
1437 { DBGBUS_DSPP, 35, 0, _sde_debug_bus_ppb0_dump },
1438 { DBGBUS_DSPP, 42, 0, _sde_debug_bus_ppb0_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1439
1440 /* ppb_1 */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1441 { DBGBUS_DSPP, 32, 0, _sde_debug_bus_ppb1_dump },
1442 { DBGBUS_DSPP, 34, 0, _sde_debug_bus_ppb1_dump },
1443 { DBGBUS_DSPP, 36, 0, _sde_debug_bus_ppb1_dump },
1444 { DBGBUS_DSPP, 43, 0, _sde_debug_bus_ppb1_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1445
1446 /* lm_lut */
1447 { DBGBUS_DSPP, 109, 0 },
1448 { DBGBUS_DSPP, 105, 0 },
1449 { DBGBUS_DSPP, 103, 0 },
1450
1451 /* crossbar */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1452 { DBGBUS_DSPP, 0, 0, _sde_debug_bus_xbar_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1453
1454 /* rotator */
1455 { DBGBUS_DSPP, 9, 0},
1456
1457 /* blend */
1458 /* LM0 */
1459 { DBGBUS_DSPP, 63, 1},
1460 { DBGBUS_DSPP, 63, 2},
1461 { DBGBUS_DSPP, 63, 3},
1462 { DBGBUS_DSPP, 63, 4},
1463 { DBGBUS_DSPP, 63, 5},
1464 { DBGBUS_DSPP, 63, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1465 { DBGBUS_DSPP, 63, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1466
1467 { DBGBUS_DSPP, 64, 1},
1468 { DBGBUS_DSPP, 64, 2},
1469 { DBGBUS_DSPP, 64, 3},
1470 { DBGBUS_DSPP, 64, 4},
1471 { DBGBUS_DSPP, 64, 5},
1472 { DBGBUS_DSPP, 64, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1473 { DBGBUS_DSPP, 64, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1474
1475 { DBGBUS_DSPP, 65, 1},
1476 { DBGBUS_DSPP, 65, 2},
1477 { DBGBUS_DSPP, 65, 3},
1478 { DBGBUS_DSPP, 65, 4},
1479 { DBGBUS_DSPP, 65, 5},
1480 { DBGBUS_DSPP, 65, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1481 { DBGBUS_DSPP, 65, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1482
1483 { DBGBUS_DSPP, 66, 1},
1484 { DBGBUS_DSPP, 66, 2},
1485 { DBGBUS_DSPP, 66, 3},
1486 { DBGBUS_DSPP, 66, 4},
1487 { DBGBUS_DSPP, 66, 5},
1488 { DBGBUS_DSPP, 66, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1489 { DBGBUS_DSPP, 66, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1490
1491 { DBGBUS_DSPP, 67, 1},
1492 { DBGBUS_DSPP, 67, 2},
1493 { DBGBUS_DSPP, 67, 3},
1494 { DBGBUS_DSPP, 67, 4},
1495 { DBGBUS_DSPP, 67, 5},
1496 { DBGBUS_DSPP, 67, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1497 { DBGBUS_DSPP, 67, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1498
1499 { DBGBUS_DSPP, 68, 1},
1500 { DBGBUS_DSPP, 68, 2},
1501 { DBGBUS_DSPP, 68, 3},
1502 { DBGBUS_DSPP, 68, 4},
1503 { DBGBUS_DSPP, 68, 5},
1504 { DBGBUS_DSPP, 68, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1505 { DBGBUS_DSPP, 68, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1506
1507 { DBGBUS_DSPP, 69, 1},
1508 { DBGBUS_DSPP, 69, 2},
1509 { DBGBUS_DSPP, 69, 3},
1510 { DBGBUS_DSPP, 69, 4},
1511 { DBGBUS_DSPP, 69, 5},
1512 { DBGBUS_DSPP, 69, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1513 { DBGBUS_DSPP, 69, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1514
1515 { DBGBUS_DSPP, 84, 1},
1516 { DBGBUS_DSPP, 84, 2},
1517 { DBGBUS_DSPP, 84, 3},
1518 { DBGBUS_DSPP, 84, 4},
1519 { DBGBUS_DSPP, 84, 5},
1520 { DBGBUS_DSPP, 84, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1521 { DBGBUS_DSPP, 84, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1522
1523
1524 { DBGBUS_DSPP, 85, 1},
1525 { DBGBUS_DSPP, 85, 2},
1526 { DBGBUS_DSPP, 85, 3},
1527 { DBGBUS_DSPP, 85, 4},
1528 { DBGBUS_DSPP, 85, 5},
1529 { DBGBUS_DSPP, 85, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1530 { DBGBUS_DSPP, 85, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1531
1532
1533 { DBGBUS_DSPP, 86, 1},
1534 { DBGBUS_DSPP, 86, 2},
1535 { DBGBUS_DSPP, 86, 3},
1536 { DBGBUS_DSPP, 86, 4},
1537 { DBGBUS_DSPP, 86, 5},
1538 { DBGBUS_DSPP, 86, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1539 { DBGBUS_DSPP, 86, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1540
1541
1542 { DBGBUS_DSPP, 87, 1},
1543 { DBGBUS_DSPP, 87, 2},
1544 { DBGBUS_DSPP, 87, 3},
1545 { DBGBUS_DSPP, 87, 4},
1546 { DBGBUS_DSPP, 87, 5},
1547 { DBGBUS_DSPP, 87, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1548 { DBGBUS_DSPP, 87, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1549
1550 /* LM1 */
1551 { DBGBUS_DSPP, 70, 1},
1552 { DBGBUS_DSPP, 70, 2},
1553 { DBGBUS_DSPP, 70, 3},
1554 { DBGBUS_DSPP, 70, 4},
1555 { DBGBUS_DSPP, 70, 5},
1556 { DBGBUS_DSPP, 70, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1557 { DBGBUS_DSPP, 70, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1558
1559 { DBGBUS_DSPP, 71, 1},
1560 { DBGBUS_DSPP, 71, 2},
1561 { DBGBUS_DSPP, 71, 3},
1562 { DBGBUS_DSPP, 71, 4},
1563 { DBGBUS_DSPP, 71, 5},
1564 { DBGBUS_DSPP, 71, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1565 { DBGBUS_DSPP, 71, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1566
1567 { DBGBUS_DSPP, 72, 1},
1568 { DBGBUS_DSPP, 72, 2},
1569 { DBGBUS_DSPP, 72, 3},
1570 { DBGBUS_DSPP, 72, 4},
1571 { DBGBUS_DSPP, 72, 5},
1572 { DBGBUS_DSPP, 72, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1573 { DBGBUS_DSPP, 72, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1574
1575 { DBGBUS_DSPP, 73, 1},
1576 { DBGBUS_DSPP, 73, 2},
1577 { DBGBUS_DSPP, 73, 3},
1578 { DBGBUS_DSPP, 73, 4},
1579 { DBGBUS_DSPP, 73, 5},
1580 { DBGBUS_DSPP, 73, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1581 { DBGBUS_DSPP, 73, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1582
1583 { DBGBUS_DSPP, 74, 1},
1584 { DBGBUS_DSPP, 74, 2},
1585 { DBGBUS_DSPP, 74, 3},
1586 { DBGBUS_DSPP, 74, 4},
1587 { DBGBUS_DSPP, 74, 5},
1588 { DBGBUS_DSPP, 74, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1589 { DBGBUS_DSPP, 74, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1590
1591 { DBGBUS_DSPP, 75, 1},
1592 { DBGBUS_DSPP, 75, 2},
1593 { DBGBUS_DSPP, 75, 3},
1594 { DBGBUS_DSPP, 75, 4},
1595 { DBGBUS_DSPP, 75, 5},
1596 { DBGBUS_DSPP, 75, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1597 { DBGBUS_DSPP, 75, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1598
1599 { DBGBUS_DSPP, 76, 1},
1600 { DBGBUS_DSPP, 76, 2},
1601 { DBGBUS_DSPP, 76, 3},
1602 { DBGBUS_DSPP, 76, 4},
1603 { DBGBUS_DSPP, 76, 5},
1604 { DBGBUS_DSPP, 76, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1605 { DBGBUS_DSPP, 76, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1606
1607 { DBGBUS_DSPP, 88, 1},
1608 { DBGBUS_DSPP, 88, 2},
1609 { DBGBUS_DSPP, 88, 3},
1610 { DBGBUS_DSPP, 88, 4},
1611 { DBGBUS_DSPP, 88, 5},
1612 { DBGBUS_DSPP, 88, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1613 { DBGBUS_DSPP, 88, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1614
1615 { DBGBUS_DSPP, 89, 1},
1616 { DBGBUS_DSPP, 89, 2},
1617 { DBGBUS_DSPP, 89, 3},
1618 { DBGBUS_DSPP, 89, 4},
1619 { DBGBUS_DSPP, 89, 5},
1620 { DBGBUS_DSPP, 89, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1621 { DBGBUS_DSPP, 89, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1622
1623 { DBGBUS_DSPP, 90, 1},
1624 { DBGBUS_DSPP, 90, 2},
1625 { DBGBUS_DSPP, 90, 3},
1626 { DBGBUS_DSPP, 90, 4},
1627 { DBGBUS_DSPP, 90, 5},
1628 { DBGBUS_DSPP, 90, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1629 { DBGBUS_DSPP, 90, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1630
1631 { DBGBUS_DSPP, 91, 1},
1632 { DBGBUS_DSPP, 91, 2},
1633 { DBGBUS_DSPP, 91, 3},
1634 { DBGBUS_DSPP, 91, 4},
1635 { DBGBUS_DSPP, 91, 5},
1636 { DBGBUS_DSPP, 91, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1637 { DBGBUS_DSPP, 91, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1638
1639 /* LM2 */
1640 { DBGBUS_DSPP, 77, 0},
1641 { DBGBUS_DSPP, 77, 1},
1642 { DBGBUS_DSPP, 77, 2},
1643 { DBGBUS_DSPP, 77, 3},
1644 { DBGBUS_DSPP, 77, 4},
1645 { DBGBUS_DSPP, 77, 5},
1646 { DBGBUS_DSPP, 77, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1647 { DBGBUS_DSPP, 77, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1648
1649 { DBGBUS_DSPP, 78, 0},
1650 { DBGBUS_DSPP, 78, 1},
1651 { DBGBUS_DSPP, 78, 2},
1652 { DBGBUS_DSPP, 78, 3},
1653 { DBGBUS_DSPP, 78, 4},
1654 { DBGBUS_DSPP, 78, 5},
1655 { DBGBUS_DSPP, 78, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1656 { DBGBUS_DSPP, 78, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1657
1658 { DBGBUS_DSPP, 79, 0},
1659 { DBGBUS_DSPP, 79, 1},
1660 { DBGBUS_DSPP, 79, 2},
1661 { DBGBUS_DSPP, 79, 3},
1662 { DBGBUS_DSPP, 79, 4},
1663 { DBGBUS_DSPP, 79, 5},
1664 { DBGBUS_DSPP, 79, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1665 { DBGBUS_DSPP, 79, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1666
1667 { DBGBUS_DSPP, 80, 0},
1668 { DBGBUS_DSPP, 80, 1},
1669 { DBGBUS_DSPP, 80, 2},
1670 { DBGBUS_DSPP, 80, 3},
1671 { DBGBUS_DSPP, 80, 4},
1672 { DBGBUS_DSPP, 80, 5},
1673 { DBGBUS_DSPP, 80, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1674 { DBGBUS_DSPP, 80, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1675
1676 { DBGBUS_DSPP, 81, 0},
1677 { DBGBUS_DSPP, 81, 1},
1678 { DBGBUS_DSPP, 81, 2},
1679 { DBGBUS_DSPP, 81, 3},
1680 { DBGBUS_DSPP, 81, 4},
1681 { DBGBUS_DSPP, 81, 5},
1682 { DBGBUS_DSPP, 81, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1683 { DBGBUS_DSPP, 81, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1684
1685 { DBGBUS_DSPP, 82, 0},
1686 { DBGBUS_DSPP, 82, 1},
1687 { DBGBUS_DSPP, 82, 2},
1688 { DBGBUS_DSPP, 82, 3},
1689 { DBGBUS_DSPP, 82, 4},
1690 { DBGBUS_DSPP, 82, 5},
1691 { DBGBUS_DSPP, 82, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1692 { DBGBUS_DSPP, 82, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1693
1694 { DBGBUS_DSPP, 83, 0},
1695 { DBGBUS_DSPP, 83, 1},
1696 { DBGBUS_DSPP, 83, 2},
1697 { DBGBUS_DSPP, 83, 3},
1698 { DBGBUS_DSPP, 83, 4},
1699 { DBGBUS_DSPP, 83, 5},
1700 { DBGBUS_DSPP, 83, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1701 { DBGBUS_DSPP, 83, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1702
1703 { DBGBUS_DSPP, 92, 1},
1704 { DBGBUS_DSPP, 92, 2},
1705 { DBGBUS_DSPP, 92, 3},
1706 { DBGBUS_DSPP, 92, 4},
1707 { DBGBUS_DSPP, 92, 5},
1708 { DBGBUS_DSPP, 92, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1709 { DBGBUS_DSPP, 92, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1710
1711 { DBGBUS_DSPP, 93, 1},
1712 { DBGBUS_DSPP, 93, 2},
1713 { DBGBUS_DSPP, 93, 3},
1714 { DBGBUS_DSPP, 93, 4},
1715 { DBGBUS_DSPP, 93, 5},
1716 { DBGBUS_DSPP, 93, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1717 { DBGBUS_DSPP, 93, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1718
1719 { DBGBUS_DSPP, 94, 1},
1720 { DBGBUS_DSPP, 94, 2},
1721 { DBGBUS_DSPP, 94, 3},
1722 { DBGBUS_DSPP, 94, 4},
1723 { DBGBUS_DSPP, 94, 5},
1724 { DBGBUS_DSPP, 94, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1725 { DBGBUS_DSPP, 94, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1726
1727 { DBGBUS_DSPP, 95, 1},
1728 { DBGBUS_DSPP, 95, 2},
1729 { DBGBUS_DSPP, 95, 3},
1730 { DBGBUS_DSPP, 95, 4},
1731 { DBGBUS_DSPP, 95, 5},
1732 { DBGBUS_DSPP, 95, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1733 { DBGBUS_DSPP, 95, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1734
1735 /* LM5 */
1736 { DBGBUS_DSPP, 110, 1},
1737 { DBGBUS_DSPP, 110, 2},
1738 { DBGBUS_DSPP, 110, 3},
1739 { DBGBUS_DSPP, 110, 4},
1740 { DBGBUS_DSPP, 110, 5},
1741 { DBGBUS_DSPP, 110, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1742 { DBGBUS_DSPP, 110, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1743
1744 { DBGBUS_DSPP, 111, 1},
1745 { DBGBUS_DSPP, 111, 2},
1746 { DBGBUS_DSPP, 111, 3},
1747 { DBGBUS_DSPP, 111, 4},
1748 { DBGBUS_DSPP, 111, 5},
1749 { DBGBUS_DSPP, 111, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1750 { DBGBUS_DSPP, 111, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1751
1752 { DBGBUS_DSPP, 112, 1},
1753 { DBGBUS_DSPP, 112, 2},
1754 { DBGBUS_DSPP, 112, 3},
1755 { DBGBUS_DSPP, 112, 4},
1756 { DBGBUS_DSPP, 112, 5},
1757 { DBGBUS_DSPP, 112, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1758 { DBGBUS_DSPP, 112, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1759
1760 { DBGBUS_DSPP, 113, 1},
1761 { DBGBUS_DSPP, 113, 2},
1762 { DBGBUS_DSPP, 113, 3},
1763 { DBGBUS_DSPP, 113, 4},
1764 { DBGBUS_DSPP, 113, 5},
1765 { DBGBUS_DSPP, 113, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1766 { DBGBUS_DSPP, 113, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1767
1768 { DBGBUS_DSPP, 114, 1},
1769 { DBGBUS_DSPP, 114, 2},
1770 { DBGBUS_DSPP, 114, 3},
1771 { DBGBUS_DSPP, 114, 4},
1772 { DBGBUS_DSPP, 114, 5},
1773 { DBGBUS_DSPP, 114, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1774 { DBGBUS_DSPP, 114, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1775
1776 { DBGBUS_DSPP, 115, 1},
1777 { DBGBUS_DSPP, 115, 2},
1778 { DBGBUS_DSPP, 115, 3},
1779 { DBGBUS_DSPP, 115, 4},
1780 { DBGBUS_DSPP, 115, 5},
1781 { DBGBUS_DSPP, 115, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1782 { DBGBUS_DSPP, 115, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1783
1784 { DBGBUS_DSPP, 116, 1},
1785 { DBGBUS_DSPP, 116, 2},
1786 { DBGBUS_DSPP, 116, 3},
1787 { DBGBUS_DSPP, 116, 4},
1788 { DBGBUS_DSPP, 116, 5},
1789 { DBGBUS_DSPP, 116, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1790 { DBGBUS_DSPP, 116, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1791
1792 { DBGBUS_DSPP, 117, 1},
1793 { DBGBUS_DSPP, 117, 2},
1794 { DBGBUS_DSPP, 117, 3},
1795 { DBGBUS_DSPP, 117, 4},
1796 { DBGBUS_DSPP, 117, 5},
1797 { DBGBUS_DSPP, 117, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1798 { DBGBUS_DSPP, 117, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1799
1800 { DBGBUS_DSPP, 118, 1},
1801 { DBGBUS_DSPP, 118, 2},
1802 { DBGBUS_DSPP, 118, 3},
1803 { DBGBUS_DSPP, 118, 4},
1804 { DBGBUS_DSPP, 118, 5},
1805 { DBGBUS_DSPP, 118, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1806 { DBGBUS_DSPP, 118, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1807
1808 { DBGBUS_DSPP, 119, 1},
1809 { DBGBUS_DSPP, 119, 2},
1810 { DBGBUS_DSPP, 119, 3},
1811 { DBGBUS_DSPP, 119, 4},
1812 { DBGBUS_DSPP, 119, 5},
1813 { DBGBUS_DSPP, 119, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1814 { DBGBUS_DSPP, 119, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1815
1816 { DBGBUS_DSPP, 120, 1},
1817 { DBGBUS_DSPP, 120, 2},
1818 { DBGBUS_DSPP, 120, 3},
1819 { DBGBUS_DSPP, 120, 4},
1820 { DBGBUS_DSPP, 120, 5},
1821 { DBGBUS_DSPP, 120, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1822 { DBGBUS_DSPP, 120, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1823
1824 /* csc */
1825 { DBGBUS_SSPP0, 7, 0},
1826 { DBGBUS_SSPP0, 7, 1},
1827 { DBGBUS_SSPP0, 27, 0},
1828 { DBGBUS_SSPP0, 27, 1},
1829 { DBGBUS_SSPP1, 7, 0},
1830 { DBGBUS_SSPP1, 7, 1},
1831 { DBGBUS_SSPP1, 27, 0},
1832 { DBGBUS_SSPP1, 27, 1},
1833
1834 /* pcc */
1835 { DBGBUS_SSPP0, 3, 3},
1836 { DBGBUS_SSPP0, 23, 3},
1837 { DBGBUS_SSPP0, 33, 3},
1838 { DBGBUS_SSPP0, 43, 3},
1839 { DBGBUS_SSPP1, 3, 3},
1840 { DBGBUS_SSPP1, 23, 3},
1841 { DBGBUS_SSPP1, 33, 3},
1842 { DBGBUS_SSPP1, 43, 3},
1843
1844 /* spa */
1845 { DBGBUS_SSPP0, 8, 0},
1846 { DBGBUS_SSPP0, 28, 0},
1847 { DBGBUS_SSPP1, 8, 0},
1848 { DBGBUS_SSPP1, 28, 0},
1849 { DBGBUS_DSPP, 13, 0},
1850 { DBGBUS_DSPP, 19, 0},
1851
1852 /* igc */
1853 { DBGBUS_SSPP0, 17, 0},
1854 { DBGBUS_SSPP0, 17, 1},
1855 { DBGBUS_SSPP0, 17, 3},
1856 { DBGBUS_SSPP0, 37, 0},
1857 { DBGBUS_SSPP0, 37, 1},
1858 { DBGBUS_SSPP0, 37, 3},
1859 { DBGBUS_SSPP0, 46, 0},
1860 { DBGBUS_SSPP0, 46, 1},
1861 { DBGBUS_SSPP0, 46, 3},
1862
1863 { DBGBUS_SSPP1, 17, 0},
1864 { DBGBUS_SSPP1, 17, 1},
1865 { DBGBUS_SSPP1, 17, 3},
1866 { DBGBUS_SSPP1, 37, 0},
1867 { DBGBUS_SSPP1, 37, 1},
1868 { DBGBUS_SSPP1, 37, 3},
1869 { DBGBUS_SSPP1, 46, 0},
1870 { DBGBUS_SSPP1, 46, 1},
1871 { DBGBUS_SSPP1, 46, 3},
1872
1873 { DBGBUS_DSPP, 14, 0},
1874 { DBGBUS_DSPP, 14, 1},
1875 { DBGBUS_DSPP, 14, 3},
1876 { DBGBUS_DSPP, 20, 0},
1877 { DBGBUS_DSPP, 20, 1},
1878 { DBGBUS_DSPP, 20, 3},
1879
1880 /* intf0-3 */
1881 { DBGBUS_PERIPH, 0, 0},
1882 { DBGBUS_PERIPH, 1, 0},
1883 { DBGBUS_PERIPH, 2, 0},
1884 { DBGBUS_PERIPH, 3, 0},
1885
1886 /* te counter wrapper */
1887 { DBGBUS_PERIPH, 60, 0},
1888
1889 /* dsc0 */
1890 { DBGBUS_PERIPH, 47, 0},
1891 { DBGBUS_PERIPH, 47, 1},
1892 { DBGBUS_PERIPH, 47, 2},
1893 { DBGBUS_PERIPH, 47, 3},
1894 { DBGBUS_PERIPH, 47, 4},
1895 { DBGBUS_PERIPH, 47, 5},
1896 { DBGBUS_PERIPH, 47, 6},
1897 { DBGBUS_PERIPH, 47, 7},
1898
1899 /* dsc1 */
1900 { DBGBUS_PERIPH, 48, 0},
1901 { DBGBUS_PERIPH, 48, 1},
1902 { DBGBUS_PERIPH, 48, 2},
1903 { DBGBUS_PERIPH, 48, 3},
1904 { DBGBUS_PERIPH, 48, 4},
1905 { DBGBUS_PERIPH, 48, 5},
1906 { DBGBUS_PERIPH, 48, 6},
1907 { DBGBUS_PERIPH, 48, 7},
1908
1909 /* dsc2 */
1910 { DBGBUS_PERIPH, 51, 0},
1911 { DBGBUS_PERIPH, 51, 1},
1912 { DBGBUS_PERIPH, 51, 2},
1913 { DBGBUS_PERIPH, 51, 3},
1914 { DBGBUS_PERIPH, 51, 4},
1915 { DBGBUS_PERIPH, 51, 5},
1916 { DBGBUS_PERIPH, 51, 6},
1917 { DBGBUS_PERIPH, 51, 7},
1918
1919 /* dsc3 */
1920 { DBGBUS_PERIPH, 52, 0},
1921 { DBGBUS_PERIPH, 52, 1},
1922 { DBGBUS_PERIPH, 52, 2},
1923 { DBGBUS_PERIPH, 52, 3},
1924 { DBGBUS_PERIPH, 52, 4},
1925 { DBGBUS_PERIPH, 52, 5},
1926 { DBGBUS_PERIPH, 52, 6},
1927 { DBGBUS_PERIPH, 52, 7},
1928
1929 /* tear-check */
1930 { DBGBUS_PERIPH, 63, 0 },
1931 { DBGBUS_PERIPH, 64, 0 },
1932 { DBGBUS_PERIPH, 65, 0 },
1933 { DBGBUS_PERIPH, 73, 0 },
1934 { DBGBUS_PERIPH, 74, 0 },
1935
1936 /* cdwn */
1937 { DBGBUS_PERIPH, 80, 0},
1938 { DBGBUS_PERIPH, 80, 1},
1939 { DBGBUS_PERIPH, 80, 2},
1940
1941 { DBGBUS_PERIPH, 81, 0},
1942 { DBGBUS_PERIPH, 81, 1},
1943 { DBGBUS_PERIPH, 81, 2},
1944
1945 { DBGBUS_PERIPH, 82, 0},
1946 { DBGBUS_PERIPH, 82, 1},
1947 { DBGBUS_PERIPH, 82, 2},
1948 { DBGBUS_PERIPH, 82, 3},
1949 { DBGBUS_PERIPH, 82, 4},
1950 { DBGBUS_PERIPH, 82, 5},
1951 { DBGBUS_PERIPH, 82, 6},
1952 { DBGBUS_PERIPH, 82, 7},
1953
1954 /* hdmi */
1955 { DBGBUS_PERIPH, 68, 0},
1956 { DBGBUS_PERIPH, 68, 1},
1957 { DBGBUS_PERIPH, 68, 2},
1958 { DBGBUS_PERIPH, 68, 3},
1959 { DBGBUS_PERIPH, 68, 4},
1960 { DBGBUS_PERIPH, 68, 5},
1961
1962 /* edp */
1963 { DBGBUS_PERIPH, 69, 0},
1964 { DBGBUS_PERIPH, 69, 1},
1965 { DBGBUS_PERIPH, 69, 2},
1966 { DBGBUS_PERIPH, 69, 3},
1967 { DBGBUS_PERIPH, 69, 4},
1968 { DBGBUS_PERIPH, 69, 5},
1969
1970 /* dsi0 */
1971 { DBGBUS_PERIPH, 70, 0},
1972 { DBGBUS_PERIPH, 70, 1},
1973 { DBGBUS_PERIPH, 70, 2},
1974 { DBGBUS_PERIPH, 70, 3},
1975 { DBGBUS_PERIPH, 70, 4},
1976 { DBGBUS_PERIPH, 70, 5},
1977
1978 /* dsi1 */
1979 { DBGBUS_PERIPH, 71, 0},
1980 { DBGBUS_PERIPH, 71, 1},
1981 { DBGBUS_PERIPH, 71, 2},
1982 { DBGBUS_PERIPH, 71, 3},
1983 { DBGBUS_PERIPH, 71, 4},
1984 { DBGBUS_PERIPH, 71, 5},
1985};
1986
1987static struct vbif_debug_bus_entry vbif_dbg_bus_msm8998[] = {
1988 {0x214, 0x21c, 16, 2, 0x0, 0xd}, /* arb clients */
1989 {0x214, 0x21c, 16, 2, 0x80, 0xc0}, /* arb clients */
1990 {0x214, 0x21c, 16, 2, 0x100, 0x140}, /* arb clients */
1991 {0x214, 0x21c, 0, 16, 0x0, 0xf}, /* xin blocks - axi side */
1992 {0x214, 0x21c, 0, 16, 0x80, 0xa4}, /* xin blocks - axi side */
1993 {0x214, 0x21c, 0, 15, 0x100, 0x124}, /* xin blocks - axi side */
1994 {0x21c, 0x214, 0, 14, 0, 0xc}, /* xin blocks - clock side */
1995};
1996
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]1997/**
1998 * _sde_dbg_enable_power - use callback to turn power on for hw register access
1999 * @enable: whether to turn power on or off
2000 */
2001static inline void _sde_dbg_enable_power(int enable)
2002{
2003 if (!sde_dbg_base.power_ctrl.enable_fn)
2004 return;
2005 sde_dbg_base.power_ctrl.enable_fn(
2006 sde_dbg_base.power_ctrl.handle,
2007 sde_dbg_base.power_ctrl.client,
2008 enable);
2009}
2010
2011/**
2012 * _sde_dump_reg - helper function for dumping rotator register set content
2013 * @dump_name: register set name
2014 * @reg_dump_flag: dumping flag controlling in-log/memory dump location
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2015 * @base_addr: starting address of io region for calculating offsets to print
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2016 * @addr: starting address offset for dumping
2017 * @len_bytes: range of the register set
2018 * @dump_mem: output buffer for memory dump location option
2019 * @from_isr: whether being called from isr context
2020 */
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2021static void _sde_dump_reg(const char *dump_name, u32 reg_dump_flag,
2022 char *base_addr, char *addr, size_t len_bytes, u32 **dump_mem,
2023 bool from_isr)
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2024{
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2025 u32 in_log, in_mem, len_align, len_padded;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2026 u32 *dump_addr = NULL;
2027 char *end_addr;
2028 int i;
2029
Lloyd Atkinsonf3e8ef32017-03-22 18:49:49 -0400[diff] [blame]2030 if (!len_bytes)
2031 return;
2032
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2033 in_log = (reg_dump_flag & SDE_DBG_DUMP_IN_LOG);
2034 in_mem = (reg_dump_flag & SDE_DBG_DUMP_IN_MEM);
2035
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2036 pr_debug("%s: reg_dump_flag=%d in_log=%d in_mem=%d\n",
2037 dump_name, reg_dump_flag, in_log, in_mem);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2038
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2039 if (!in_log && !in_mem)
2040 return;
2041
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2042 if (in_log)
2043 dev_info(sde_dbg_base.dev, "%s: start_offset 0x%lx len 0x%zx\n",
2044 dump_name, addr - base_addr, len_bytes);
2045
2046 len_align = (len_bytes + REG_DUMP_ALIGN - 1) / REG_DUMP_ALIGN;
2047 len_padded = len_align * REG_DUMP_ALIGN;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2048 end_addr = addr + len_bytes;
2049
2050 if (in_mem) {
2051 if (dump_mem && !(*dump_mem)) {
2052 phys_addr_t phys = 0;
2053 *dump_mem = dma_alloc_coherent(sde_dbg_base.dev,
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2054 len_padded, &phys, GFP_KERNEL);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2055 }
2056
2057 if (dump_mem && *dump_mem) {
2058 dump_addr = *dump_mem;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2059 dev_info(sde_dbg_base.dev,
2060 "%s: start_addr:0x%pK len:0x%x reg_offset=0x%lx\n",
2061 dump_name, dump_addr, len_padded,
2062 addr - base_addr);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2063 } else {
2064 in_mem = 0;
2065 pr_err("dump_mem: kzalloc fails!\n");
2066 }
2067 }
2068
2069 if (!from_isr)
2070 _sde_dbg_enable_power(true);
2071
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2072 for (i = 0; i < len_align; i++) {
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2073 u32 x0, x4, x8, xc;
2074
2075 x0 = (addr < end_addr) ? readl_relaxed(addr + 0x0) : 0;
2076 x4 = (addr + 0x4 < end_addr) ? readl_relaxed(addr + 0x4) : 0;
2077 x8 = (addr + 0x8 < end_addr) ? readl_relaxed(addr + 0x8) : 0;
2078 xc = (addr + 0xc < end_addr) ? readl_relaxed(addr + 0xc) : 0;
2079
2080 if (in_log)
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2081 dev_info(sde_dbg_base.dev,
2082 "0x%lx : %08x %08x %08x %08x\n",
2083 addr - base_addr, x0, x4, x8, xc);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2084
2085 if (dump_addr) {
2086 dump_addr[i * 4] = x0;
2087 dump_addr[i * 4 + 1] = x4;
2088 dump_addr[i * 4 + 2] = x8;
2089 dump_addr[i * 4 + 3] = xc;
2090 }
2091
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2092 addr += REG_DUMP_ALIGN;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2093 }
2094
2095 if (!from_isr)
2096 _sde_dbg_enable_power(false);
2097}
2098
2099/**
2100 * _sde_dbg_get_dump_range - helper to retrieve dump length for a range node
2101 * @range_node: range node to dump
2102 * @max_offset: max offset of the register base
2103 * @Return: length
2104 */
2105static u32 _sde_dbg_get_dump_range(struct sde_dbg_reg_offset *range_node,
2106 size_t max_offset)
2107{
2108 u32 length = 0;
2109
2110 if ((range_node->start > range_node->end) ||
2111 (range_node->end > max_offset) || (range_node->start == 0
2112 && range_node->end == 0)) {
2113 length = max_offset;
2114 } else {
2115 length = range_node->end - range_node->start;
2116 }
2117
2118 return length;
2119}
2120
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2121static int _sde_dump_reg_range_cmp(void *priv, struct list_head *a,
2122 struct list_head *b)
2123{
2124 struct sde_dbg_reg_range *ar, *br;
2125
2126 if (!a || !b)
2127 return 0;
2128
2129 ar = container_of(a, struct sde_dbg_reg_range, head);
2130 br = container_of(b, struct sde_dbg_reg_range, head);
2131
2132 return ar->offset.start - br->offset.start;
2133}
2134
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2135/**
2136 * _sde_dump_reg_by_ranges - dump ranges or full range of the register blk base
2137 * @dbg: register blk base structure
2138 * @reg_dump_flag: dump target, memory, kernel log, or both
2139 */
2140static void _sde_dump_reg_by_ranges(struct sde_dbg_reg_base *dbg,
2141 u32 reg_dump_flag)
2142{
2143 char *addr;
2144 size_t len;
2145 struct sde_dbg_reg_range *range_node;
2146
2147 if (!dbg || !dbg->base) {
2148 pr_err("dbg base is null!\n");
2149 return;
2150 }
2151
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2152 dev_info(sde_dbg_base.dev, "%s:=========%s DUMP=========\n", __func__,
2153 dbg->name);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2154
2155 /* If there is a list to dump the registers by ranges, use the ranges */
2156 if (!list_empty(&dbg->sub_range_list)) {
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2157 /* sort the list by start address first */
2158 list_sort(NULL, &dbg->sub_range_list, _sde_dump_reg_range_cmp);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2159 list_for_each_entry(range_node, &dbg->sub_range_list, head) {
2160 len = _sde_dbg_get_dump_range(&range_node->offset,
2161 dbg->max_offset);
2162 addr = dbg->base + range_node->offset.start;
2163 pr_debug("%s: range_base=0x%pK start=0x%x end=0x%x\n",
2164 range_node->range_name,
2165 addr, range_node->offset.start,
2166 range_node->offset.end);
2167
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2168 _sde_dump_reg(range_node->range_name, reg_dump_flag,
2169 dbg->base, addr, len,
2170 &range_node->reg_dump, false);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2171 }
2172 } else {
2173 /* If there is no list to dump ranges, dump all registers */
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2174 dev_info(sde_dbg_base.dev,
2175 "Ranges not found, will dump full registers\n");
2176 dev_info(sde_dbg_base.dev, "base:0x%pK len:0x%zx\n", dbg->base,
2177 dbg->max_offset);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2178 addr = dbg->base;
2179 len = dbg->max_offset;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2180 _sde_dump_reg(dbg->name, reg_dump_flag, dbg->base, addr, len,
2181 &dbg->reg_dump, false);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2182 }
2183}
2184
2185/**
2186 * _sde_dump_reg_by_blk - dump a named register base region
2187 * @blk_name: register blk name
2188 */
2189static void _sde_dump_reg_by_blk(const char *blk_name)
2190{
2191 struct sde_dbg_base *dbg_base = &sde_dbg_base;
2192 struct sde_dbg_reg_base *blk_base;
2193
2194 if (!dbg_base)
2195 return;
2196
2197 list_for_each_entry(blk_base, &dbg_base->reg_base_list, reg_base_head) {
2198 if (strlen(blk_base->name) &&
2199 !strcmp(blk_base->name, blk_name)) {
2200 _sde_dump_reg_by_ranges(blk_base,
2201 dbg_base->enable_reg_dump);
2202 break;
2203 }
2204 }
2205}
2206
2207/**
2208 * _sde_dump_reg_all - dump all register regions
2209 */
2210static void _sde_dump_reg_all(void)
2211{
2212 struct sde_dbg_base *dbg_base = &sde_dbg_base;
2213 struct sde_dbg_reg_base *blk_base;
2214
2215 if (!dbg_base)
2216 return;
2217
2218 list_for_each_entry(blk_base, &dbg_base->reg_base_list, reg_base_head)
2219 if (strlen(blk_base->name))
2220 _sde_dump_reg_by_blk(blk_base->name);
2221}
2222
2223/**
2224 * _sde_dump_get_blk_addr - retrieve register block address by name
2225 * @blk_name: register blk name
2226 * @Return: register blk base, or NULL
2227 */
2228static struct sde_dbg_reg_base *_sde_dump_get_blk_addr(const char *blk_name)
2229{
2230 struct sde_dbg_base *dbg_base = &sde_dbg_base;
2231 struct sde_dbg_reg_base *blk_base;
2232
2233 list_for_each_entry(blk_base, &dbg_base->reg_base_list, reg_base_head)
2234 if (strlen(blk_base->name) && !strcmp(blk_base->name, blk_name))
2235 return blk_base;
2236
2237 return NULL;
2238}
2239
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2240static void _sde_dbg_dump_sde_dbg_bus(struct sde_dbg_sde_debug_bus *bus)
2241{
2242 bool in_log, in_mem;
2243 u32 **dump_mem = NULL;
2244 u32 *dump_addr = NULL;
2245 u32 status = 0;
2246 struct sde_debug_bus_entry *head;
2247 phys_addr_t phys = 0;
2248 int list_size;
2249 int i;
2250 u32 offset;
2251 void __iomem *mem_base = NULL;
2252 struct sde_dbg_reg_base *reg_base;
2253
2254 if (!bus || !bus->cmn.entries_size)
2255 return;
2256
2257 list_for_each_entry(reg_base, &sde_dbg_base.reg_base_list,
2258 reg_base_head)
2259 if (strlen(reg_base->name) &&
2260 !strcmp(reg_base->name, bus->cmn.name))
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2261 mem_base = reg_base->base + bus->top_blk_off;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2262
2263 if (!mem_base) {
2264 pr_err("unable to find mem_base for %s\n", bus->cmn.name);
2265 return;
2266 }
2267
2268 dump_mem = &bus->cmn.dumped_content;
2269
2270 /* will keep in memory 4 entries of 4 bytes each */
2271 list_size = (bus->cmn.entries_size * 4 * 4);
2272
2273 in_log = (bus->cmn.enable_mask & SDE_DBG_DUMP_IN_LOG);
2274 in_mem = (bus->cmn.enable_mask & SDE_DBG_DUMP_IN_MEM);
2275
2276 if (!in_log && !in_mem)
2277 return;
2278
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2279 dev_info(sde_dbg_base.dev, "======== start %s dump =========\n",
2280 bus->cmn.name);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2281
2282 if (in_mem) {
2283 if (!(*dump_mem))
2284 *dump_mem = dma_alloc_coherent(sde_dbg_base.dev,
2285 list_size, &phys, GFP_KERNEL);
2286
2287 if (*dump_mem) {
2288 dump_addr = *dump_mem;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2289 dev_info(sde_dbg_base.dev,
2290 "%s: start_addr:0x%pK len:0x%x\n",
2291 __func__, dump_addr, list_size);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2292 } else {
2293 in_mem = false;
2294 pr_err("dump_mem: allocation fails\n");
2295 }
2296 }
2297
2298 _sde_dbg_enable_power(true);
2299 for (i = 0; i < bus->cmn.entries_size; i++) {
2300 head = bus->entries + i;
2301 writel_relaxed(TEST_MASK(head->block_id, head->test_id),
2302 mem_base + head->wr_addr);
2303 wmb(); /* make sure test bits were written */
2304
2305 if (bus->cmn.flags & DBGBUS_FLAGS_DSPP)
2306 offset = DBGBUS_DSPP_STATUS;
2307 else
2308 offset = head->wr_addr + 0x4;
2309
2310 status = readl_relaxed(mem_base + offset);
2311
2312 if (in_log)
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2313 dev_info(sde_dbg_base.dev,
2314 "waddr=0x%x blk=%d tst=%d val=0x%x\n",
2315 head->wr_addr, head->block_id,
2316 head->test_id, status);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2317
2318 if (dump_addr && in_mem) {
2319 dump_addr[i*4] = head->wr_addr;
2320 dump_addr[i*4 + 1] = head->block_id;
2321 dump_addr[i*4 + 2] = head->test_id;
2322 dump_addr[i*4 + 3] = status;
2323 }
2324
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]2325 if (head->analyzer)
2326 head->analyzer(head, status);
2327
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2328 /* Disable debug bus once we are done */
2329 writel_relaxed(0, mem_base + head->wr_addr);
2330
2331 }
2332 _sde_dbg_enable_power(false);
2333
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2334 dev_info(sde_dbg_base.dev, "======== end %s dump =========\n",
2335 bus->cmn.name);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2336}
2337
2338static void _sde_dbg_dump_vbif_debug_bus_entry(
2339 struct vbif_debug_bus_entry *head, void __iomem *mem_base,
2340 u32 *dump_addr, bool in_log)
2341{
2342 int i, j;
2343 u32 val;
2344
2345 if (!dump_addr && !in_log)
2346 return;
2347
2348 for (i = 0; i < head->block_cnt; i++) {
2349 writel_relaxed(1 << (i + head->bit_offset),
2350 mem_base + head->block_bus_addr);
2351 /* make sure that current bus blcok enable */
2352 wmb();
2353 for (j = head->test_pnt_start; j < head->test_pnt_cnt; j++) {
2354 writel_relaxed(j, mem_base + head->block_bus_addr + 4);
2355 /* make sure that test point is enabled */
2356 wmb();
2357 val = readl_relaxed(mem_base + MMSS_VBIF_TEST_BUS_OUT);
2358 if (dump_addr) {
2359 *dump_addr++ = head->block_bus_addr;
2360 *dump_addr++ = i;
2361 *dump_addr++ = j;
2362 *dump_addr++ = val;
2363 }
2364 if (in_log)
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2365 dev_info(sde_dbg_base.dev,
2366 "testpoint:%x arb/xin id=%d index=%d val=0x%x\n",
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2367 head->block_bus_addr, i, j, val);
2368 }
2369 }
2370}
2371
2372static void _sde_dbg_dump_vbif_dbg_bus(struct sde_dbg_vbif_debug_bus *bus)
2373{
2374 bool in_log, in_mem;
2375 u32 **dump_mem = NULL;
2376 u32 *dump_addr = NULL;
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2377 u32 value, d0, d1;
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]2378 unsigned long reg, reg1, reg2;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2379 struct vbif_debug_bus_entry *head;
2380 phys_addr_t phys = 0;
2381 int i, list_size = 0;
2382 void __iomem *mem_base = NULL;
2383 struct vbif_debug_bus_entry *dbg_bus;
2384 u32 bus_size;
2385 struct sde_dbg_reg_base *reg_base;
2386
2387 if (!bus || !bus->cmn.entries_size)
2388 return;
2389
2390 list_for_each_entry(reg_base, &sde_dbg_base.reg_base_list,
2391 reg_base_head)
2392 if (strlen(reg_base->name) &&
2393 !strcmp(reg_base->name, bus->cmn.name))
2394 mem_base = reg_base->base;
2395
2396 if (!mem_base) {
2397 pr_err("unable to find mem_base for %s\n", bus->cmn.name);
2398 return;
2399 }
2400
2401 dbg_bus = bus->entries;
2402 bus_size = bus->cmn.entries_size;
2403 list_size = bus->cmn.entries_size;
2404 dump_mem = &bus->cmn.dumped_content;
2405
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2406 dev_info(sde_dbg_base.dev, "======== start %s dump =========\n",
2407 bus->cmn.name);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2408
2409 if (!dump_mem || !dbg_bus || !bus_size || !list_size)
2410 return;
2411
2412 /* allocate memory for each test point */
2413 for (i = 0; i < bus_size; i++) {
2414 head = dbg_bus + i;
2415 list_size += (head->block_cnt * head->test_pnt_cnt);
2416 }
2417
2418 /* 4 bytes * 4 entries for each test point*/
2419 list_size *= 16;
2420
2421 in_log = (bus->cmn.enable_mask & SDE_DBG_DUMP_IN_LOG);
2422 in_mem = (bus->cmn.enable_mask & SDE_DBG_DUMP_IN_MEM);
2423
2424 if (!in_log && !in_mem)
2425 return;
2426
2427 if (in_mem) {
2428 if (!(*dump_mem))
2429 *dump_mem = dma_alloc_coherent(sde_dbg_base.dev,
2430 list_size, &phys, GFP_KERNEL);
2431
2432 if (*dump_mem) {
2433 dump_addr = *dump_mem;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2434 dev_info(sde_dbg_base.dev,
2435 "%s: start_addr:0x%pK len:0x%x\n",
2436 __func__, dump_addr, list_size);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2437 } else {
2438 in_mem = false;
2439 pr_err("dump_mem: allocation fails\n");
2440 }
2441 }
2442
2443 _sde_dbg_enable_power(true);
2444
2445 value = readl_relaxed(mem_base + MMSS_VBIF_CLKON);
2446 writel_relaxed(value | BIT(1), mem_base + MMSS_VBIF_CLKON);
2447
2448 /* make sure that vbif core is on */
2449 wmb();
2450
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2451 /**
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]2452 * Extract VBIF error info based on XIN halt and error status.
2453 * If the XIN client is not in HALT state, or an error is detected,
2454 * then retrieve the VBIF error info for it.
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2455 */
2456 reg = readl_relaxed(mem_base + MMSS_VBIF_XIN_HALT_CTRL1);
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]2457 reg1 = readl_relaxed(mem_base + MMSS_VBIF_PND_ERR);
2458 reg2 = readl_relaxed(mem_base + MMSS_VBIF_SRC_ERR);
2459 dev_err(sde_dbg_base.dev,
2460 "XIN HALT:0x%lX, PND ERR:0x%lX, SRC ERR:0x%lX\n",
2461 reg, reg1, reg2);
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2462 reg >>= 16;
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]2463 reg &= ~(reg1 | reg2);
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2464 for (i = 0; i < MMSS_VBIF_CLIENT_NUM; i++) {
2465 if (!test_bit(0, &reg)) {
2466 writel_relaxed(i, mem_base + MMSS_VBIF_ERR_INFO);
2467 /* make sure reg write goes through */
2468 wmb();
2469
2470 d0 = readl_relaxed(mem_base + MMSS_VBIF_ERR_INFO);
2471 d1 = readl_relaxed(mem_base + MMSS_VBIF_ERR_INFO_1);
2472
2473 dev_err(sde_dbg_base.dev,
2474 "Client:%d, errinfo=0x%X, errinfo1=0x%X\n",
2475 i, d0, d1);
2476 }
2477 reg >>= 1;
2478 }
2479
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2480 for (i = 0; i < bus_size; i++) {
2481 head = dbg_bus + i;
2482
2483 writel_relaxed(0, mem_base + head->disable_bus_addr);
2484 writel_relaxed(BIT(0), mem_base + MMSS_VBIF_TEST_BUS_OUT_CTRL);
2485 /* make sure that other bus is off */
2486 wmb();
2487
2488 _sde_dbg_dump_vbif_debug_bus_entry(head, mem_base, dump_addr,
2489 in_log);
2490 if (dump_addr)
2491 dump_addr += (head->block_cnt * head->test_pnt_cnt * 4);
2492 }
2493
2494 _sde_dbg_enable_power(false);
2495
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2496 dev_info(sde_dbg_base.dev, "======== end %s dump =========\n",
2497 bus->cmn.name);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2498}
2499
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2500/**
2501 * _sde_dump_array - dump array of register bases
2502 * @blk_arr: array of register base pointers
2503 * @len: length of blk_arr
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2504 * @do_panic: whether to trigger a panic after dumping
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2505 * @name: string indicating origin of dump
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2506 * @dump_dbgbus_sde: whether to dump the sde debug bus
2507 * @dump_dbgbus_vbif_rt: whether to dump the vbif rt debug bus
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2508 */
2509static void _sde_dump_array(struct sde_dbg_reg_base *blk_arr[],
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2510 u32 len, bool do_panic, const char *name, bool dump_dbgbus_sde,
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2511 bool dump_dbgbus_vbif_rt, bool dump_all)
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2512{
2513 int i;
2514
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2515 sde_evtlog_dump_all(sde_dbg_base.evtlog);
2516
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2517 if (dump_all || !blk_arr || !len) {
2518 _sde_dump_reg_all();
2519 } else {
2520 for (i = 0; i < len; i++) {
2521 if (blk_arr[i] != NULL)
2522 _sde_dump_reg_by_ranges(blk_arr[i],
2523 sde_dbg_base.enable_reg_dump);
2524 }
2525 }
2526
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2527 if (dump_dbgbus_sde)
2528 _sde_dbg_dump_sde_dbg_bus(&sde_dbg_base.dbgbus_sde);
2529
2530 if (dump_dbgbus_vbif_rt)
2531 _sde_dbg_dump_vbif_dbg_bus(&sde_dbg_base.dbgbus_vbif_rt);
2532
2533 if (do_panic && sde_dbg_base.panic_on_err)
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2534 panic(name);
2535}
2536
2537/**
2538 * _sde_dump_work - deferred dump work function
2539 * @work: work structure
2540 */
2541static void _sde_dump_work(struct work_struct *work)
2542{
2543 _sde_dump_array(sde_dbg_base.req_dump_blks,
2544 ARRAY_SIZE(sde_dbg_base.req_dump_blks),
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2545 sde_dbg_base.work_panic, "evtlog_workitem",
2546 sde_dbg_base.dbgbus_sde.cmn.include_in_deferred_work,
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2547 sde_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work,
2548 sde_dbg_base.dump_all);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2549}
2550
2551void sde_dbg_dump(bool queue_work, const char *name, ...)
2552{
2553 int i, index = 0;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2554 bool do_panic = false;
2555 bool dump_dbgbus_sde = false;
2556 bool dump_dbgbus_vbif_rt = false;
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2557 bool dump_all = false;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2558 va_list args;
2559 char *blk_name = NULL;
2560 struct sde_dbg_reg_base *blk_base = NULL;
2561 struct sde_dbg_reg_base **blk_arr;
2562 u32 blk_len;
2563
Clarence Ip6ac61cc2017-03-22 15:01:53 -0400[diff] [blame]2564 if (!sde_evtlog_is_enabled(sde_dbg_base.evtlog, SDE_EVTLOG_ALWAYS))
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2565 return;
2566
2567 if (queue_work && work_pending(&sde_dbg_base.dump_work))
2568 return;
2569
2570 blk_arr = &sde_dbg_base.req_dump_blks[0];
2571 blk_len = ARRAY_SIZE(sde_dbg_base.req_dump_blks);
2572
2573 memset(sde_dbg_base.req_dump_blks, 0,
2574 sizeof(sde_dbg_base.req_dump_blks));
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2575 sde_dbg_base.dump_all = false;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2576
2577 va_start(args, name);
Lloyd Atkinsonf3e8ef32017-03-22 18:49:49 -0400[diff] [blame]2578 i = 0;
2579 while ((blk_name = va_arg(args, char*))) {
2580 if (i++ >= SDE_EVTLOG_MAX_DATA) {
2581 pr_err("could not parse all dump arguments\n");
2582 break;
2583 }
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2584 if (IS_ERR_OR_NULL(blk_name))
2585 break;
2586
2587 blk_base = _sde_dump_get_blk_addr(blk_name);
2588 if (blk_base) {
2589 if (index < blk_len) {
2590 blk_arr[index] = blk_base;
2591 index++;
2592 } else {
2593 pr_err("insufficient space to to dump %s\n",
2594 blk_name);
2595 }
2596 }
2597
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2598 if (!strcmp(blk_name, "all"))
2599 dump_all = true;
2600
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2601 if (!strcmp(blk_name, "dbg_bus"))
2602 dump_dbgbus_sde = true;
2603
2604 if (!strcmp(blk_name, "vbif_dbg_bus"))
2605 dump_dbgbus_vbif_rt = true;
2606
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2607 if (!strcmp(blk_name, "panic"))
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2608 do_panic = true;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2609 }
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2610 va_end(args);
2611
2612 if (queue_work) {
2613 /* schedule work to dump later */
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2614 sde_dbg_base.work_panic = do_panic;
2615 sde_dbg_base.dbgbus_sde.cmn.include_in_deferred_work =
2616 dump_dbgbus_sde;
2617 sde_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work =
2618 dump_dbgbus_vbif_rt;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2619 schedule_work(&sde_dbg_base.dump_work);
2620 } else {
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2621 _sde_dump_array(blk_arr, blk_len, do_panic, name,
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2622 dump_dbgbus_sde, dump_dbgbus_vbif_rt, dump_all);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2623 }
2624}
2625
2626/*
2627 * sde_dbg_debugfs_open - debugfs open handler for evtlog dump
2628 * @inode: debugfs inode
2629 * @file: file handle
2630 */
2631static int sde_dbg_debugfs_open(struct inode *inode, struct file *file)
2632{
2633 /* non-seekable */
2634 file->f_mode &= ~(FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE);
2635 file->private_data = inode->i_private;
2636 return 0;
2637}
2638
2639/**
2640 * sde_evtlog_dump_read - debugfs read handler for evtlog dump
2641 * @file: file handler
2642 * @buff: user buffer content for debugfs
2643 * @count: size of user buffer
2644 * @ppos: position offset of user buffer
2645 */
2646static ssize_t sde_evtlog_dump_read(struct file *file, char __user *buff,
2647 size_t count, loff_t *ppos)
2648{
2649 ssize_t len = 0;
2650 char evtlog_buf[SDE_EVTLOG_BUF_MAX];
2651
2652 len = sde_evtlog_dump_to_buffer(sde_dbg_base.evtlog, evtlog_buf,
2653 SDE_EVTLOG_BUF_MAX);
2654 if (copy_to_user(buff, evtlog_buf, len))
2655 return -EFAULT;
2656 *ppos += len;
2657
2658 return len;
2659}
2660
2661/**
2662 * sde_evtlog_dump_write - debugfs write handler for evtlog dump
2663 * @file: file handler
2664 * @user_buf: user buffer content from debugfs
2665 * @count: size of user buffer
2666 * @ppos: position offset of user buffer
2667 */
2668static ssize_t sde_evtlog_dump_write(struct file *file,
2669 const char __user *user_buf, size_t count, loff_t *ppos)
2670{
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2671 _sde_dump_array(NULL, 0, sde_dbg_base.panic_on_err, "dump_debugfs",
2672 true, true, true);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2673
2674 return count;
2675}
2676
2677static const struct file_operations sde_evtlog_fops = {
2678 .open = sde_dbg_debugfs_open,
2679 .read = sde_evtlog_dump_read,
2680 .write = sde_evtlog_dump_write,
2681};
2682
Clarence Ip6ac61cc2017-03-22 15:01:53 -0400[diff] [blame]2683/*
2684 * sde_evtlog_filter_show - read callback for evtlog filter
2685 * @s: pointer to seq_file object
2686 * @data: pointer to private data
2687 */
2688static int sde_evtlog_filter_show(struct seq_file *s, void *data)
2689{
2690 struct sde_dbg_evtlog *evtlog;
2691 char buffer[64];
2692 int i;
2693
2694 if (!s || !s->private)
2695 return -EINVAL;
2696
2697 evtlog = s->private;
2698
2699 for (i = 0; !sde_evtlog_get_filter(
2700 evtlog, i, buffer, ARRAY_SIZE(buffer)); ++i)
2701 seq_printf(s, "*%s*\n", buffer);
2702 return 0;
2703}
2704
2705/*
2706 * sde_evtlog_filter_open - debugfs open handler for evtlog filter
2707 * @inode: debugfs inode
2708 * @file: file handle
2709 * Returns: zero on success
2710 */
2711static int sde_evtlog_filter_open(struct inode *inode, struct file *file)
2712{
2713 if (!file)
2714 return -EINVAL;
2715
2716 return single_open(file, sde_evtlog_filter_show, inode->i_private);
2717}
2718
2719/*
2720 * sde_evtlog_filter_write - write callback for evtlog filter
2721 * @file: pointer to file structure
2722 * @user_buf: pointer to incoming user data
2723 * @count: size of incoming user buffer
2724 * @ppos: pointer to file offset
2725 */
2726static ssize_t sde_evtlog_filter_write(struct file *file,
2727 const char __user *user_buf, size_t count, loff_t *ppos)
2728{
2729 char *tmp_filter = NULL;
2730 ssize_t rc = 0;
2731
2732 if (count > 0) {
2733 /* copy user provided string and null terminate it */
2734 tmp_filter = kzalloc(count + 1, GFP_KERNEL);
2735 if (!tmp_filter)
2736 rc = -ENOMEM;
2737 else if (copy_from_user(tmp_filter, user_buf, count))
2738 rc = -EFAULT;
2739 }
2740
2741 /* update actual filter configuration on success */
2742 if (!rc) {
2743 sde_evtlog_set_filter(sde_dbg_base.evtlog, tmp_filter);
2744 rc = count;
2745 }
2746 kfree(tmp_filter);
2747
2748 return rc;
2749}
2750
2751static const struct file_operations sde_evtlog_filter_fops = {
2752 .open = sde_evtlog_filter_open,
2753 .write = sde_evtlog_filter_write,
2754 .read = seq_read,
2755 .llseek = seq_lseek,
2756 .release = seq_release
2757};
2758
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2759/**
2760 * sde_dbg_reg_base_release - release allocated reg dump file private data
2761 * @inode: debugfs inode
2762 * @file: file handle
2763 * @Return: 0 on success
2764 */
2765static int sde_dbg_reg_base_release(struct inode *inode, struct file *file)
2766{
2767 struct sde_dbg_reg_base *dbg = file->private_data;
2768
2769 if (dbg && dbg->buf) {
2770 kfree(dbg->buf);
2771 dbg->buf_len = 0;
2772 dbg->buf = NULL;
2773 }
2774 return 0;
2775}
2776
2777
2778/**
2779 * sde_dbg_reg_base_offset_write - set new offset and len to debugfs reg base
2780 * @file: file handler
2781 * @user_buf: user buffer content from debugfs
2782 * @count: size of user buffer
2783 * @ppos: position offset of user buffer
2784 */
2785static ssize_t sde_dbg_reg_base_offset_write(struct file *file,
2786 const char __user *user_buf, size_t count, loff_t *ppos)
2787{
2788 struct sde_dbg_reg_base *dbg = file->private_data;
2789 u32 off = 0;
2790 u32 cnt = DEFAULT_BASE_REG_CNT;
2791 char buf[24];
2792
2793 if (!dbg)
2794 return -ENODEV;
2795
2796 if (count >= sizeof(buf))
2797 return -EFAULT;
2798
2799 if (copy_from_user(buf, user_buf, count))
2800 return -EFAULT;
2801
2802 buf[count] = 0; /* end of string */
2803
2804 if (sscanf(buf, "%5x %x", &off, &cnt) != 2)
2805 return -EFAULT;
2806
2807 if (off > dbg->max_offset)
2808 return -EINVAL;
2809
Lloyd Atkinsonc0121402017-05-23 11:28:48 -0400[diff] [blame]2810 if (off % sizeof(u32))
2811 return -EINVAL;
2812
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2813 if (cnt > (dbg->max_offset - off))
2814 cnt = dbg->max_offset - off;
2815
2816 dbg->off = off;
2817 dbg->cnt = cnt;
2818
2819 pr_debug("offset=%x cnt=%x\n", off, cnt);
2820
2821 return count;
2822}
2823
2824/**
2825 * sde_dbg_reg_base_offset_read - read current offset and len of register base
2826 * @file: file handler
2827 * @user_buf: user buffer content from debugfs
2828 * @count: size of user buffer
2829 * @ppos: position offset of user buffer
2830 */
2831static ssize_t sde_dbg_reg_base_offset_read(struct file *file,
2832 char __user *buff, size_t count, loff_t *ppos)
2833{
2834 struct sde_dbg_reg_base *dbg = file->private_data;
2835 int len = 0;
2836 char buf[24] = {'\0'};
2837
2838 if (!dbg)
2839 return -ENODEV;
2840
2841 if (*ppos)
2842 return 0; /* the end */
2843
Lloyd Atkinsonc0121402017-05-23 11:28:48 -0400[diff] [blame]2844 if (dbg->off % sizeof(u32))
2845 return -EFAULT;
2846
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2847 len = snprintf(buf, sizeof(buf), "0x%08zx %zx\n", dbg->off, dbg->cnt);
2848 if (len < 0 || len >= sizeof(buf))
2849 return 0;
2850
2851 if ((count < sizeof(buf)) || copy_to_user(buff, buf, len))
2852 return -EFAULT;
2853
2854 *ppos += len; /* increase offset */
2855
2856 return len;
2857}
2858
2859/**
2860 * sde_dbg_reg_base_reg_write - write to reg base hw at offset a given value
2861 * @file: file handler
2862 * @user_buf: user buffer content from debugfs
2863 * @count: size of user buffer
2864 * @ppos: position offset of user buffer
2865 */
2866static ssize_t sde_dbg_reg_base_reg_write(struct file *file,
2867 const char __user *user_buf, size_t count, loff_t *ppos)
2868{
2869 struct sde_dbg_reg_base *dbg = file->private_data;
2870 size_t off;
2871 u32 data, cnt;
2872 char buf[24];
2873
2874 if (!dbg)
2875 return -ENODEV;
2876
2877 if (count >= sizeof(buf))
2878 return -EFAULT;
2879
2880 if (copy_from_user(buf, user_buf, count))
2881 return -EFAULT;
2882
2883 buf[count] = 0; /* end of string */
2884
2885 cnt = sscanf(buf, "%zx %x", &off, &data);
2886
2887 if (cnt < 2)
2888 return -EFAULT;
2889
Lloyd Atkinsonc0121402017-05-23 11:28:48 -0400[diff] [blame]2890 if (off % sizeof(u32))
2891 return -EFAULT;
2892
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2893 if (off >= dbg->max_offset)
2894 return -EFAULT;
2895
2896 _sde_dbg_enable_power(true);
2897
2898 writel_relaxed(data, dbg->base + off);
2899
2900 _sde_dbg_enable_power(false);
2901
2902 pr_debug("addr=%zx data=%x\n", off, data);
2903
2904 return count;
2905}
2906
2907/**
2908 * sde_dbg_reg_base_reg_read - read len from reg base hw at current offset
2909 * @file: file handler
2910 * @user_buf: user buffer content from debugfs
2911 * @count: size of user buffer
2912 * @ppos: position offset of user buffer
2913 */
2914static ssize_t sde_dbg_reg_base_reg_read(struct file *file,
2915 char __user *user_buf, size_t count, loff_t *ppos)
2916{
2917 struct sde_dbg_reg_base *dbg = file->private_data;
2918 size_t len;
2919
2920 if (!dbg) {
2921 pr_err("invalid handle\n");
2922 return -ENODEV;
2923 }
2924
2925 if (!dbg->buf) {
2926 char dump_buf[64];
2927 char *ptr;
2928 int cnt, tot;
2929
2930 dbg->buf_len = sizeof(dump_buf) *
2931 DIV_ROUND_UP(dbg->cnt, ROW_BYTES);
2932 dbg->buf = kzalloc(dbg->buf_len, GFP_KERNEL);
2933
2934 if (!dbg->buf)
2935 return -ENOMEM;
2936
Lloyd Atkinsonc0121402017-05-23 11:28:48 -0400[diff] [blame]2937 if (dbg->off % sizeof(u32))
2938 return -EFAULT;
2939
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2940 ptr = dbg->base + dbg->off;
2941 tot = 0;
2942
2943 _sde_dbg_enable_power(true);
2944
2945 for (cnt = dbg->cnt; cnt > 0; cnt -= ROW_BYTES) {
2946 hex_dump_to_buffer(ptr, min(cnt, ROW_BYTES),
2947 ROW_BYTES, GROUP_BYTES, dump_buf,
2948 sizeof(dump_buf), false);
2949 len = scnprintf(dbg->buf + tot, dbg->buf_len - tot,
2950 "0x%08x: %s\n",
2951 ((int) (unsigned long) ptr) -
2952 ((int) (unsigned long) dbg->base),
2953 dump_buf);
2954
2955 ptr += ROW_BYTES;
2956 tot += len;
2957 if (tot >= dbg->buf_len)
2958 break;
2959 }
2960
2961 _sde_dbg_enable_power(false);
2962
2963 dbg->buf_len = tot;
2964 }
2965
2966 if (*ppos >= dbg->buf_len)
2967 return 0; /* done reading */
2968
2969 len = min(count, dbg->buf_len - (size_t) *ppos);
2970 if (copy_to_user(user_buf, dbg->buf + *ppos, len)) {
2971 pr_err("failed to copy to user\n");
2972 return -EFAULT;
2973 }
2974
2975 *ppos += len; /* increase offset */
2976
2977 return len;
2978}
2979
2980static const struct file_operations sde_off_fops = {
2981 .open = sde_dbg_debugfs_open,
2982 .release = sde_dbg_reg_base_release,
2983 .read = sde_dbg_reg_base_offset_read,
2984 .write = sde_dbg_reg_base_offset_write,
2985};
2986
2987static const struct file_operations sde_reg_fops = {
2988 .open = sde_dbg_debugfs_open,
2989 .release = sde_dbg_reg_base_release,
2990 .read = sde_dbg_reg_base_reg_read,
2991 .write = sde_dbg_reg_base_reg_write,
2992};
2993
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]2994int sde_dbg_debugfs_register(struct dentry *debugfs_root)
2995{
2996 static struct sde_dbg_base *dbg = &sde_dbg_base;
2997 struct sde_dbg_reg_base *blk_base;
2998 char debug_name[80] = "";
2999
Dhaval Patel6c666622017-03-21 23:02:59 -0700[diff] [blame]3000 if (!debugfs_root)
3001 return -EINVAL;
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3002
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3003 debugfs_create_file("dump", 0600, debugfs_root, NULL,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3004 &sde_evtlog_fops);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3005 debugfs_create_u32("enable", 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3006 &(sde_dbg_base.evtlog->enable));
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3007 debugfs_create_file("filter", 0600, debugfs_root,
Clarence Ip6ac61cc2017-03-22 15:01:53 -0400[diff] [blame]3008 sde_dbg_base.evtlog,
3009 &sde_evtlog_filter_fops);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3010 debugfs_create_u32("panic", 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3011 &sde_dbg_base.panic_on_err);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3012 debugfs_create_u32("reg_dump", 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3013 &sde_dbg_base.enable_reg_dump);
3014
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3015 if (dbg->dbgbus_sde.entries) {
3016 dbg->dbgbus_sde.cmn.name = DBGBUS_NAME_SDE;
3017 snprintf(debug_name, sizeof(debug_name), "%s_dbgbus",
3018 dbg->dbgbus_sde.cmn.name);
3019 dbg->dbgbus_sde.cmn.enable_mask = DEFAULT_DBGBUS_SDE;
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3020 debugfs_create_u32(debug_name, 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3021 &dbg->dbgbus_sde.cmn.enable_mask);
3022 }
3023
3024 if (dbg->dbgbus_vbif_rt.entries) {
3025 dbg->dbgbus_vbif_rt.cmn.name = DBGBUS_NAME_VBIF_RT;
3026 snprintf(debug_name, sizeof(debug_name), "%s_dbgbus",
3027 dbg->dbgbus_vbif_rt.cmn.name);
3028 dbg->dbgbus_vbif_rt.cmn.enable_mask = DEFAULT_DBGBUS_VBIFRT;
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3029 debugfs_create_u32(debug_name, 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3030 &dbg->dbgbus_vbif_rt.cmn.enable_mask);
3031 }
3032
3033 list_for_each_entry(blk_base, &dbg->reg_base_list, reg_base_head) {
3034 snprintf(debug_name, sizeof(debug_name), "%s_off",
3035 blk_base->name);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3036 debugfs_create_file(debug_name, 0600, debugfs_root, blk_base,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3037 &sde_off_fops);
3038
3039 snprintf(debug_name, sizeof(debug_name), "%s_reg",
3040 blk_base->name);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3041 debugfs_create_file(debug_name, 0600, debugfs_root, blk_base,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3042 &sde_reg_fops);
3043 }
3044
3045 return 0;
3046}
3047
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3048static void _sde_dbg_debugfs_destroy(void)
3049{
3050}
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3051
3052void sde_dbg_init_dbg_buses(u32 hwversion)
3053{
3054 static struct sde_dbg_base *dbg = &sde_dbg_base;
3055
3056 memset(&dbg->dbgbus_sde, 0, sizeof(dbg->dbgbus_sde));
3057 memset(&dbg->dbgbus_vbif_rt, 0, sizeof(dbg->dbgbus_vbif_rt));
3058
3059 switch (hwversion) {
3060 case SDE_HW_VER_300:
3061 case SDE_HW_VER_301:
3062 dbg->dbgbus_sde.entries = dbg_bus_sde_8998;
3063 dbg->dbgbus_sde.cmn.entries_size = ARRAY_SIZE(dbg_bus_sde_8998);
3064 dbg->dbgbus_sde.cmn.flags = DBGBUS_FLAGS_DSPP;
3065
3066 dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
3067 dbg->dbgbus_vbif_rt.cmn.entries_size =
3068 ARRAY_SIZE(vbif_dbg_bus_msm8998);
3069 break;
3070
3071 case SDE_HW_VER_400:
3072 dbg->dbgbus_sde.entries = dbg_bus_sde_sdm845;
3073 dbg->dbgbus_sde.cmn.entries_size =
3074 ARRAY_SIZE(dbg_bus_sde_sdm845);
3075 dbg->dbgbus_sde.cmn.flags = DBGBUS_FLAGS_DSPP;
3076
3077 /* vbif is unchanged vs 8998 */
3078 dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
3079 dbg->dbgbus_vbif_rt.cmn.entries_size =
3080 ARRAY_SIZE(vbif_dbg_bus_msm8998);
3081 break;
3082 default:
3083 pr_err("unsupported chipset id %u\n", hwversion);
3084 break;
3085 }
3086}
3087
3088int sde_dbg_init(struct device *dev, struct sde_dbg_power_ctrl *power_ctrl)
3089{
3090 if (!dev || !power_ctrl) {
3091 pr_err("invalid params\n");
3092 return -EINVAL;
3093 }
3094
3095 INIT_LIST_HEAD(&sde_dbg_base.reg_base_list);
3096 sde_dbg_base.dev = dev;
3097 sde_dbg_base.power_ctrl = *power_ctrl;
3098
3099 sde_dbg_base.evtlog = sde_evtlog_init();
3100 if (IS_ERR_OR_NULL(sde_dbg_base.evtlog))
3101 return PTR_ERR(sde_dbg_base.evtlog);
3102
3103 sde_dbg_base_evtlog = sde_dbg_base.evtlog;
3104
3105 INIT_WORK(&sde_dbg_base.dump_work, _sde_dump_work);
3106 sde_dbg_base.work_panic = false;
3107 sde_dbg_base.panic_on_err = DEFAULT_PANIC;
3108 sde_dbg_base.enable_reg_dump = DEFAULT_REGDUMP;
3109
3110 pr_info("evtlog_status: enable:%d, panic:%d, dump:%d\n",
3111 sde_dbg_base.evtlog->enable, sde_dbg_base.panic_on_err,
3112 sde_dbg_base.enable_reg_dump);
3113
3114 return 0;
3115}
3116
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]3117static void sde_dbg_reg_base_destroy(void)
3118{
3119 struct sde_dbg_reg_range *range_node, *range_tmp;
3120 struct sde_dbg_reg_base *blk_base, *blk_tmp;
3121 struct sde_dbg_base *dbg_base = &sde_dbg_base;
3122
3123 if (!dbg_base)
3124 return;
3125
3126 list_for_each_entry_safe(blk_base, blk_tmp, &dbg_base->reg_base_list,
3127 reg_base_head) {
3128 list_for_each_entry_safe(range_node, range_tmp,
3129 &blk_base->sub_range_list, head) {
3130 list_del(&range_node->head);
3131 kfree(range_node);
3132 }
3133 list_del(&blk_base->reg_base_head);
3134 kfree(blk_base);
3135 }
3136}
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3137/**
3138 * sde_dbg_destroy - destroy sde debug facilities
3139 */
3140void sde_dbg_destroy(void)
3141{
3142 _sde_dbg_debugfs_destroy();
3143 sde_dbg_base_evtlog = NULL;
3144 sde_evtlog_destroy(sde_dbg_base.evtlog);
3145 sde_dbg_base.evtlog = NULL;
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]3146 sde_dbg_reg_base_destroy();
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3147}
3148
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3149int sde_dbg_reg_register_base(const char *name, void __iomem *base,
3150 size_t max_offset)
3151{
3152 struct sde_dbg_base *dbg_base = &sde_dbg_base;
3153 struct sde_dbg_reg_base *reg_base;
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3154
3155 if (!name || !strlen(name)) {
3156 pr_err("no debug name provided\n");
3157 return -EINVAL;
3158 }
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3159
3160 reg_base = kzalloc(sizeof(*reg_base), GFP_KERNEL);
3161 if (!reg_base)
3162 return -ENOMEM;
3163
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3164 strlcpy(reg_base->name, name, sizeof(reg_base->name));
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3165 reg_base->base = base;
3166 reg_base->max_offset = max_offset;
3167 reg_base->off = 0;
3168 reg_base->cnt = DEFAULT_BASE_REG_CNT;
3169 reg_base->reg_dump = NULL;
3170
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3171 /* Initialize list to make sure check for null list will be valid */
3172 INIT_LIST_HEAD(&reg_base->sub_range_list);
3173
3174 pr_debug("%s base: %pK max_offset 0x%zX\n", reg_base->name,
3175 reg_base->base, reg_base->max_offset);
3176
3177 list_add(&reg_base->reg_base_head, &dbg_base->reg_base_list);
3178
3179 return 0;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3180}
3181
3182void sde_dbg_reg_register_dump_range(const char *base_name,
3183 const char *range_name, u32 offset_start, u32 offset_end,
3184 uint32_t xin_id)
3185{
3186 struct sde_dbg_reg_base *reg_base;
3187 struct sde_dbg_reg_range *range;
3188
3189 reg_base = _sde_dump_get_blk_addr(base_name);
3190 if (!reg_base) {
3191 pr_err("error: for range %s unable to locate base %s\n",
3192 range_name, base_name);
3193 return;
3194 }
3195
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]3196 if (!range_name || strlen(range_name) == 0) {
3197 pr_err("%pS: bad range name, base_name %s, offset_start 0x%X, end 0x%X\n",
3198 __builtin_return_address(0), base_name,
3199 offset_start, offset_end);
3200 return;
3201 }
3202
3203 if (offset_end - offset_start < REG_DUMP_ALIGN ||
3204 offset_start > offset_end) {
3205 pr_err("%pS: bad range, base_name %s, range_name %s, offset_start 0x%X, end 0x%X\n",
3206 __builtin_return_address(0), base_name,
3207 range_name, offset_start, offset_end);
3208 return;
3209 }
3210
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3211 range = kzalloc(sizeof(*range), GFP_KERNEL);
3212 if (!range)
3213 return;
3214
3215 strlcpy(range->range_name, range_name, sizeof(range->range_name));
3216 range->offset.start = offset_start;
3217 range->offset.end = offset_end;
3218 range->xin_id = xin_id;
3219 list_add_tail(&range->head, &reg_base->sub_range_list);
3220
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]3221 pr_debug("base %s, range %s, start 0x%X, end 0x%X\n",
3222 base_name, range->range_name,
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3223 range->offset.start, range->offset.end);
3224}
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]3225
3226void sde_dbg_set_sde_top_offset(u32 blk_off)
3227{
3228 sde_dbg_base.dbgbus_sde.top_blk_off = blk_off;
3229}