blob: 87175f9817c26d3ae8305de9dc5e639e699000ed [file] [log] [blame]
Christian Daudt01ebea12013-06-20 14:26:37 -07001/*
2 * Copyright (C) 2013 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/delay.h>
17#include <linux/highmem.h>
18#include <linux/platform_device.h>
19#include <linux/mmc/host.h>
20#include <linux/io.h>
21#include <linux/gpio.h>
22#include <linux/clk.h>
23#include <linux/regulator/consumer.h>
24#include <linux/of.h>
25#include <linux/of_device.h>
26#include <linux/of_gpio.h>
27#include <linux/version.h>
28#include <linux/mmc/slot-gpio.h>
29
30#include "sdhci-pltfm.h"
31#include "sdhci.h"
32
33#define SDHCI_SOFT_RESET 0x01000000
34#define KONA_SDHOST_CORECTRL 0x8000
35#define KONA_SDHOST_CD_PINCTRL 0x00000008
36#define KONA_SDHOST_STOP_HCLK 0x00000004
37#define KONA_SDHOST_RESET 0x00000002
38#define KONA_SDHOST_EN 0x00000001
39
40#define KONA_SDHOST_CORESTAT 0x8004
41#define KONA_SDHOST_WP 0x00000002
42#define KONA_SDHOST_CD_SW 0x00000001
43
44#define KONA_SDHOST_COREIMR 0x8008
45#define KONA_SDHOST_IP 0x00000001
46
47#define KONA_SDHOST_COREISR 0x800C
48#define KONA_SDHOST_COREIMSR 0x8010
49#define KONA_SDHOST_COREDBG1 0x8014
50#define KONA_SDHOST_COREGPO_MASK 0x8018
51
52#define SD_DETECT_GPIO_DEBOUNCE_128MS 128
53
54#define KONA_MMC_AUTOSUSPEND_DELAY (50)
55
56struct sdhci_bcm_kona_dev {
57 struct mutex write_lock; /* protect back to back writes */
58};
59
60
61static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
62{
63 unsigned int val;
64 unsigned long timeout;
65
66 /* This timeout should be sufficent for core to reset */
67 timeout = jiffies + msecs_to_jiffies(100);
68
69 /* reset the host using the top level reset */
70 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
71 val |= KONA_SDHOST_RESET;
72 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
73
74 while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
75 if (time_is_before_jiffies(timeout)) {
76 pr_err("Error: sd host is stuck in reset!!!\n");
77 return -EFAULT;
78 }
79 }
80
81 /* bring the host out of reset */
82 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
83 val &= ~KONA_SDHOST_RESET;
84
85 /*
86 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
87 * Back-to-Back writes to same register needs delay when SD bus clock
88 * is very low w.r.t AHB clock, mainly during boot-time and during card
89 * insert-removal.
90 */
91 usleep_range(1000, 5000);
92 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
93
94 return 0;
95}
96
97static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
98{
99 unsigned int val;
100
101 /* enable the interrupt from the IP core */
102 val = sdhci_readl(host, KONA_SDHOST_COREIMR);
103 val |= KONA_SDHOST_IP;
104 sdhci_writel(host, val, KONA_SDHOST_COREIMR);
105
106 /* Enable the AHB clock gating module to the host */
107 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
108 val |= KONA_SDHOST_EN;
109
110 /*
111 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
112 * Back-to-Back writes to same register needs delay when SD bus clock
113 * is very low w.r.t AHB clock, mainly during boot-time and during card
114 * insert-removal.
115 */
116 usleep_range(1000, 5000);
117 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
118}
119
120/*
121 * Software emulation of the SD card insertion/removal. Set insert=1 for insert
122 * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
123 * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
124 * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
125 */
126static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
127{
128 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
129 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
130 u32 val;
131
132 /*
133 * Back-to-Back register write needs a delay of min 10uS.
134 * Back-to-Back writes to same register needs delay when SD bus clock
135 * is very low w.r.t AHB clock, mainly during boot-time and during card
136 * insert-removal.
137 * We keep 20uS
138 */
139 mutex_lock(&kona_dev->write_lock);
140 udelay(20);
141 val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
142
143 if (insert) {
144 int ret;
145
146 ret = mmc_gpio_get_ro(host->mmc);
147 if (ret >= 0)
148 val = (val & ~KONA_SDHOST_WP) |
149 ((ret) ? KONA_SDHOST_WP : 0);
150
151 val |= KONA_SDHOST_CD_SW;
152 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
153 } else {
154 val &= ~KONA_SDHOST_CD_SW;
155 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
156 }
157 mutex_unlock(&kona_dev->write_lock);
158
159 return 0;
160}
161
162/*
163 * SD card interrupt event callback
164 */
165void sdhci_bcm_kona_card_event(struct sdhci_host *host)
166{
167 if (mmc_gpio_get_cd(host->mmc) > 0) {
168 dev_dbg(mmc_dev(host->mmc),
169 "card inserted\n");
170 sdhci_bcm_kona_sd_card_emulate(host, 1);
171 } else {
172 dev_dbg(mmc_dev(host->mmc),
173 "card removed\n");
174 sdhci_bcm_kona_sd_card_emulate(host, 0);
175 }
176}
177
178/*
179 * Get the base clock. Use central clock source for now. Not sure if different
180 * clock speed to each dev is allowed
181 */
182static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host)
183{
184 struct sdhci_bcm_kona_dev *kona_dev;
185 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
186 kona_dev = sdhci_pltfm_priv(pltfm_priv);
187
188 return host->mmc->f_max;
189}
190
191static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host)
192{
193 return sdhci_bcm_kona_get_max_clk(host);
194}
195
196static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
197 u8 power_mode)
198{
199 /*
200 * JEDEC and SD spec specify supplying 74 continuous clocks to
201 * device after power up. With minimum bus (100KHz) that
202 * that translates to 740us
203 */
204 if (power_mode != MMC_POWER_OFF)
205 udelay(740);
206}
207
208static struct sdhci_ops sdhci_bcm_kona_ops = {
209 .get_max_clock = sdhci_bcm_kona_get_max_clk,
210 .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
211 .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
212 .card_event = sdhci_bcm_kona_card_event,
213};
214
215static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
216 .ops = &sdhci_bcm_kona_ops,
217 .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
218 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
219 SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
220 SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
221 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
222};
223
224static const struct of_device_id sdhci_bcm_kona_of_match[] __initdata = {
225 { .compatible = "bcm,kona-sdhci"},
226 {}
227};
228MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
229
230static int __init sdhci_bcm_kona_probe(struct platform_device *pdev)
231{
232 struct sdhci_bcm_kona_dev *kona_dev = NULL;
233 struct sdhci_pltfm_host *pltfm_priv;
234 struct device *dev = &pdev->dev;
235 struct sdhci_host *host;
236 int ret;
237
238 ret = 0;
239
240 host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
241 sizeof(*kona_dev));
242 if (IS_ERR(host))
243 return PTR_ERR(host);
244
245 dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
246
247 pltfm_priv = sdhci_priv(host);
248
249 kona_dev = sdhci_pltfm_priv(pltfm_priv);
250 mutex_init(&kona_dev->write_lock);
251
252 mmc_of_parse(host->mmc);
253
254 if (!host->mmc->f_max) {
255 dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
256 ret = -ENXIO;
257 goto err_pltfm_free;
258 }
259
260 dev_dbg(dev, "non-removable=%c\n",
261 (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N');
262 dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
263 (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
264 (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
265
266 if (host->mmc->caps | MMC_CAP_NONREMOVABLE)
267 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
268
269 dev_dbg(dev, "is_8bit=%c\n",
270 (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
271
272 ret = sdhci_bcm_kona_sd_reset(host);
273 if (ret)
274 goto err_pltfm_free;
275
276 sdhci_bcm_kona_sd_init(host);
277
278 ret = sdhci_add_host(host);
279 if (ret) {
280 dev_err(dev, "Failed sdhci_add_host\n");
281 goto err_reset;
282 }
283
284 /* if device is eMMC, emulate card insert right here */
285 if (host->mmc->caps | MMC_CAP_NONREMOVABLE) {
286 ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
287 if (ret) {
288 dev_err(dev,
289 "unable to emulate card insertion\n");
290 goto err_remove_host;
291 }
292 }
293 /*
294 * Since the card detection GPIO interrupt is configured to be
295 * edge sensitive, check the initial GPIO value here, emulate
296 * only if the card is present
297 */
298 if (mmc_gpio_get_cd(host->mmc) > 0)
299 sdhci_bcm_kona_sd_card_emulate(host, 1);
300
301 dev_dbg(dev, "initialized properly\n");
302 return 0;
303
304err_remove_host:
305 sdhci_remove_host(host, 0);
306
307err_reset:
308 sdhci_bcm_kona_sd_reset(host);
309
310err_pltfm_free:
311 sdhci_pltfm_free(pdev);
312
313 dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
314 return ret;
315}
316
317static int __exit sdhci_bcm_kona_remove(struct platform_device *pdev)
318{
319 struct sdhci_host *host = platform_get_drvdata(pdev);
320 int dead;
321 u32 scratch;
322
323 dead = 0;
324 scratch = readl(host->ioaddr + SDHCI_INT_STATUS);
325 if (scratch == (u32)-1)
326 dead = 1;
327 sdhci_remove_host(host, dead);
328
329 sdhci_free_host(host);
330
331 return 0;
332}
333
334static struct platform_driver sdhci_bcm_kona_driver = {
335 .driver = {
336 .name = "sdhci-kona",
337 .owner = THIS_MODULE,
338 .pm = SDHCI_PLTFM_PMOPS,
339 .of_match_table = of_match_ptr(sdhci_bcm_kona_of_match),
340 },
341 .probe = sdhci_bcm_kona_probe,
342 .remove = __exit_p(sdhci_bcm_kona_remove),
343};
344module_platform_driver(sdhci_bcm_kona_driver);
345
346MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
347MODULE_AUTHOR("Broadcom");
348MODULE_LICENSE("GPL v2");