blob: d9335e9d0d04d247e868e465323037e4f9f78d9e [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/etherdevice.h>
19#include "htt.h"
20#include "mac.h"
21#include "hif.h"
22#include "txrx.h"
23#include "debug.h"
24
25void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
26{
27 htt->num_pending_tx--;
28 if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
29 ieee80211_wake_queues(htt->ar->hw);
30}
31
32static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
33{
34 spin_lock_bh(&htt->tx_lock);
35 __ath10k_htt_tx_dec_pending(htt);
36 spin_unlock_bh(&htt->tx_lock);
37}
38
39static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
40{
41 int ret = 0;
42
43 spin_lock_bh(&htt->tx_lock);
44
45 if (htt->num_pending_tx >= htt->max_num_pending_tx) {
46 ret = -EBUSY;
47 goto exit;
48 }
49
50 htt->num_pending_tx++;
51 if (htt->num_pending_tx == htt->max_num_pending_tx)
52 ieee80211_stop_queues(htt->ar->hw);
53
54exit:
55 spin_unlock_bh(&htt->tx_lock);
56 return ret;
57}
58
59int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
60{
61 int msdu_id;
62
63 lockdep_assert_held(&htt->tx_lock);
64
65 msdu_id = find_first_zero_bit(htt->used_msdu_ids,
66 htt->max_num_pending_tx);
67 if (msdu_id == htt->max_num_pending_tx)
68 return -ENOBUFS;
69
70 ath10k_dbg(ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
71 __set_bit(msdu_id, htt->used_msdu_ids);
72 return msdu_id;
73}
74
75void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
76{
77 lockdep_assert_held(&htt->tx_lock);
78
79 if (!test_bit(msdu_id, htt->used_msdu_ids))
80 ath10k_warn("trying to free unallocated msdu_id %d\n", msdu_id);
81
82 ath10k_dbg(ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
83 __clear_bit(msdu_id, htt->used_msdu_ids);
84}
85
86int ath10k_htt_tx_attach(struct ath10k_htt *htt)
87{
88 u8 pipe;
89
90 spin_lock_init(&htt->tx_lock);
91 init_waitqueue_head(&htt->empty_tx_wq);
92
93 /* At the beginning free queue number should hint us the maximum
94 * queue length */
Michal Kaziorcd003fa2013-07-05 16:15:13 +030095 pipe = htt->ar->htc.endpoint[htt->eid].ul_pipe_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +030096 htt->max_num_pending_tx = ath10k_hif_get_free_queue_number(htt->ar,
97 pipe);
98
Kalle Valoaad0b652013-09-08 17:56:02 +030099 ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300100 htt->max_num_pending_tx);
101
102 htt->pending_tx = kzalloc(sizeof(*htt->pending_tx) *
103 htt->max_num_pending_tx, GFP_KERNEL);
104 if (!htt->pending_tx)
105 return -ENOMEM;
106
107 htt->used_msdu_ids = kzalloc(sizeof(unsigned long) *
108 BITS_TO_LONGS(htt->max_num_pending_tx),
109 GFP_KERNEL);
110 if (!htt->used_msdu_ids) {
111 kfree(htt->pending_tx);
112 return -ENOMEM;
113 }
114
115 return 0;
116}
117
118static void ath10k_htt_tx_cleanup_pending(struct ath10k_htt *htt)
119{
Michal Kazior0a89f8a2013-09-18 14:43:20 +0200120 struct htt_tx_done tx_done = {0};
Kalle Valo5e3dd152013-06-12 20:52:10 +0300121 int msdu_id;
122
123 /* No locks needed. Called after communication with the device has
124 * been stopped. */
125
126 for (msdu_id = 0; msdu_id < htt->max_num_pending_tx; msdu_id++) {
127 if (!test_bit(msdu_id, htt->used_msdu_ids))
128 continue;
129
Kalle Valo5e3dd152013-06-12 20:52:10 +0300130 ath10k_dbg(ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
131 msdu_id);
132
Michal Kazior0a89f8a2013-09-18 14:43:20 +0200133 tx_done.discard = 1;
134 tx_done.msdu_id = msdu_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300135
Michal Kazior0a89f8a2013-09-18 14:43:20 +0200136 ath10k_txrx_tx_unref(htt, &tx_done);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300137 }
138}
139
140void ath10k_htt_tx_detach(struct ath10k_htt *htt)
141{
142 ath10k_htt_tx_cleanup_pending(htt);
143 kfree(htt->pending_tx);
144 kfree(htt->used_msdu_ids);
145 return;
146}
147
148void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
149{
Michal Kazior0a89f8a2013-09-18 14:43:20 +0200150 dev_kfree_skb_any(skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300151}
152
153int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
154{
155 struct sk_buff *skb;
156 struct htt_cmd *cmd;
157 int len = 0;
158 int ret;
159
160 len += sizeof(cmd->hdr);
161 len += sizeof(cmd->ver_req);
162
163 skb = ath10k_htc_alloc_skb(len);
164 if (!skb)
165 return -ENOMEM;
166
167 skb_put(skb, len);
168 cmd = (struct htt_cmd *)skb->data;
169 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_VERSION_REQ;
170
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300171 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300172 if (ret) {
173 dev_kfree_skb_any(skb);
174 return ret;
175 }
176
177 return 0;
178}
179
Kalle Valoa3d135e2013-09-03 11:44:10 +0300180int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
181{
182 struct htt_stats_req *req;
183 struct sk_buff *skb;
184 struct htt_cmd *cmd;
185 int len = 0, ret;
186
187 len += sizeof(cmd->hdr);
188 len += sizeof(cmd->stats_req);
189
190 skb = ath10k_htc_alloc_skb(len);
191 if (!skb)
192 return -ENOMEM;
193
194 skb_put(skb, len);
195 cmd = (struct htt_cmd *)skb->data;
196 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_STATS_REQ;
197
198 req = &cmd->stats_req;
199
200 memset(req, 0, sizeof(*req));
201
202 /* currently we support only max 8 bit masks so no need to worry
203 * about endian support */
204 req->upload_types[0] = mask;
205 req->reset_types[0] = mask;
206 req->stat_type = HTT_STATS_REQ_CFG_STAT_TYPE_INVALID;
207 req->cookie_lsb = cpu_to_le32(cookie & 0xffffffff);
208 req->cookie_msb = cpu_to_le32((cookie & 0xffffffff00000000ULL) >> 32);
209
Kalle Valoa3d135e2013-09-03 11:44:10 +0300210 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
211 if (ret) {
212 ath10k_warn("failed to send htt type stats request: %d", ret);
213 dev_kfree_skb_any(skb);
214 return ret;
215 }
216
217 return 0;
218}
219
Kalle Valo5e3dd152013-06-12 20:52:10 +0300220int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
221{
222 struct sk_buff *skb;
223 struct htt_cmd *cmd;
224 struct htt_rx_ring_setup_ring *ring;
225 const int num_rx_ring = 1;
226 u16 flags;
227 u32 fw_idx;
228 int len;
229 int ret;
230
231 /*
232 * the HW expects the buffer to be an integral number of 4-byte
233 * "words"
234 */
235 BUILD_BUG_ON(!IS_ALIGNED(HTT_RX_BUF_SIZE, 4));
236 BUILD_BUG_ON((HTT_RX_BUF_SIZE & HTT_MAX_CACHE_LINE_SIZE_MASK) != 0);
237
238 len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup.hdr)
239 + (sizeof(*ring) * num_rx_ring);
240 skb = ath10k_htc_alloc_skb(len);
241 if (!skb)
242 return -ENOMEM;
243
244 skb_put(skb, len);
245
246 cmd = (struct htt_cmd *)skb->data;
247 ring = &cmd->rx_setup.rings[0];
248
249 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG;
250 cmd->rx_setup.hdr.num_rings = 1;
251
252 /* FIXME: do we need all of this? */
253 flags = 0;
254 flags |= HTT_RX_RING_FLAGS_MAC80211_HDR;
255 flags |= HTT_RX_RING_FLAGS_MSDU_PAYLOAD;
256 flags |= HTT_RX_RING_FLAGS_PPDU_START;
257 flags |= HTT_RX_RING_FLAGS_PPDU_END;
258 flags |= HTT_RX_RING_FLAGS_MPDU_START;
259 flags |= HTT_RX_RING_FLAGS_MPDU_END;
260 flags |= HTT_RX_RING_FLAGS_MSDU_START;
261 flags |= HTT_RX_RING_FLAGS_MSDU_END;
262 flags |= HTT_RX_RING_FLAGS_RX_ATTENTION;
263 flags |= HTT_RX_RING_FLAGS_FRAG_INFO;
264 flags |= HTT_RX_RING_FLAGS_UNICAST_RX;
265 flags |= HTT_RX_RING_FLAGS_MULTICAST_RX;
266 flags |= HTT_RX_RING_FLAGS_CTRL_RX;
267 flags |= HTT_RX_RING_FLAGS_MGMT_RX;
268 flags |= HTT_RX_RING_FLAGS_NULL_RX;
269 flags |= HTT_RX_RING_FLAGS_PHY_DATA_RX;
270
271 fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
272
273 ring->fw_idx_shadow_reg_paddr =
274 __cpu_to_le32(htt->rx_ring.alloc_idx.paddr);
275 ring->rx_ring_base_paddr = __cpu_to_le32(htt->rx_ring.base_paddr);
276 ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size);
277 ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE);
278 ring->flags = __cpu_to_le16(flags);
279 ring->fw_idx_init_val = __cpu_to_le16(fw_idx);
280
281#define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4)
282
283 ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status));
284 ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload));
285 ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start));
286 ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end));
287 ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start));
288 ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end));
289 ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start));
290 ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end));
291 ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention));
292 ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info));
293
294#undef desc_offset
295
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300296 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300297 if (ret) {
298 dev_kfree_skb_any(skb);
299 return ret;
300 }
301
302 return 0;
303}
304
305int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
306{
307 struct device *dev = htt->ar->dev;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300308 struct sk_buff *txdesc = NULL;
309 struct htt_cmd *cmd;
Michal Kazior1f8bb152013-09-18 14:43:22 +0200310 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200311 u8 vdev_id = skb_cb->vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300312 int len = 0;
313 int msdu_id = -1;
314 int res;
315
316
317 res = ath10k_htt_tx_inc_pending(htt);
318 if (res)
Michal Kazior2f3773b2013-09-18 14:43:21 +0200319 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300320
321 len += sizeof(cmd->hdr);
322 len += sizeof(cmd->mgmt_tx);
323
Kalle Valo5e3dd152013-06-12 20:52:10 +0300324 spin_lock_bh(&htt->tx_lock);
Michal Kazior2f3773b2013-09-18 14:43:21 +0200325 res = ath10k_htt_tx_alloc_msdu_id(htt);
326 if (res < 0) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300327 spin_unlock_bh(&htt->tx_lock);
Michal Kazior2f3773b2013-09-18 14:43:21 +0200328 goto err_tx_dec;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300329 }
Michal Kazior2f3773b2013-09-18 14:43:21 +0200330 msdu_id = res;
Michal Kazior0a89f8a2013-09-18 14:43:20 +0200331 htt->pending_tx[msdu_id] = msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300332 spin_unlock_bh(&htt->tx_lock);
333
Michal Kazior2f3773b2013-09-18 14:43:21 +0200334 txdesc = ath10k_htc_alloc_skb(len);
335 if (!txdesc) {
336 res = -ENOMEM;
337 goto err_free_msdu_id;
338 }
339
Kalle Valo5e3dd152013-06-12 20:52:10 +0300340 res = ath10k_skb_map(dev, msdu);
341 if (res)
Michal Kazior2f3773b2013-09-18 14:43:21 +0200342 goto err_free_txdesc;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300343
344 skb_put(txdesc, len);
345 cmd = (struct htt_cmd *)txdesc->data;
346 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_MGMT_TX;
347 cmd->mgmt_tx.msdu_paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
348 cmd->mgmt_tx.len = __cpu_to_le32(msdu->len);
349 cmd->mgmt_tx.desc_id = __cpu_to_le32(msdu_id);
350 cmd->mgmt_tx.vdev_id = __cpu_to_le32(vdev_id);
351 memcpy(cmd->mgmt_tx.hdr, msdu->data,
352 min_t(int, msdu->len, HTT_MGMT_FRM_HDR_DOWNLOAD_LEN));
353
Michal Kazior1f8bb152013-09-18 14:43:22 +0200354 skb_cb->htt.frag_len = 0;
355 skb_cb->htt.pad_len = 0;
356
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300357 res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300358 if (res)
Michal Kazior2f3773b2013-09-18 14:43:21 +0200359 goto err_unmap_msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300360
361 return 0;
362
Michal Kazior2f3773b2013-09-18 14:43:21 +0200363err_unmap_msdu:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300364 ath10k_skb_unmap(dev, msdu);
Michal Kazior2f3773b2013-09-18 14:43:21 +0200365err_free_txdesc:
366 dev_kfree_skb_any(txdesc);
367err_free_msdu_id:
368 spin_lock_bh(&htt->tx_lock);
369 htt->pending_tx[msdu_id] = NULL;
370 ath10k_htt_tx_free_msdu_id(htt, msdu_id);
371 spin_unlock_bh(&htt->tx_lock);
372err_tx_dec:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300373 ath10k_htt_tx_dec_pending(htt);
Michal Kazior2f3773b2013-09-18 14:43:21 +0200374err:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300375 return res;
376}
377
378int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
379{
380 struct device *dev = htt->ar->dev;
381 struct htt_cmd *cmd;
382 struct htt_data_tx_desc_frag *tx_frags;
383 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
Michal Kazior1f8bb152013-09-18 14:43:22 +0200384 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300385 struct sk_buff *txdesc = NULL;
Michal Kazior2f3773b2013-09-18 14:43:21 +0200386 bool use_frags;
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200387 u8 vdev_id = ATH10K_SKB_CB(msdu)->vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300388 u8 tid;
Michal Kazior1f8bb152013-09-18 14:43:22 +0200389 int prefetch_len, desc_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300390 int msdu_id = -1;
391 int res;
392 u8 flags0;
393 u16 flags1;
394
395 res = ath10k_htt_tx_inc_pending(htt);
396 if (res)
Michal Kazior2f3773b2013-09-18 14:43:21 +0200397 goto err;
398
399 spin_lock_bh(&htt->tx_lock);
400 res = ath10k_htt_tx_alloc_msdu_id(htt);
401 if (res < 0) {
402 spin_unlock_bh(&htt->tx_lock);
403 goto err_tx_dec;
404 }
405 msdu_id = res;
406 htt->pending_tx[msdu_id] = msdu;
407 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300408
409 prefetch_len = min(htt->prefetch_len, msdu->len);
410 prefetch_len = roundup(prefetch_len, 4);
411
412 desc_len = sizeof(cmd->hdr) + sizeof(cmd->data_tx) + prefetch_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300413
414 txdesc = ath10k_htc_alloc_skb(desc_len);
415 if (!txdesc) {
416 res = -ENOMEM;
Michal Kazior2f3773b2013-09-18 14:43:21 +0200417 goto err_free_msdu_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300418 }
419
Michal Kazior961d4c32013-08-09 10:13:34 +0200420 /* Since HTT 3.0 there is no separate mgmt tx command. However in case
421 * of mgmt tx using TX_FRM there is not tx fragment list. Instead of tx
422 * fragment list host driver specifies directly frame pointer. */
Michal Kazior2f3773b2013-09-18 14:43:21 +0200423 use_frags = htt->target_version_major < 3 ||
424 !ieee80211_is_mgmt(hdr->frame_control);
425
Kalle Valo5e3dd152013-06-12 20:52:10 +0300426 if (!IS_ALIGNED((unsigned long)txdesc->data, 4)) {
427 ath10k_warn("htt alignment check failed. dropping packet.\n");
428 res = -EIO;
Michal Kazior1f8bb152013-09-18 14:43:22 +0200429 goto err_free_txdesc;
430 }
431
432 if (use_frags) {
433 skb_cb->htt.frag_len = sizeof(*tx_frags) * 2;
434 skb_cb->htt.pad_len = (unsigned long)msdu->data -
435 round_down((unsigned long)msdu->data, 4);
436
437 skb_push(msdu, skb_cb->htt.frag_len + skb_cb->htt.pad_len);
438 } else {
439 skb_cb->htt.frag_len = 0;
440 skb_cb->htt.pad_len = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300441 }
442
Kalle Valo5e3dd152013-06-12 20:52:10 +0300443 res = ath10k_skb_map(dev, msdu);
444 if (res)
Michal Kazior1f8bb152013-09-18 14:43:22 +0200445 goto err_pull_txfrag;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300446
Michal Kazior2f3773b2013-09-18 14:43:21 +0200447 if (use_frags) {
Michal Kazior1f8bb152013-09-18 14:43:22 +0200448 dma_sync_single_for_cpu(dev, skb_cb->paddr, msdu->len,
449 DMA_TO_DEVICE);
450
Michal Kazior961d4c32013-08-09 10:13:34 +0200451 /* tx fragment list must be terminated with zero-entry */
Michal Kazior1f8bb152013-09-18 14:43:22 +0200452 tx_frags = (struct htt_data_tx_desc_frag *)msdu->data;
453 tx_frags[0].paddr = __cpu_to_le32(skb_cb->paddr +
454 skb_cb->htt.frag_len +
455 skb_cb->htt.pad_len);
456 tx_frags[0].len = __cpu_to_le32(msdu->len -
457 skb_cb->htt.frag_len -
458 skb_cb->htt.pad_len);
Michal Kazior961d4c32013-08-09 10:13:34 +0200459 tx_frags[1].paddr = __cpu_to_le32(0);
460 tx_frags[1].len = __cpu_to_le32(0);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300461
Michal Kazior1f8bb152013-09-18 14:43:22 +0200462 dma_sync_single_for_device(dev, skb_cb->paddr, msdu->len,
463 DMA_TO_DEVICE);
Michal Kazior961d4c32013-08-09 10:13:34 +0200464 }
465
466 ath10k_dbg(ATH10K_DBG_HTT, "msdu 0x%llx\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300467 (unsigned long long) ATH10K_SKB_CB(msdu)->paddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300468 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "msdu: ",
469 msdu->data, msdu->len);
470
471 skb_put(txdesc, desc_len);
472 cmd = (struct htt_cmd *)txdesc->data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300473
474 tid = ATH10K_SKB_CB(msdu)->htt.tid;
475
476 ath10k_dbg(ATH10K_DBG_HTT, "htt data tx using tid %hhu\n", tid);
477
478 flags0 = 0;
479 if (!ieee80211_has_protected(hdr->frame_control))
480 flags0 |= HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT;
481 flags0 |= HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT;
Michal Kazior961d4c32013-08-09 10:13:34 +0200482
Michal Kazior2f3773b2013-09-18 14:43:21 +0200483 if (use_frags)
484 flags0 |= SM(ATH10K_HW_TXRX_NATIVE_WIFI,
Michal Kazior961d4c32013-08-09 10:13:34 +0200485 HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
486 else
Michal Kazior2f3773b2013-09-18 14:43:21 +0200487 flags0 |= SM(ATH10K_HW_TXRX_MGMT,
Michal Kazior961d4c32013-08-09 10:13:34 +0200488 HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300489
490 flags1 = 0;
491 flags1 |= SM((u16)vdev_id, HTT_DATA_TX_DESC_FLAGS1_VDEV_ID);
492 flags1 |= SM((u16)tid, HTT_DATA_TX_DESC_FLAGS1_EXT_TID);
Michal Kazior7c199992013-07-31 10:47:57 +0200493 flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD;
494 flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300495
Kalle Valo5e3dd152013-06-12 20:52:10 +0300496 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_TX_FRM;
497 cmd->data_tx.flags0 = flags0;
498 cmd->data_tx.flags1 = __cpu_to_le16(flags1);
Michal Kazior1f8bb152013-09-18 14:43:22 +0200499 cmd->data_tx.len = __cpu_to_le16(msdu->len -
500 skb_cb->htt.frag_len -
501 skb_cb->htt.pad_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300502 cmd->data_tx.id = __cpu_to_le16(msdu_id);
Michal Kazior1f8bb152013-09-18 14:43:22 +0200503 cmd->data_tx.frags_paddr = __cpu_to_le32(skb_cb->paddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300504 cmd->data_tx.peerid = __cpu_to_le32(HTT_INVALID_PEERID);
505
Michal Kazior1f8bb152013-09-18 14:43:22 +0200506 memcpy(cmd->data_tx.prefetch, hdr, prefetch_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300507
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300508 res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300509 if (res)
Michal Kazior1f8bb152013-09-18 14:43:22 +0200510 goto err_unmap_msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300511
512 return 0;
Michal Kazior2f3773b2013-09-18 14:43:21 +0200513
Michal Kazior2f3773b2013-09-18 14:43:21 +0200514err_unmap_msdu:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300515 ath10k_skb_unmap(dev, msdu);
Michal Kazior1f8bb152013-09-18 14:43:22 +0200516err_pull_txfrag:
517 skb_pull(msdu, skb_cb->htt.frag_len + skb_cb->htt.pad_len);
Michal Kazior2f3773b2013-09-18 14:43:21 +0200518err_free_txdesc:
519 dev_kfree_skb_any(txdesc);
520err_free_msdu_id:
521 spin_lock_bh(&htt->tx_lock);
522 htt->pending_tx[msdu_id] = NULL;
523 ath10k_htt_tx_free_msdu_id(htt, msdu_id);
524 spin_unlock_bh(&htt->tx_lock);
525err_tx_dec:
526 ath10k_htt_tx_dec_pending(htt);
527err:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300528 return res;
529}