Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> |
| 3 | * Copyright © 2006-2007 Intel Corporation |
| 4 | * Jesse Barnes <jesse.barnes@intel.com> |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice (including the next |
| 14 | * paragraph) shall be included in all copies or substantial portions of the |
| 15 | * Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 23 | * DEALINGS IN THE SOFTWARE. |
| 24 | * |
| 25 | * Authors: |
| 26 | * Eric Anholt <eric@anholt.net> |
| 27 | */ |
| 28 | #include <linux/i2c.h> |
| 29 | #include <linux/delay.h> |
| 30 | #include "drmP.h" |
| 31 | #include "drm.h" |
| 32 | #include "drm_crtc.h" |
| 33 | #include "intel_drv.h" |
ling.ma@intel.com | 2b8d33f7 | 2009-07-29 11:31:18 +0800 | [diff] [blame] | 34 | #include "drm_edid.h" |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 35 | #include "i915_drm.h" |
| 36 | #include "i915_drv.h" |
| 37 | #include "intel_sdvo_regs.h" |
Zhao Yakui | 6070a4a | 2010-02-08 21:35:12 +0800 | [diff] [blame] | 38 | #include <linux/dmi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 39 | |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 40 | static char *tv_format_names[] = { |
| 41 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
| 42 | "PAL_B" , "PAL_D" , "PAL_G" , |
| 43 | "PAL_H" , "PAL_I" , "PAL_M" , |
| 44 | "PAL_N" , "PAL_NC" , "PAL_60" , |
| 45 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
| 46 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
| 47 | "SECAM_60" |
| 48 | }; |
| 49 | |
| 50 | #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) |
| 51 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 52 | struct intel_sdvo_priv { |
Keith Packard | f9c10a9 | 2009-05-30 12:16:25 -0700 | [diff] [blame] | 53 | u8 slave_addr; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 54 | |
| 55 | /* Register for the SDVO device: SDVOB or SDVOC */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 56 | int output_device; |
| 57 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 58 | /* Active outputs controlled by this SDVO output */ |
| 59 | uint16_t controlled_output; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 60 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 61 | /* |
| 62 | * Capabilities of the SDVO device returned by |
| 63 | * i830_sdvo_get_capabilities() |
| 64 | */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 65 | struct intel_sdvo_caps caps; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 66 | |
| 67 | /* Pixel clock limitations reported by the SDVO device, in kHz */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 68 | int pixel_clock_min, pixel_clock_max; |
| 69 | |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 70 | /* |
| 71 | * For multiple function SDVO device, |
| 72 | * this is for current attached outputs. |
| 73 | */ |
| 74 | uint16_t attached_output; |
| 75 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 76 | /** |
| 77 | * This is set if we're going to treat the device as TV-out. |
| 78 | * |
| 79 | * While we have these nice friendly flags for output types that ought |
| 80 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
| 81 | * shows up as RGB1 (VGA). |
| 82 | */ |
| 83 | bool is_tv; |
| 84 | |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 85 | /* This is for current tv format name */ |
| 86 | char *tv_format_name; |
| 87 | |
| 88 | /* This contains all current supported TV format */ |
| 89 | char *tv_format_supported[TV_FORMAT_NUM]; |
| 90 | int format_supported_num; |
| 91 | struct drm_property *tv_format_property; |
| 92 | struct drm_property *tv_format_name_property[TV_FORMAT_NUM]; |
| 93 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 94 | /** |
| 95 | * This is set if we treat the device as HDMI, instead of DVI. |
| 96 | */ |
| 97 | bool is_hdmi; |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 98 | |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 99 | /** |
| 100 | * This is set if we detect output of sdvo device as LVDS. |
| 101 | */ |
| 102 | bool is_lvds; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 103 | |
| 104 | /** |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 105 | * This is sdvo flags for input timing. |
| 106 | */ |
| 107 | uint8_t sdvo_flags; |
| 108 | |
| 109 | /** |
| 110 | * This is sdvo fixed pannel mode pointer |
| 111 | */ |
| 112 | struct drm_display_mode *sdvo_lvds_fixed_mode; |
| 113 | |
| 114 | /** |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 115 | * Returned SDTV resolutions allowed for the current format, if the |
| 116 | * device reported it. |
| 117 | */ |
| 118 | struct intel_sdvo_sdtv_resolution_reply sdtv_resolutions; |
| 119 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 120 | /* |
| 121 | * supported encoding mode, used to determine whether HDMI is |
| 122 | * supported |
| 123 | */ |
| 124 | struct intel_sdvo_encode encode; |
| 125 | |
| 126 | /* DDC bus used by this SDVO output */ |
| 127 | uint8_t ddc_bus; |
| 128 | |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 129 | /* Mac mini hack -- use the same DDC as the analog connector */ |
| 130 | struct i2c_adapter *analog_ddc_bus; |
| 131 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 132 | int save_sdvo_mult; |
| 133 | u16 save_active_outputs; |
| 134 | struct intel_sdvo_dtd save_input_dtd_1, save_input_dtd_2; |
| 135 | struct intel_sdvo_dtd save_output_dtd[16]; |
| 136 | u32 save_SDVOX; |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 137 | /* add the property for the SDVO-TV */ |
| 138 | struct drm_property *left_property; |
| 139 | struct drm_property *right_property; |
| 140 | struct drm_property *top_property; |
| 141 | struct drm_property *bottom_property; |
| 142 | struct drm_property *hpos_property; |
| 143 | struct drm_property *vpos_property; |
| 144 | |
| 145 | /* add the property for the SDVO-TV/LVDS */ |
| 146 | struct drm_property *brightness_property; |
| 147 | struct drm_property *contrast_property; |
| 148 | struct drm_property *saturation_property; |
| 149 | struct drm_property *hue_property; |
| 150 | |
| 151 | /* Add variable to record current setting for the above property */ |
| 152 | u32 left_margin, right_margin, top_margin, bottom_margin; |
| 153 | /* this is to get the range of margin.*/ |
| 154 | u32 max_hscan, max_vscan; |
| 155 | u32 max_hpos, cur_hpos; |
| 156 | u32 max_vpos, cur_vpos; |
| 157 | u32 cur_brightness, max_brightness; |
| 158 | u32 cur_contrast, max_contrast; |
| 159 | u32 cur_saturation, max_saturation; |
| 160 | u32 cur_hue, max_hue; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 161 | }; |
| 162 | |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 163 | static bool |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 164 | intel_sdvo_output_setup(struct intel_encoder *intel_encoder, uint16_t flags); |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 165 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 166 | /** |
| 167 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
| 168 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
| 169 | * comments in the BIOS). |
| 170 | */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 171 | static void intel_sdvo_write_sdvox(struct intel_encoder *intel_encoder, u32 val) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 172 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 173 | struct drm_device *dev = intel_encoder->base.dev; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 174 | struct drm_i915_private *dev_priv = dev->dev_private; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 175 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 176 | u32 bval = val, cval = val; |
| 177 | int i; |
| 178 | |
| 179 | if (sdvo_priv->output_device == SDVOB) { |
| 180 | cval = I915_READ(SDVOC); |
| 181 | } else { |
| 182 | bval = I915_READ(SDVOB); |
| 183 | } |
| 184 | /* |
| 185 | * Write the registers twice for luck. Sometimes, |
| 186 | * writing them only once doesn't appear to 'stick'. |
| 187 | * The BIOS does this too. Yay, magic |
| 188 | */ |
| 189 | for (i = 0; i < 2; i++) |
| 190 | { |
| 191 | I915_WRITE(SDVOB, bval); |
| 192 | I915_READ(SDVOB); |
| 193 | I915_WRITE(SDVOC, cval); |
| 194 | I915_READ(SDVOC); |
| 195 | } |
| 196 | } |
| 197 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 198 | static bool intel_sdvo_read_byte(struct intel_encoder *intel_encoder, u8 addr, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 199 | u8 *ch) |
| 200 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 201 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 202 | u8 out_buf[2]; |
| 203 | u8 buf[2]; |
| 204 | int ret; |
| 205 | |
| 206 | struct i2c_msg msgs[] = { |
| 207 | { |
Keith Packard | f9c10a9 | 2009-05-30 12:16:25 -0700 | [diff] [blame] | 208 | .addr = sdvo_priv->slave_addr >> 1, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 209 | .flags = 0, |
| 210 | .len = 1, |
| 211 | .buf = out_buf, |
| 212 | }, |
| 213 | { |
Keith Packard | f9c10a9 | 2009-05-30 12:16:25 -0700 | [diff] [blame] | 214 | .addr = sdvo_priv->slave_addr >> 1, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 215 | .flags = I2C_M_RD, |
| 216 | .len = 1, |
| 217 | .buf = buf, |
| 218 | } |
| 219 | }; |
| 220 | |
| 221 | out_buf[0] = addr; |
| 222 | out_buf[1] = 0; |
| 223 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 224 | if ((ret = i2c_transfer(intel_encoder->i2c_bus, msgs, 2)) == 2) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 225 | { |
| 226 | *ch = buf[0]; |
| 227 | return true; |
| 228 | } |
| 229 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 230 | DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 231 | return false; |
| 232 | } |
| 233 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 234 | static bool intel_sdvo_write_byte(struct intel_encoder *intel_encoder, int addr, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 235 | u8 ch) |
| 236 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 237 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 238 | u8 out_buf[2]; |
| 239 | struct i2c_msg msgs[] = { |
| 240 | { |
Keith Packard | f9c10a9 | 2009-05-30 12:16:25 -0700 | [diff] [blame] | 241 | .addr = sdvo_priv->slave_addr >> 1, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 242 | .flags = 0, |
| 243 | .len = 2, |
| 244 | .buf = out_buf, |
| 245 | } |
| 246 | }; |
| 247 | |
| 248 | out_buf[0] = addr; |
| 249 | out_buf[1] = ch; |
| 250 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 251 | if (i2c_transfer(intel_encoder->i2c_bus, msgs, 1) == 1) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 252 | { |
| 253 | return true; |
| 254 | } |
| 255 | return false; |
| 256 | } |
| 257 | |
| 258 | #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} |
| 259 | /** Mapping of command numbers to names, for debug output */ |
Tobias Klauser | 005568b | 2009-02-09 22:02:42 +0100 | [diff] [blame] | 260 | static const struct _sdvo_cmd_name { |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 261 | u8 cmd; |
| 262 | char *name; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 263 | } sdvo_cmd_names[] = { |
| 264 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), |
| 265 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), |
| 266 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), |
| 267 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), |
| 268 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), |
| 269 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), |
| 270 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), |
| 271 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), |
| 272 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), |
| 273 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), |
| 274 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), |
| 275 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), |
| 276 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), |
| 277 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), |
| 278 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), |
| 279 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), |
| 280 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), |
| 281 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
| 282 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), |
| 283 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
| 284 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), |
| 285 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), |
| 286 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), |
| 287 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), |
| 288 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), |
| 289 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), |
| 290 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), |
| 291 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), |
| 292 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), |
| 293 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), |
| 294 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), |
| 295 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), |
| 296 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), |
| 297 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), |
| 298 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 299 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), |
| 300 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), |
| 301 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), |
| 302 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 303 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 304 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), |
| 305 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), |
| 306 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 307 | /* Add the op code for SDVO enhancements */ |
| 308 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_POSITION_H), |
| 309 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POSITION_H), |
| 310 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_POSITION_H), |
| 311 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_POSITION_V), |
| 312 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POSITION_V), |
| 313 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_POSITION_V), |
| 314 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), |
| 315 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), |
| 316 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), |
| 317 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), |
| 318 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), |
| 319 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), |
| 320 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), |
| 321 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), |
| 322 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), |
| 323 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), |
| 324 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), |
| 325 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), |
| 326 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), |
| 327 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), |
| 328 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), |
| 329 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), |
| 330 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), |
| 331 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 332 | /* HDMI op code */ |
| 333 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), |
| 334 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), |
| 335 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), |
| 336 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), |
| 337 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), |
| 338 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), |
| 339 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), |
| 340 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), |
| 341 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), |
| 342 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), |
| 343 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), |
| 344 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), |
| 345 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), |
| 346 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), |
| 347 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), |
| 348 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), |
| 349 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), |
| 350 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), |
| 351 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), |
| 352 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 353 | }; |
| 354 | |
| 355 | #define SDVO_NAME(dev_priv) ((dev_priv)->output_device == SDVOB ? "SDVOB" : "SDVOC") |
| 356 | #define SDVO_PRIV(output) ((struct intel_sdvo_priv *) (output)->dev_priv) |
| 357 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 358 | static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 359 | void *args, int args_len) |
| 360 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 361 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 362 | int i; |
| 363 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 364 | DRM_DEBUG_KMS("%s: W: %02X ", |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 365 | SDVO_NAME(sdvo_priv), cmd); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 366 | for (i = 0; i < args_len; i++) |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 367 | DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 368 | for (; i < 8; i++) |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 369 | DRM_LOG_KMS(" "); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 370 | for (i = 0; i < sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]); i++) { |
| 371 | if (cmd == sdvo_cmd_names[i].cmd) { |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 372 | DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 373 | break; |
| 374 | } |
| 375 | } |
| 376 | if (i == sizeof(sdvo_cmd_names)/ sizeof(sdvo_cmd_names[0])) |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 377 | DRM_LOG_KMS("(%02X)", cmd); |
| 378 | DRM_LOG_KMS("\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 379 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 380 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 381 | static void intel_sdvo_write_cmd(struct intel_encoder *intel_encoder, u8 cmd, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 382 | void *args, int args_len) |
| 383 | { |
| 384 | int i; |
| 385 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 386 | intel_sdvo_debug_write(intel_encoder, cmd, args, args_len); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 387 | |
| 388 | for (i = 0; i < args_len; i++) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 389 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_ARG_0 - i, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 390 | ((u8*)args)[i]); |
| 391 | } |
| 392 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 393 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_OPCODE, cmd); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 394 | } |
| 395 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 396 | static const char *cmd_status_names[] = { |
| 397 | "Power on", |
| 398 | "Success", |
| 399 | "Not supported", |
| 400 | "Invalid arg", |
| 401 | "Pending", |
| 402 | "Target not specified", |
| 403 | "Scaling not supported" |
| 404 | }; |
| 405 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 406 | static void intel_sdvo_debug_response(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 407 | void *response, int response_len, |
| 408 | u8 status) |
| 409 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 410 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Zhenyu Wang | 33b5296 | 2009-03-24 14:02:40 +0800 | [diff] [blame] | 411 | int i; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 412 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 413 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(sdvo_priv)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 414 | for (i = 0; i < response_len; i++) |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 415 | DRM_LOG_KMS("%02X ", ((u8 *)response)[i]); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 416 | for (; i < 8; i++) |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 417 | DRM_LOG_KMS(" "); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 418 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 419 | DRM_LOG_KMS("(%s)", cmd_status_names[status]); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 420 | else |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 421 | DRM_LOG_KMS("(??? %d)", status); |
| 422 | DRM_LOG_KMS("\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 423 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 424 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 425 | static u8 intel_sdvo_read_response(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 426 | void *response, int response_len) |
| 427 | { |
| 428 | int i; |
| 429 | u8 status; |
| 430 | u8 retry = 50; |
| 431 | |
| 432 | while (retry--) { |
| 433 | /* Read the command response */ |
| 434 | for (i = 0; i < response_len; i++) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 435 | intel_sdvo_read_byte(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 436 | SDVO_I2C_RETURN_0 + i, |
| 437 | &((u8 *)response)[i]); |
| 438 | } |
| 439 | |
| 440 | /* read the return status */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 441 | intel_sdvo_read_byte(intel_encoder, SDVO_I2C_CMD_STATUS, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 442 | &status); |
| 443 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 444 | intel_sdvo_debug_response(intel_encoder, response, response_len, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 445 | status); |
| 446 | if (status != SDVO_CMD_STATUS_PENDING) |
| 447 | return status; |
| 448 | |
| 449 | mdelay(50); |
| 450 | } |
| 451 | |
| 452 | return status; |
| 453 | } |
| 454 | |
Hannes Eder | b358d0a | 2008-12-18 21:18:47 +0100 | [diff] [blame] | 455 | static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 456 | { |
| 457 | if (mode->clock >= 100000) |
| 458 | return 1; |
| 459 | else if (mode->clock >= 50000) |
| 460 | return 2; |
| 461 | else |
| 462 | return 4; |
| 463 | } |
| 464 | |
| 465 | /** |
Zhao Yakui | 6a304ca | 2010-01-08 10:58:19 +0800 | [diff] [blame] | 466 | * Try to read the response after issuie the DDC switch command. But it |
| 467 | * is noted that we must do the action of reading response and issuing DDC |
| 468 | * switch command in one I2C transaction. Otherwise when we try to start |
| 469 | * another I2C transaction after issuing the DDC bus switch, it will be |
| 470 | * switched to the internal SDVO register. |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 471 | */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 472 | static void intel_sdvo_set_control_bus_switch(struct intel_encoder *intel_encoder, |
Hannes Eder | b358d0a | 2008-12-18 21:18:47 +0100 | [diff] [blame] | 473 | u8 target) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 474 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 475 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Zhao Yakui | 6a304ca | 2010-01-08 10:58:19 +0800 | [diff] [blame] | 476 | u8 out_buf[2], cmd_buf[2], ret_value[2], ret; |
| 477 | struct i2c_msg msgs[] = { |
| 478 | { |
| 479 | .addr = sdvo_priv->slave_addr >> 1, |
| 480 | .flags = 0, |
| 481 | .len = 2, |
| 482 | .buf = out_buf, |
| 483 | }, |
| 484 | /* the following two are to read the response */ |
| 485 | { |
| 486 | .addr = sdvo_priv->slave_addr >> 1, |
| 487 | .flags = 0, |
| 488 | .len = 1, |
| 489 | .buf = cmd_buf, |
| 490 | }, |
| 491 | { |
| 492 | .addr = sdvo_priv->slave_addr >> 1, |
| 493 | .flags = I2C_M_RD, |
| 494 | .len = 1, |
| 495 | .buf = ret_value, |
| 496 | }, |
| 497 | }; |
| 498 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 499 | intel_sdvo_debug_write(intel_encoder, SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
Zhao Yakui | 6a304ca | 2010-01-08 10:58:19 +0800 | [diff] [blame] | 500 | &target, 1); |
| 501 | /* write the DDC switch command argument */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 502 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_ARG_0, target); |
Zhao Yakui | 6a304ca | 2010-01-08 10:58:19 +0800 | [diff] [blame] | 503 | |
| 504 | out_buf[0] = SDVO_I2C_OPCODE; |
| 505 | out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH; |
| 506 | cmd_buf[0] = SDVO_I2C_CMD_STATUS; |
| 507 | cmd_buf[1] = 0; |
| 508 | ret_value[0] = 0; |
| 509 | ret_value[1] = 0; |
| 510 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 511 | ret = i2c_transfer(intel_encoder->i2c_bus, msgs, 3); |
Zhao Yakui | 6a304ca | 2010-01-08 10:58:19 +0800 | [diff] [blame] | 512 | if (ret != 3) { |
| 513 | /* failure in I2C transfer */ |
| 514 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
| 515 | return; |
| 516 | } |
| 517 | if (ret_value[0] != SDVO_CMD_STATUS_SUCCESS) { |
| 518 | DRM_DEBUG_KMS("DDC switch command returns response %d\n", |
| 519 | ret_value[0]); |
| 520 | return; |
| 521 | } |
| 522 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 523 | } |
| 524 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 525 | static bool intel_sdvo_set_target_input(struct intel_encoder *intel_encoder, bool target_0, bool target_1) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 526 | { |
| 527 | struct intel_sdvo_set_target_input_args targets = {0}; |
| 528 | u8 status; |
| 529 | |
| 530 | if (target_0 && target_1) |
| 531 | return SDVO_CMD_STATUS_NOTSUPP; |
| 532 | |
| 533 | if (target_1) |
| 534 | targets.target_1 = 1; |
| 535 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 536 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TARGET_INPUT, &targets, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 537 | sizeof(targets)); |
| 538 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 539 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 540 | |
| 541 | return (status == SDVO_CMD_STATUS_SUCCESS); |
| 542 | } |
| 543 | |
| 544 | /** |
| 545 | * Return whether each input is trained. |
| 546 | * |
| 547 | * This function is making an assumption about the layout of the response, |
| 548 | * which should be checked against the docs. |
| 549 | */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 550 | static bool intel_sdvo_get_trained_inputs(struct intel_encoder *intel_encoder, bool *input_1, bool *input_2) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 551 | { |
| 552 | struct intel_sdvo_get_trained_inputs_response response; |
| 553 | u8 status; |
| 554 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 555 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_TRAINED_INPUTS, NULL, 0); |
| 556 | status = intel_sdvo_read_response(intel_encoder, &response, sizeof(response)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 557 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 558 | return false; |
| 559 | |
| 560 | *input_1 = response.input0_trained; |
| 561 | *input_2 = response.input1_trained; |
| 562 | return true; |
| 563 | } |
| 564 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 565 | static bool intel_sdvo_get_active_outputs(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 566 | u16 *outputs) |
| 567 | { |
| 568 | u8 status; |
| 569 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 570 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_OUTPUTS, NULL, 0); |
| 571 | status = intel_sdvo_read_response(intel_encoder, outputs, sizeof(*outputs)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 572 | |
| 573 | return (status == SDVO_CMD_STATUS_SUCCESS); |
| 574 | } |
| 575 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 576 | static bool intel_sdvo_set_active_outputs(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 577 | u16 outputs) |
| 578 | { |
| 579 | u8 status; |
| 580 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 581 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_OUTPUTS, &outputs, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 582 | sizeof(outputs)); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 583 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 584 | return (status == SDVO_CMD_STATUS_SUCCESS); |
| 585 | } |
| 586 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 587 | static bool intel_sdvo_set_encoder_power_state(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 588 | int mode) |
| 589 | { |
| 590 | u8 status, state = SDVO_ENCODER_STATE_ON; |
| 591 | |
| 592 | switch (mode) { |
| 593 | case DRM_MODE_DPMS_ON: |
| 594 | state = SDVO_ENCODER_STATE_ON; |
| 595 | break; |
| 596 | case DRM_MODE_DPMS_STANDBY: |
| 597 | state = SDVO_ENCODER_STATE_STANDBY; |
| 598 | break; |
| 599 | case DRM_MODE_DPMS_SUSPEND: |
| 600 | state = SDVO_ENCODER_STATE_SUSPEND; |
| 601 | break; |
| 602 | case DRM_MODE_DPMS_OFF: |
| 603 | state = SDVO_ENCODER_STATE_OFF; |
| 604 | break; |
| 605 | } |
| 606 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 607 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ENCODER_POWER_STATE, &state, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 608 | sizeof(state)); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 609 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 610 | |
| 611 | return (status == SDVO_CMD_STATUS_SUCCESS); |
| 612 | } |
| 613 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 614 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 615 | int *clock_min, |
| 616 | int *clock_max) |
| 617 | { |
| 618 | struct intel_sdvo_pixel_clock_range clocks; |
| 619 | u8 status; |
| 620 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 621 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 622 | NULL, 0); |
| 623 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 624 | status = intel_sdvo_read_response(intel_encoder, &clocks, sizeof(clocks)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 625 | |
| 626 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 627 | return false; |
| 628 | |
| 629 | /* Convert the values from units of 10 kHz to kHz. */ |
| 630 | *clock_min = clocks.min * 10; |
| 631 | *clock_max = clocks.max * 10; |
| 632 | |
| 633 | return true; |
| 634 | } |
| 635 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 636 | static bool intel_sdvo_set_target_output(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 637 | u16 outputs) |
| 638 | { |
| 639 | u8 status; |
| 640 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 641 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TARGET_OUTPUT, &outputs, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 642 | sizeof(outputs)); |
| 643 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 644 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 645 | return (status == SDVO_CMD_STATUS_SUCCESS); |
| 646 | } |
| 647 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 648 | static bool intel_sdvo_get_timing(struct intel_encoder *intel_encoder, u8 cmd, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 649 | struct intel_sdvo_dtd *dtd) |
| 650 | { |
| 651 | u8 status; |
| 652 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 653 | intel_sdvo_write_cmd(intel_encoder, cmd, NULL, 0); |
| 654 | status = intel_sdvo_read_response(intel_encoder, &dtd->part1, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 655 | sizeof(dtd->part1)); |
| 656 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 657 | return false; |
| 658 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 659 | intel_sdvo_write_cmd(intel_encoder, cmd + 1, NULL, 0); |
| 660 | status = intel_sdvo_read_response(intel_encoder, &dtd->part2, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 661 | sizeof(dtd->part2)); |
| 662 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 663 | return false; |
| 664 | |
| 665 | return true; |
| 666 | } |
| 667 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 668 | static bool intel_sdvo_get_input_timing(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 669 | struct intel_sdvo_dtd *dtd) |
| 670 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 671 | return intel_sdvo_get_timing(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 672 | SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); |
| 673 | } |
| 674 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 675 | static bool intel_sdvo_get_output_timing(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 676 | struct intel_sdvo_dtd *dtd) |
| 677 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 678 | return intel_sdvo_get_timing(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 679 | SDVO_CMD_GET_OUTPUT_TIMINGS_PART1, dtd); |
| 680 | } |
| 681 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 682 | static bool intel_sdvo_set_timing(struct intel_encoder *intel_encoder, u8 cmd, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 683 | struct intel_sdvo_dtd *dtd) |
| 684 | { |
| 685 | u8 status; |
| 686 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 687 | intel_sdvo_write_cmd(intel_encoder, cmd, &dtd->part1, sizeof(dtd->part1)); |
| 688 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 689 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 690 | return false; |
| 691 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 692 | intel_sdvo_write_cmd(intel_encoder, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
| 693 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 694 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 695 | return false; |
| 696 | |
| 697 | return true; |
| 698 | } |
| 699 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 700 | static bool intel_sdvo_set_input_timing(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 701 | struct intel_sdvo_dtd *dtd) |
| 702 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 703 | return intel_sdvo_set_timing(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 704 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
| 705 | } |
| 706 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 707 | static bool intel_sdvo_set_output_timing(struct intel_encoder *intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 708 | struct intel_sdvo_dtd *dtd) |
| 709 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 710 | return intel_sdvo_set_timing(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 711 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
| 712 | } |
| 713 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 714 | static bool |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 715 | intel_sdvo_create_preferred_input_timing(struct intel_encoder *output, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 716 | uint16_t clock, |
| 717 | uint16_t width, |
| 718 | uint16_t height) |
| 719 | { |
| 720 | struct intel_sdvo_preferred_input_timing_args args; |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 721 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 722 | uint8_t status; |
| 723 | |
Zhenyu Wang | e642c6f | 2009-03-24 14:02:42 +0800 | [diff] [blame] | 724 | memset(&args, 0, sizeof(args)); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 725 | args.clock = clock; |
| 726 | args.width = width; |
| 727 | args.height = height; |
Zhenyu Wang | e642c6f | 2009-03-24 14:02:42 +0800 | [diff] [blame] | 728 | args.interlace = 0; |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 729 | |
| 730 | if (sdvo_priv->is_lvds && |
| 731 | (sdvo_priv->sdvo_lvds_fixed_mode->hdisplay != width || |
| 732 | sdvo_priv->sdvo_lvds_fixed_mode->vdisplay != height)) |
| 733 | args.scaled = 1; |
| 734 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 735 | intel_sdvo_write_cmd(output, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, |
| 736 | &args, sizeof(args)); |
| 737 | status = intel_sdvo_read_response(output, NULL, 0); |
| 738 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 739 | return false; |
| 740 | |
| 741 | return true; |
| 742 | } |
| 743 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 744 | static bool intel_sdvo_get_preferred_input_timing(struct intel_encoder *output, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 745 | struct intel_sdvo_dtd *dtd) |
| 746 | { |
| 747 | bool status; |
| 748 | |
| 749 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
| 750 | NULL, 0); |
| 751 | |
| 752 | status = intel_sdvo_read_response(output, &dtd->part1, |
| 753 | sizeof(dtd->part1)); |
| 754 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 755 | return false; |
| 756 | |
| 757 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
| 758 | NULL, 0); |
| 759 | |
| 760 | status = intel_sdvo_read_response(output, &dtd->part2, |
| 761 | sizeof(dtd->part2)); |
| 762 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 763 | return false; |
| 764 | |
| 765 | return false; |
| 766 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 767 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 768 | static int intel_sdvo_get_clock_rate_mult(struct intel_encoder *intel_encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 769 | { |
| 770 | u8 response, status; |
| 771 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 772 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_CLOCK_RATE_MULT, NULL, 0); |
| 773 | status = intel_sdvo_read_response(intel_encoder, &response, 1); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 774 | |
| 775 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 776 | DRM_DEBUG_KMS("Couldn't get SDVO clock rate multiplier\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 777 | return SDVO_CLOCK_RATE_MULT_1X; |
| 778 | } else { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 779 | DRM_DEBUG_KMS("Current clock rate multiplier: %d\n", response); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 780 | } |
| 781 | |
| 782 | return response; |
| 783 | } |
| 784 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 785 | static bool intel_sdvo_set_clock_rate_mult(struct intel_encoder *intel_encoder, u8 val) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 786 | { |
| 787 | u8 status; |
| 788 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 789 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
| 790 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 791 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 792 | return false; |
| 793 | |
| 794 | return true; |
| 795 | } |
| 796 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 797 | static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, |
| 798 | struct drm_display_mode *mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 799 | { |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 800 | uint16_t width, height; |
| 801 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; |
| 802 | uint16_t h_sync_offset, v_sync_offset; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 803 | |
| 804 | width = mode->crtc_hdisplay; |
| 805 | height = mode->crtc_vdisplay; |
| 806 | |
| 807 | /* do some mode translations */ |
| 808 | h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; |
| 809 | h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; |
| 810 | |
| 811 | v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; |
| 812 | v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; |
| 813 | |
| 814 | h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; |
| 815 | v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; |
| 816 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 817 | dtd->part1.clock = mode->clock / 10; |
| 818 | dtd->part1.h_active = width & 0xff; |
| 819 | dtd->part1.h_blank = h_blank_len & 0xff; |
| 820 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 821 | ((h_blank_len >> 8) & 0xf); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 822 | dtd->part1.v_active = height & 0xff; |
| 823 | dtd->part1.v_blank = v_blank_len & 0xff; |
| 824 | dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 825 | ((v_blank_len >> 8) & 0xf); |
| 826 | |
Zhenyu Wang | 171a9e9 | 2009-03-24 14:02:41 +0800 | [diff] [blame] | 827 | dtd->part2.h_sync_off = h_sync_offset & 0xff; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 828 | dtd->part2.h_sync_width = h_sync_len & 0xff; |
| 829 | dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 830 | (v_sync_len & 0xf); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 831 | dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 832 | ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | |
| 833 | ((v_sync_len & 0x30) >> 4); |
| 834 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 835 | dtd->part2.dtd_flags = 0x18; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 836 | if (mode->flags & DRM_MODE_FLAG_PHSYNC) |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 837 | dtd->part2.dtd_flags |= 0x2; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 838 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 839 | dtd->part2.dtd_flags |= 0x4; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 840 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 841 | dtd->part2.sdvo_flags = 0; |
| 842 | dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
| 843 | dtd->part2.reserved = 0; |
| 844 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 845 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 846 | static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, |
| 847 | struct intel_sdvo_dtd *dtd) |
| 848 | { |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 849 | mode->hdisplay = dtd->part1.h_active; |
| 850 | mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; |
| 851 | mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; |
Zhenyu Wang | 171a9e9 | 2009-03-24 14:02:41 +0800 | [diff] [blame] | 852 | mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 853 | mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; |
| 854 | mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; |
| 855 | mode->htotal = mode->hdisplay + dtd->part1.h_blank; |
| 856 | mode->htotal += (dtd->part1.h_high & 0xf) << 8; |
| 857 | |
| 858 | mode->vdisplay = dtd->part1.v_active; |
| 859 | mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; |
| 860 | mode->vsync_start = mode->vdisplay; |
| 861 | mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; |
Zhenyu Wang | 171a9e9 | 2009-03-24 14:02:41 +0800 | [diff] [blame] | 862 | mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 863 | mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; |
| 864 | mode->vsync_end = mode->vsync_start + |
| 865 | (dtd->part2.v_sync_off_width & 0xf); |
| 866 | mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; |
| 867 | mode->vtotal = mode->vdisplay + dtd->part1.v_blank; |
| 868 | mode->vtotal += (dtd->part1.v_high & 0xf) << 8; |
| 869 | |
| 870 | mode->clock = dtd->part1.clock * 10; |
| 871 | |
Zhenyu Wang | 171a9e9 | 2009-03-24 14:02:41 +0800 | [diff] [blame] | 872 | mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 873 | if (dtd->part2.dtd_flags & 0x2) |
| 874 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
| 875 | if (dtd->part2.dtd_flags & 0x4) |
| 876 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
| 877 | } |
| 878 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 879 | static bool intel_sdvo_get_supp_encode(struct intel_encoder *output, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 880 | struct intel_sdvo_encode *encode) |
| 881 | { |
| 882 | uint8_t status; |
| 883 | |
| 884 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0); |
| 885 | status = intel_sdvo_read_response(output, encode, sizeof(*encode)); |
| 886 | if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */ |
| 887 | memset(encode, 0, sizeof(*encode)); |
| 888 | return false; |
| 889 | } |
| 890 | |
| 891 | return true; |
| 892 | } |
| 893 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 894 | static bool intel_sdvo_set_encode(struct intel_encoder *output, uint8_t mode) |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 895 | { |
| 896 | uint8_t status; |
| 897 | |
| 898 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_ENCODE, &mode, 1); |
| 899 | status = intel_sdvo_read_response(output, NULL, 0); |
| 900 | |
| 901 | return (status == SDVO_CMD_STATUS_SUCCESS); |
| 902 | } |
| 903 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 904 | static bool intel_sdvo_set_colorimetry(struct intel_encoder *output, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 905 | uint8_t mode) |
| 906 | { |
| 907 | uint8_t status; |
| 908 | |
| 909 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
| 910 | status = intel_sdvo_read_response(output, NULL, 0); |
| 911 | |
| 912 | return (status == SDVO_CMD_STATUS_SUCCESS); |
| 913 | } |
| 914 | |
| 915 | #if 0 |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 916 | static void intel_sdvo_dump_hdmi_buf(struct intel_encoder *output) |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 917 | { |
| 918 | int i, j; |
| 919 | uint8_t set_buf_index[2]; |
| 920 | uint8_t av_split; |
| 921 | uint8_t buf_size; |
| 922 | uint8_t buf[48]; |
| 923 | uint8_t *pos; |
| 924 | |
| 925 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_AV_SPLIT, NULL, 0); |
| 926 | intel_sdvo_read_response(output, &av_split, 1); |
| 927 | |
| 928 | for (i = 0; i <= av_split; i++) { |
| 929 | set_buf_index[0] = i; set_buf_index[1] = 0; |
| 930 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_INDEX, |
| 931 | set_buf_index, 2); |
| 932 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
| 933 | intel_sdvo_read_response(output, &buf_size, 1); |
| 934 | |
| 935 | pos = buf; |
| 936 | for (j = 0; j <= buf_size; j += 8) { |
| 937 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_DATA, |
| 938 | NULL, 0); |
| 939 | intel_sdvo_read_response(output, pos, 8); |
| 940 | pos += 8; |
| 941 | } |
| 942 | } |
| 943 | } |
| 944 | #endif |
| 945 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 946 | static void intel_sdvo_set_hdmi_buf(struct intel_encoder *output, int index, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 947 | uint8_t *data, int8_t size, uint8_t tx_rate) |
| 948 | { |
| 949 | uint8_t set_buf_index[2]; |
| 950 | |
| 951 | set_buf_index[0] = index; |
| 952 | set_buf_index[1] = 0; |
| 953 | |
| 954 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_INDEX, set_buf_index, 2); |
| 955 | |
| 956 | for (; size > 0; size -= 8) { |
| 957 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_DATA, data, 8); |
| 958 | data += 8; |
| 959 | } |
| 960 | |
| 961 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1); |
| 962 | } |
| 963 | |
| 964 | static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size) |
| 965 | { |
| 966 | uint8_t csum = 0; |
| 967 | int i; |
| 968 | |
| 969 | for (i = 0; i < size; i++) |
| 970 | csum += data[i]; |
| 971 | |
| 972 | return 0x100 - csum; |
| 973 | } |
| 974 | |
| 975 | #define DIP_TYPE_AVI 0x82 |
| 976 | #define DIP_VERSION_AVI 0x2 |
| 977 | #define DIP_LEN_AVI 13 |
| 978 | |
| 979 | struct dip_infoframe { |
| 980 | uint8_t type; |
| 981 | uint8_t version; |
| 982 | uint8_t len; |
| 983 | uint8_t checksum; |
| 984 | union { |
| 985 | struct { |
| 986 | /* Packet Byte #1 */ |
| 987 | uint8_t S:2; |
| 988 | uint8_t B:2; |
| 989 | uint8_t A:1; |
| 990 | uint8_t Y:2; |
| 991 | uint8_t rsvd1:1; |
| 992 | /* Packet Byte #2 */ |
| 993 | uint8_t R:4; |
| 994 | uint8_t M:2; |
| 995 | uint8_t C:2; |
| 996 | /* Packet Byte #3 */ |
| 997 | uint8_t SC:2; |
| 998 | uint8_t Q:2; |
| 999 | uint8_t EC:3; |
| 1000 | uint8_t ITC:1; |
| 1001 | /* Packet Byte #4 */ |
| 1002 | uint8_t VIC:7; |
| 1003 | uint8_t rsvd2:1; |
| 1004 | /* Packet Byte #5 */ |
| 1005 | uint8_t PR:4; |
| 1006 | uint8_t rsvd3:4; |
| 1007 | /* Packet Byte #6~13 */ |
| 1008 | uint16_t top_bar_end; |
| 1009 | uint16_t bottom_bar_start; |
| 1010 | uint16_t left_bar_end; |
| 1011 | uint16_t right_bar_start; |
| 1012 | } avi; |
| 1013 | struct { |
| 1014 | /* Packet Byte #1 */ |
| 1015 | uint8_t channel_count:3; |
| 1016 | uint8_t rsvd1:1; |
| 1017 | uint8_t coding_type:4; |
| 1018 | /* Packet Byte #2 */ |
| 1019 | uint8_t sample_size:2; /* SS0, SS1 */ |
| 1020 | uint8_t sample_frequency:3; |
| 1021 | uint8_t rsvd2:3; |
| 1022 | /* Packet Byte #3 */ |
| 1023 | uint8_t coding_type_private:5; |
| 1024 | uint8_t rsvd3:3; |
| 1025 | /* Packet Byte #4 */ |
| 1026 | uint8_t channel_allocation; |
| 1027 | /* Packet Byte #5 */ |
| 1028 | uint8_t rsvd4:3; |
| 1029 | uint8_t level_shift:4; |
| 1030 | uint8_t downmix_inhibit:1; |
| 1031 | } audio; |
| 1032 | uint8_t payload[28]; |
| 1033 | } __attribute__ ((packed)) u; |
| 1034 | } __attribute__((packed)); |
| 1035 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1036 | static void intel_sdvo_set_avi_infoframe(struct intel_encoder *output, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1037 | struct drm_display_mode * mode) |
| 1038 | { |
| 1039 | struct dip_infoframe avi_if = { |
| 1040 | .type = DIP_TYPE_AVI, |
| 1041 | .version = DIP_VERSION_AVI, |
| 1042 | .len = DIP_LEN_AVI, |
| 1043 | }; |
| 1044 | |
| 1045 | avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if, |
| 1046 | 4 + avi_if.len); |
| 1047 | intel_sdvo_set_hdmi_buf(output, 1, (uint8_t *)&avi_if, 4 + avi_if.len, |
| 1048 | SDVO_HBUF_TX_VSYNC); |
| 1049 | } |
| 1050 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1051 | static void intel_sdvo_set_tv_format(struct intel_encoder *output) |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1052 | { |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1053 | |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1054 | struct intel_sdvo_tv_format format; |
| 1055 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
| 1056 | uint32_t format_map, i; |
| 1057 | uint8_t status; |
| 1058 | |
| 1059 | for (i = 0; i < TV_FORMAT_NUM; i++) |
| 1060 | if (tv_format_names[i] == sdvo_priv->tv_format_name) |
| 1061 | break; |
| 1062 | |
| 1063 | format_map = 1 << i; |
| 1064 | memset(&format, 0, sizeof(format)); |
| 1065 | memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ? |
| 1066 | sizeof(format) : sizeof(format_map)); |
| 1067 | |
| 1068 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, &format_map, |
| 1069 | sizeof(format)); |
| 1070 | |
| 1071 | status = intel_sdvo_read_response(output, NULL, 0); |
| 1072 | if (status != SDVO_CMD_STATUS_SUCCESS) |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 1073 | DRM_DEBUG_KMS("%s: Failed to set TV format\n", |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1074 | SDVO_NAME(sdvo_priv)); |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1075 | } |
| 1076 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1077 | static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, |
| 1078 | struct drm_display_mode *mode, |
| 1079 | struct drm_display_mode *adjusted_mode) |
| 1080 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1081 | struct intel_encoder *output = enc_to_intel_encoder(encoder); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1082 | struct intel_sdvo_priv *dev_priv = output->dev_priv; |
| 1083 | |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1084 | if (dev_priv->is_tv) { |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1085 | struct intel_sdvo_dtd output_dtd; |
| 1086 | bool success; |
| 1087 | |
| 1088 | /* We need to construct preferred input timings based on our |
| 1089 | * output timings. To do that, we have to set the output |
| 1090 | * timings, even though this isn't really the right place in |
| 1091 | * the sequence to do it. Oh well. |
| 1092 | */ |
| 1093 | |
| 1094 | |
| 1095 | /* Set output timings */ |
| 1096 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
| 1097 | intel_sdvo_set_target_output(output, |
| 1098 | dev_priv->controlled_output); |
| 1099 | intel_sdvo_set_output_timing(output, &output_dtd); |
| 1100 | |
| 1101 | /* Set the input timing to the screen. Assume always input 0. */ |
| 1102 | intel_sdvo_set_target_input(output, true, false); |
| 1103 | |
| 1104 | |
| 1105 | success = intel_sdvo_create_preferred_input_timing(output, |
| 1106 | mode->clock / 10, |
| 1107 | mode->hdisplay, |
| 1108 | mode->vdisplay); |
| 1109 | if (success) { |
| 1110 | struct intel_sdvo_dtd input_dtd; |
| 1111 | |
| 1112 | intel_sdvo_get_preferred_input_timing(output, |
| 1113 | &input_dtd); |
| 1114 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1115 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1116 | |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1117 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
| 1118 | |
| 1119 | mode->clock = adjusted_mode->clock; |
| 1120 | |
| 1121 | adjusted_mode->clock *= |
| 1122 | intel_sdvo_get_pixel_multiplier(mode); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1123 | } else { |
| 1124 | return false; |
| 1125 | } |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1126 | } else if (dev_priv->is_lvds) { |
| 1127 | struct intel_sdvo_dtd output_dtd; |
| 1128 | bool success; |
| 1129 | |
| 1130 | drm_mode_set_crtcinfo(dev_priv->sdvo_lvds_fixed_mode, 0); |
| 1131 | /* Set output timings */ |
| 1132 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
| 1133 | dev_priv->sdvo_lvds_fixed_mode); |
| 1134 | |
| 1135 | intel_sdvo_set_target_output(output, |
| 1136 | dev_priv->controlled_output); |
| 1137 | intel_sdvo_set_output_timing(output, &output_dtd); |
| 1138 | |
| 1139 | /* Set the input timing to the screen. Assume always input 0. */ |
| 1140 | intel_sdvo_set_target_input(output, true, false); |
| 1141 | |
| 1142 | |
| 1143 | success = intel_sdvo_create_preferred_input_timing( |
| 1144 | output, |
| 1145 | mode->clock / 10, |
| 1146 | mode->hdisplay, |
| 1147 | mode->vdisplay); |
| 1148 | |
| 1149 | if (success) { |
| 1150 | struct intel_sdvo_dtd input_dtd; |
| 1151 | |
| 1152 | intel_sdvo_get_preferred_input_timing(output, |
| 1153 | &input_dtd); |
| 1154 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
| 1155 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; |
| 1156 | |
| 1157 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
| 1158 | |
| 1159 | mode->clock = adjusted_mode->clock; |
| 1160 | |
| 1161 | adjusted_mode->clock *= |
| 1162 | intel_sdvo_get_pixel_multiplier(mode); |
| 1163 | } else { |
| 1164 | return false; |
| 1165 | } |
| 1166 | |
| 1167 | } else { |
| 1168 | /* Make the CRTC code factor in the SDVO pixel multiplier. The |
| 1169 | * SDVO device will be told of the multiplier during mode_set. |
| 1170 | */ |
| 1171 | adjusted_mode->clock *= intel_sdvo_get_pixel_multiplier(mode); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1172 | } |
| 1173 | return true; |
| 1174 | } |
| 1175 | |
| 1176 | static void intel_sdvo_mode_set(struct drm_encoder *encoder, |
| 1177 | struct drm_display_mode *mode, |
| 1178 | struct drm_display_mode *adjusted_mode) |
| 1179 | { |
| 1180 | struct drm_device *dev = encoder->dev; |
| 1181 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1182 | struct drm_crtc *crtc = encoder->crtc; |
| 1183 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1184 | struct intel_encoder *output = enc_to_intel_encoder(encoder); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1185 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
| 1186 | u32 sdvox = 0; |
| 1187 | int sdvo_pixel_multiply; |
| 1188 | struct intel_sdvo_in_out_map in_out; |
| 1189 | struct intel_sdvo_dtd input_dtd; |
| 1190 | u8 status; |
| 1191 | |
| 1192 | if (!mode) |
| 1193 | return; |
| 1194 | |
| 1195 | /* First, set the input mapping for the first input to our controlled |
| 1196 | * output. This is only correct if we're a single-input device, in |
| 1197 | * which case the first input is the output from the appropriate SDVO |
| 1198 | * channel on the motherboard. In a two-input device, the first input |
| 1199 | * will be SDVOB and the second SDVOC. |
| 1200 | */ |
| 1201 | in_out.in0 = sdvo_priv->controlled_output; |
| 1202 | in_out.in1 = 0; |
| 1203 | |
| 1204 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_IN_OUT_MAP, |
| 1205 | &in_out, sizeof(in_out)); |
| 1206 | status = intel_sdvo_read_response(output, NULL, 0); |
| 1207 | |
| 1208 | if (sdvo_priv->is_hdmi) { |
| 1209 | intel_sdvo_set_avi_infoframe(output, mode); |
| 1210 | sdvox |= SDVO_AUDIO_ENABLE; |
| 1211 | } |
| 1212 | |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1213 | /* We have tried to get input timing in mode_fixup, and filled into |
| 1214 | adjusted_mode */ |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1215 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1216 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1217 | input_dtd.part2.sdvo_flags = sdvo_priv->sdvo_flags; |
| 1218 | } else |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1219 | intel_sdvo_get_dtd_from_mode(&input_dtd, mode); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1220 | |
| 1221 | /* If it's a TV, we already set the output timing in mode_fixup. |
| 1222 | * Otherwise, the output timing is equal to the input timing. |
| 1223 | */ |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1224 | if (!sdvo_priv->is_tv && !sdvo_priv->is_lvds) { |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1225 | /* Set the output timing to the screen */ |
| 1226 | intel_sdvo_set_target_output(output, |
| 1227 | sdvo_priv->controlled_output); |
| 1228 | intel_sdvo_set_output_timing(output, &input_dtd); |
| 1229 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1230 | |
| 1231 | /* Set the input timing to the screen. Assume always input 0. */ |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1232 | intel_sdvo_set_target_input(output, true, false); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1233 | |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1234 | if (sdvo_priv->is_tv) |
| 1235 | intel_sdvo_set_tv_format(output); |
| 1236 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1237 | /* We would like to use intel_sdvo_create_preferred_input_timing() to |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1238 | * provide the device with a timing it can support, if it supports that |
| 1239 | * feature. However, presumably we would need to adjust the CRTC to |
| 1240 | * output the preferred timing, and we don't support that currently. |
| 1241 | */ |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1242 | #if 0 |
| 1243 | success = intel_sdvo_create_preferred_input_timing(output, clock, |
| 1244 | width, height); |
| 1245 | if (success) { |
| 1246 | struct intel_sdvo_dtd *input_dtd; |
| 1247 | |
| 1248 | intel_sdvo_get_preferred_input_timing(output, &input_dtd); |
| 1249 | intel_sdvo_set_input_timing(output, &input_dtd); |
| 1250 | } |
| 1251 | #else |
| 1252 | intel_sdvo_set_input_timing(output, &input_dtd); |
| 1253 | #endif |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1254 | |
| 1255 | switch (intel_sdvo_get_pixel_multiplier(mode)) { |
| 1256 | case 1: |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1257 | intel_sdvo_set_clock_rate_mult(output, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1258 | SDVO_CLOCK_RATE_MULT_1X); |
| 1259 | break; |
| 1260 | case 2: |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1261 | intel_sdvo_set_clock_rate_mult(output, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1262 | SDVO_CLOCK_RATE_MULT_2X); |
| 1263 | break; |
| 1264 | case 4: |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1265 | intel_sdvo_set_clock_rate_mult(output, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1266 | SDVO_CLOCK_RATE_MULT_4X); |
| 1267 | break; |
| 1268 | } |
| 1269 | |
| 1270 | /* Set the SDVO control regs. */ |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1271 | if (IS_I965G(dev)) { |
| 1272 | sdvox |= SDVO_BORDER_ENABLE | |
| 1273 | SDVO_VSYNC_ACTIVE_HIGH | |
| 1274 | SDVO_HSYNC_ACTIVE_HIGH; |
| 1275 | } else { |
| 1276 | sdvox |= I915_READ(sdvo_priv->output_device); |
| 1277 | switch (sdvo_priv->output_device) { |
| 1278 | case SDVOB: |
| 1279 | sdvox &= SDVOB_PRESERVE_MASK; |
| 1280 | break; |
| 1281 | case SDVOC: |
| 1282 | sdvox &= SDVOC_PRESERVE_MASK; |
| 1283 | break; |
| 1284 | } |
| 1285 | sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; |
| 1286 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1287 | if (intel_crtc->pipe == 1) |
| 1288 | sdvox |= SDVO_PIPE_B_SELECT; |
| 1289 | |
| 1290 | sdvo_pixel_multiply = intel_sdvo_get_pixel_multiplier(mode); |
| 1291 | if (IS_I965G(dev)) { |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1292 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
| 1293 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
| 1294 | /* done in crtc_mode_set as it lives inside the dpll register */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1295 | } else { |
| 1296 | sdvox |= (sdvo_pixel_multiply - 1) << SDVO_PORT_MULTIPLY_SHIFT; |
| 1297 | } |
| 1298 | |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1299 | if (sdvo_priv->sdvo_flags & SDVO_NEED_TO_STALL) |
| 1300 | sdvox |= SDVO_STALL_SELECT; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1301 | intel_sdvo_write_sdvox(output, sdvox); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1302 | } |
| 1303 | |
| 1304 | static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) |
| 1305 | { |
| 1306 | struct drm_device *dev = encoder->dev; |
| 1307 | struct drm_i915_private *dev_priv = dev->dev_private; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1308 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
| 1309 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1310 | u32 temp; |
| 1311 | |
| 1312 | if (mode != DRM_MODE_DPMS_ON) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1313 | intel_sdvo_set_active_outputs(intel_encoder, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1314 | if (0) |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1315 | intel_sdvo_set_encoder_power_state(intel_encoder, mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1316 | |
| 1317 | if (mode == DRM_MODE_DPMS_OFF) { |
| 1318 | temp = I915_READ(sdvo_priv->output_device); |
| 1319 | if ((temp & SDVO_ENABLE) != 0) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1320 | intel_sdvo_write_sdvox(intel_encoder, temp & ~SDVO_ENABLE); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1321 | } |
| 1322 | } |
| 1323 | } else { |
| 1324 | bool input1, input2; |
| 1325 | int i; |
| 1326 | u8 status; |
| 1327 | |
| 1328 | temp = I915_READ(sdvo_priv->output_device); |
| 1329 | if ((temp & SDVO_ENABLE) == 0) |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1330 | intel_sdvo_write_sdvox(intel_encoder, temp | SDVO_ENABLE); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1331 | for (i = 0; i < 2; i++) |
| 1332 | intel_wait_for_vblank(dev); |
| 1333 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1334 | status = intel_sdvo_get_trained_inputs(intel_encoder, &input1, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1335 | &input2); |
| 1336 | |
| 1337 | |
| 1338 | /* Warn if the device reported failure to sync. |
| 1339 | * A lot of SDVO devices fail to notify of sync, but it's |
| 1340 | * a given it the status is a success, we succeeded. |
| 1341 | */ |
| 1342 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 1343 | DRM_DEBUG_KMS("First %s output reported failure to " |
| 1344 | "sync\n", SDVO_NAME(sdvo_priv)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1345 | } |
| 1346 | |
| 1347 | if (0) |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1348 | intel_sdvo_set_encoder_power_state(intel_encoder, mode); |
| 1349 | intel_sdvo_set_active_outputs(intel_encoder, sdvo_priv->controlled_output); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1350 | } |
| 1351 | return; |
| 1352 | } |
| 1353 | |
| 1354 | static void intel_sdvo_save(struct drm_connector *connector) |
| 1355 | { |
| 1356 | struct drm_device *dev = connector->dev; |
| 1357 | struct drm_i915_private *dev_priv = dev->dev_private; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1358 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1359 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1360 | int o; |
| 1361 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1362 | sdvo_priv->save_sdvo_mult = intel_sdvo_get_clock_rate_mult(intel_encoder); |
| 1363 | intel_sdvo_get_active_outputs(intel_encoder, &sdvo_priv->save_active_outputs); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1364 | |
| 1365 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1366 | intel_sdvo_set_target_input(intel_encoder, true, false); |
| 1367 | intel_sdvo_get_input_timing(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1368 | &sdvo_priv->save_input_dtd_1); |
| 1369 | } |
| 1370 | |
| 1371 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1372 | intel_sdvo_set_target_input(intel_encoder, false, true); |
| 1373 | intel_sdvo_get_input_timing(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1374 | &sdvo_priv->save_input_dtd_2); |
| 1375 | } |
| 1376 | |
| 1377 | for (o = SDVO_OUTPUT_FIRST; o <= SDVO_OUTPUT_LAST; o++) |
| 1378 | { |
| 1379 | u16 this_output = (1 << o); |
| 1380 | if (sdvo_priv->caps.output_flags & this_output) |
| 1381 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1382 | intel_sdvo_set_target_output(intel_encoder, this_output); |
| 1383 | intel_sdvo_get_output_timing(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1384 | &sdvo_priv->save_output_dtd[o]); |
| 1385 | } |
| 1386 | } |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1387 | if (sdvo_priv->is_tv) { |
| 1388 | /* XXX: Save TV format/enhancements. */ |
| 1389 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1390 | |
| 1391 | sdvo_priv->save_SDVOX = I915_READ(sdvo_priv->output_device); |
| 1392 | } |
| 1393 | |
| 1394 | static void intel_sdvo_restore(struct drm_connector *connector) |
| 1395 | { |
| 1396 | struct drm_device *dev = connector->dev; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1397 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1398 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1399 | int o; |
| 1400 | int i; |
| 1401 | bool input1, input2; |
| 1402 | u8 status; |
| 1403 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1404 | intel_sdvo_set_active_outputs(intel_encoder, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1405 | |
| 1406 | for (o = SDVO_OUTPUT_FIRST; o <= SDVO_OUTPUT_LAST; o++) |
| 1407 | { |
| 1408 | u16 this_output = (1 << o); |
| 1409 | if (sdvo_priv->caps.output_flags & this_output) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1410 | intel_sdvo_set_target_output(intel_encoder, this_output); |
| 1411 | intel_sdvo_set_output_timing(intel_encoder, &sdvo_priv->save_output_dtd[o]); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1412 | } |
| 1413 | } |
| 1414 | |
| 1415 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1416 | intel_sdvo_set_target_input(intel_encoder, true, false); |
| 1417 | intel_sdvo_set_input_timing(intel_encoder, &sdvo_priv->save_input_dtd_1); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1418 | } |
| 1419 | |
| 1420 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1421 | intel_sdvo_set_target_input(intel_encoder, false, true); |
| 1422 | intel_sdvo_set_input_timing(intel_encoder, &sdvo_priv->save_input_dtd_2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1423 | } |
| 1424 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1425 | intel_sdvo_set_clock_rate_mult(intel_encoder, sdvo_priv->save_sdvo_mult); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1426 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1427 | if (sdvo_priv->is_tv) { |
| 1428 | /* XXX: Restore TV format/enhancements. */ |
| 1429 | } |
| 1430 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1431 | intel_sdvo_write_sdvox(intel_encoder, sdvo_priv->save_SDVOX); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1432 | |
| 1433 | if (sdvo_priv->save_SDVOX & SDVO_ENABLE) |
| 1434 | { |
| 1435 | for (i = 0; i < 2; i++) |
| 1436 | intel_wait_for_vblank(dev); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1437 | status = intel_sdvo_get_trained_inputs(intel_encoder, &input1, &input2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1438 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 1439 | DRM_DEBUG_KMS("First %s output reported failure to " |
| 1440 | "sync\n", SDVO_NAME(sdvo_priv)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1441 | } |
| 1442 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1443 | intel_sdvo_set_active_outputs(intel_encoder, sdvo_priv->save_active_outputs); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1444 | } |
| 1445 | |
| 1446 | static int intel_sdvo_mode_valid(struct drm_connector *connector, |
| 1447 | struct drm_display_mode *mode) |
| 1448 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1449 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1450 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1451 | |
| 1452 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
| 1453 | return MODE_NO_DBLESCAN; |
| 1454 | |
| 1455 | if (sdvo_priv->pixel_clock_min > mode->clock) |
| 1456 | return MODE_CLOCK_LOW; |
| 1457 | |
| 1458 | if (sdvo_priv->pixel_clock_max < mode->clock) |
| 1459 | return MODE_CLOCK_HIGH; |
| 1460 | |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1461 | if (sdvo_priv->is_lvds == true) { |
| 1462 | if (sdvo_priv->sdvo_lvds_fixed_mode == NULL) |
| 1463 | return MODE_PANEL; |
| 1464 | |
| 1465 | if (mode->hdisplay > sdvo_priv->sdvo_lvds_fixed_mode->hdisplay) |
| 1466 | return MODE_PANEL; |
| 1467 | |
| 1468 | if (mode->vdisplay > sdvo_priv->sdvo_lvds_fixed_mode->vdisplay) |
| 1469 | return MODE_PANEL; |
| 1470 | } |
| 1471 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1472 | return MODE_OK; |
| 1473 | } |
| 1474 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1475 | static bool intel_sdvo_get_capabilities(struct intel_encoder *intel_encoder, struct intel_sdvo_caps *caps) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1476 | { |
| 1477 | u8 status; |
| 1478 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1479 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_DEVICE_CAPS, NULL, 0); |
| 1480 | status = intel_sdvo_read_response(intel_encoder, caps, sizeof(*caps)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1481 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 1482 | return false; |
| 1483 | |
| 1484 | return true; |
| 1485 | } |
| 1486 | |
| 1487 | struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB) |
| 1488 | { |
| 1489 | struct drm_connector *connector = NULL; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1490 | struct intel_encoder *iout = NULL; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1491 | struct intel_sdvo_priv *sdvo; |
| 1492 | |
| 1493 | /* find the sdvo connector */ |
| 1494 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1495 | iout = to_intel_encoder(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1496 | |
| 1497 | if (iout->type != INTEL_OUTPUT_SDVO) |
| 1498 | continue; |
| 1499 | |
| 1500 | sdvo = iout->dev_priv; |
| 1501 | |
| 1502 | if (sdvo->output_device == SDVOB && sdvoB) |
| 1503 | return connector; |
| 1504 | |
| 1505 | if (sdvo->output_device == SDVOC && !sdvoB) |
| 1506 | return connector; |
| 1507 | |
| 1508 | } |
| 1509 | |
| 1510 | return NULL; |
| 1511 | } |
| 1512 | |
| 1513 | int intel_sdvo_supports_hotplug(struct drm_connector *connector) |
| 1514 | { |
| 1515 | u8 response[2]; |
| 1516 | u8 status; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1517 | struct intel_encoder *intel_encoder; |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 1518 | DRM_DEBUG_KMS("\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1519 | |
| 1520 | if (!connector) |
| 1521 | return 0; |
| 1522 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1523 | intel_encoder = to_intel_encoder(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1524 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1525 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); |
| 1526 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1527 | |
| 1528 | if (response[0] !=0) |
| 1529 | return 1; |
| 1530 | |
| 1531 | return 0; |
| 1532 | } |
| 1533 | |
| 1534 | void intel_sdvo_set_hotplug(struct drm_connector *connector, int on) |
| 1535 | { |
| 1536 | u8 response[2]; |
| 1537 | u8 status; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1538 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1539 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1540 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); |
| 1541 | intel_sdvo_read_response(intel_encoder, &response, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1542 | |
| 1543 | if (on) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1544 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); |
| 1545 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1546 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1547 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1548 | } else { |
| 1549 | response[0] = 0; |
| 1550 | response[1] = 0; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1551 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1552 | } |
| 1553 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1554 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); |
| 1555 | intel_sdvo_read_response(intel_encoder, &response, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1556 | } |
| 1557 | |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1558 | static bool |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1559 | intel_sdvo_multifunc_encoder(struct intel_encoder *intel_encoder) |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1560 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1561 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1562 | int caps = 0; |
| 1563 | |
| 1564 | if (sdvo_priv->caps.output_flags & |
| 1565 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) |
| 1566 | caps++; |
| 1567 | if (sdvo_priv->caps.output_flags & |
| 1568 | (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)) |
| 1569 | caps++; |
| 1570 | if (sdvo_priv->caps.output_flags & |
Roel Kluin | 19e1f88 | 2009-08-09 13:50:53 +0200 | [diff] [blame] | 1571 | (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1)) |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1572 | caps++; |
| 1573 | if (sdvo_priv->caps.output_flags & |
| 1574 | (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1)) |
| 1575 | caps++; |
| 1576 | if (sdvo_priv->caps.output_flags & |
| 1577 | (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1)) |
| 1578 | caps++; |
| 1579 | |
| 1580 | if (sdvo_priv->caps.output_flags & |
| 1581 | (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1)) |
| 1582 | caps++; |
| 1583 | |
| 1584 | if (sdvo_priv->caps.output_flags & |
| 1585 | (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)) |
| 1586 | caps++; |
| 1587 | |
| 1588 | return (caps > 1); |
| 1589 | } |
| 1590 | |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1591 | static struct drm_connector * |
| 1592 | intel_find_analog_connector(struct drm_device *dev) |
| 1593 | { |
| 1594 | struct drm_connector *connector; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1595 | struct intel_encoder *intel_encoder; |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1596 | |
| 1597 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1598 | intel_encoder = to_intel_encoder(connector); |
| 1599 | if (intel_encoder->type == INTEL_OUTPUT_ANALOG) |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1600 | return connector; |
| 1601 | } |
| 1602 | return NULL; |
| 1603 | } |
| 1604 | |
| 1605 | static int |
| 1606 | intel_analog_is_connected(struct drm_device *dev) |
| 1607 | { |
| 1608 | struct drm_connector *analog_connector; |
| 1609 | analog_connector = intel_find_analog_connector(dev); |
| 1610 | |
| 1611 | if (!analog_connector) |
| 1612 | return false; |
| 1613 | |
| 1614 | if (analog_connector->funcs->detect(analog_connector) == |
| 1615 | connector_status_disconnected) |
| 1616 | return false; |
| 1617 | |
| 1618 | return true; |
| 1619 | } |
| 1620 | |
ling.ma@intel.com | 2b8d33f7 | 2009-07-29 11:31:18 +0800 | [diff] [blame] | 1621 | enum drm_connector_status |
| 1622 | intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 1623 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1624 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1625 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
ling.ma@intel.com | 2b8d33f7 | 2009-07-29 11:31:18 +0800 | [diff] [blame] | 1626 | enum drm_connector_status status = connector_status_connected; |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 1627 | struct edid *edid = NULL; |
| 1628 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1629 | edid = drm_get_edid(&intel_encoder->base, |
| 1630 | intel_encoder->ddc_bus); |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1631 | |
Zhao Yakui | 7c3f0a2 | 2010-01-08 10:58:20 +0800 | [diff] [blame] | 1632 | /* This is only applied to SDVO cards with multiple outputs */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1633 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_encoder)) { |
Zhao Yakui | 7c3f0a2 | 2010-01-08 10:58:20 +0800 | [diff] [blame] | 1634 | uint8_t saved_ddc, temp_ddc; |
| 1635 | saved_ddc = sdvo_priv->ddc_bus; |
| 1636 | temp_ddc = sdvo_priv->ddc_bus >> 1; |
| 1637 | /* |
| 1638 | * Don't use the 1 as the argument of DDC bus switch to get |
| 1639 | * the EDID. It is used for SDVO SPD ROM. |
| 1640 | */ |
| 1641 | while(temp_ddc > 1) { |
| 1642 | sdvo_priv->ddc_bus = temp_ddc; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1643 | edid = drm_get_edid(&intel_encoder->base, |
| 1644 | intel_encoder->ddc_bus); |
Zhao Yakui | 7c3f0a2 | 2010-01-08 10:58:20 +0800 | [diff] [blame] | 1645 | if (edid) { |
| 1646 | /* |
| 1647 | * When we can get the EDID, maybe it is the |
| 1648 | * correct DDC bus. Update it. |
| 1649 | */ |
| 1650 | sdvo_priv->ddc_bus = temp_ddc; |
| 1651 | break; |
| 1652 | } |
| 1653 | temp_ddc >>= 1; |
| 1654 | } |
| 1655 | if (edid == NULL) |
| 1656 | sdvo_priv->ddc_bus = saved_ddc; |
| 1657 | } |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1658 | /* when there is no edid and no monitor is connected with VGA |
| 1659 | * port, try to use the CRT ddc to read the EDID for DVI-connector |
| 1660 | */ |
| 1661 | if (edid == NULL && |
| 1662 | sdvo_priv->analog_ddc_bus && |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1663 | !intel_analog_is_connected(intel_encoder->base.dev)) |
| 1664 | edid = drm_get_edid(&intel_encoder->base, |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1665 | sdvo_priv->analog_ddc_bus); |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 1666 | if (edid != NULL) { |
ling.ma@intel.com | 2b8d33f7 | 2009-07-29 11:31:18 +0800 | [diff] [blame] | 1667 | /* Don't report the output as connected if it's a DVI-I |
| 1668 | * connector with a non-digital EDID coming out. |
| 1669 | */ |
| 1670 | if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) { |
| 1671 | if (edid->input & DRM_EDID_INPUT_DIGITAL) |
| 1672 | sdvo_priv->is_hdmi = |
| 1673 | drm_detect_hdmi_monitor(edid); |
| 1674 | else |
| 1675 | status = connector_status_disconnected; |
| 1676 | } |
| 1677 | |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 1678 | kfree(edid); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1679 | intel_encoder->base.display_info.raw_edid = NULL; |
ling.ma@intel.com | 2b8d33f7 | 2009-07-29 11:31:18 +0800 | [diff] [blame] | 1680 | |
| 1681 | } else if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) |
| 1682 | status = connector_status_disconnected; |
| 1683 | |
| 1684 | return status; |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 1685 | } |
| 1686 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1687 | static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector) |
| 1688 | { |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1689 | uint16_t response; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1690 | u8 status; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1691 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1692 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1693 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1694 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1695 | SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0); |
Zhao Yakui | d09c23d | 2009-11-06 15:39:56 +0800 | [diff] [blame] | 1696 | if (sdvo_priv->is_tv) { |
| 1697 | /* add 30ms delay when the output type is SDVO-TV */ |
| 1698 | mdelay(30); |
| 1699 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1700 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1701 | |
Dave Airlie | 51c8b40 | 2009-08-20 13:38:04 +1000 | [diff] [blame] | 1702 | DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1703 | |
| 1704 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 1705 | return connector_status_unknown; |
| 1706 | |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1707 | if (response == 0) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1708 | return connector_status_disconnected; |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1709 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1710 | if (intel_sdvo_multifunc_encoder(intel_encoder) && |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1711 | sdvo_priv->attached_output != response) { |
| 1712 | if (sdvo_priv->controlled_output != response && |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1713 | intel_sdvo_output_setup(intel_encoder, response) != true) |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 1714 | return connector_status_unknown; |
| 1715 | sdvo_priv->attached_output = response; |
| 1716 | } |
ling.ma@intel.com | 2b8d33f7 | 2009-07-29 11:31:18 +0800 | [diff] [blame] | 1717 | return intel_sdvo_hdmi_sink_detect(connector, response); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1718 | } |
| 1719 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1720 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1721 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1722 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1723 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1724 | int num_modes; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1725 | |
| 1726 | /* set the bus switch and get the modes */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1727 | num_modes = intel_ddc_get_modes(intel_encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1728 | |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1729 | /* |
| 1730 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
| 1731 | * link between analog and digital outputs. So, if the regular SDVO |
| 1732 | * DDC fails, check to see if the analog output is disconnected, in |
| 1733 | * which case we'll look there for the digital DDC data. |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1734 | */ |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1735 | if (num_modes == 0 && |
| 1736 | sdvo_priv->analog_ddc_bus && |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1737 | !intel_analog_is_connected(intel_encoder->base.dev)) { |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1738 | struct i2c_adapter *digital_ddc_bus; |
| 1739 | |
| 1740 | /* Switch to the analog ddc bus and try that |
| 1741 | */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1742 | digital_ddc_bus = intel_encoder->ddc_bus; |
| 1743 | intel_encoder->ddc_bus = sdvo_priv->analog_ddc_bus; |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1744 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1745 | (void) intel_ddc_get_modes(intel_encoder); |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1746 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1747 | intel_encoder->ddc_bus = digital_ddc_bus; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1748 | } |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1749 | } |
| 1750 | |
| 1751 | /* |
| 1752 | * Set of SDVO TV modes. |
| 1753 | * Note! This is in reply order (see loop in get_tv_modes). |
| 1754 | * XXX: all 60Hz refresh? |
| 1755 | */ |
| 1756 | struct drm_display_mode sdvo_tv_modes[] = { |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1757 | { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, |
| 1758 | 416, 0, 200, 201, 232, 233, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1759 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1760 | { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, |
| 1761 | 416, 0, 240, 241, 272, 273, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1762 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1763 | { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, |
| 1764 | 496, 0, 300, 301, 332, 333, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1765 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1766 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, |
| 1767 | 736, 0, 350, 351, 382, 383, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1768 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1769 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, |
| 1770 | 736, 0, 400, 401, 432, 433, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1771 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1772 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, |
| 1773 | 736, 0, 480, 481, 512, 513, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1774 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1775 | { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, |
| 1776 | 800, 0, 480, 481, 512, 513, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1777 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1778 | { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, |
| 1779 | 800, 0, 576, 577, 608, 609, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1780 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1781 | { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, |
| 1782 | 816, 0, 350, 351, 382, 383, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1783 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1784 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, |
| 1785 | 816, 0, 400, 401, 432, 433, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1786 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1787 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, |
| 1788 | 816, 0, 480, 481, 512, 513, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1789 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1790 | { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, |
| 1791 | 816, 0, 540, 541, 572, 573, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1792 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1793 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, |
| 1794 | 816, 0, 576, 577, 608, 609, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1795 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1796 | { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, |
| 1797 | 864, 0, 576, 577, 608, 609, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1798 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1799 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, |
| 1800 | 896, 0, 600, 601, 632, 633, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1801 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1802 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, |
| 1803 | 928, 0, 624, 625, 656, 657, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1804 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1805 | { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, |
| 1806 | 1016, 0, 766, 767, 798, 799, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1807 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1808 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, |
| 1809 | 1120, 0, 768, 769, 800, 801, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1810 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1811 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, |
| 1812 | 1376, 0, 1024, 1025, 1056, 1057, 0, |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1813 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 1814 | }; |
| 1815 | |
| 1816 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
| 1817 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1818 | struct intel_encoder *output = to_intel_encoder(connector); |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1819 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
| 1820 | struct intel_sdvo_sdtv_resolution_request tv_res; |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1821 | uint32_t reply = 0, format_map = 0; |
| 1822 | int i; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1823 | uint8_t status; |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1824 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1825 | |
| 1826 | /* Read the list of supported input resolutions for the selected TV |
| 1827 | * format. |
| 1828 | */ |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1829 | for (i = 0; i < TV_FORMAT_NUM; i++) |
| 1830 | if (tv_format_names[i] == sdvo_priv->tv_format_name) |
| 1831 | break; |
| 1832 | |
| 1833 | format_map = (1 << i); |
| 1834 | memcpy(&tv_res, &format_map, |
| 1835 | sizeof(struct intel_sdvo_sdtv_resolution_request) > |
| 1836 | sizeof(format_map) ? sizeof(format_map) : |
| 1837 | sizeof(struct intel_sdvo_sdtv_resolution_request)); |
| 1838 | |
| 1839 | intel_sdvo_set_target_output(output, sdvo_priv->controlled_output); |
| 1840 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1841 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1842 | &tv_res, sizeof(tv_res)); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1843 | status = intel_sdvo_read_response(output, &reply, 3); |
| 1844 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 1845 | return; |
| 1846 | |
| 1847 | for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) |
Zhenyu Wang | 7026d4a | 2009-03-24 14:02:43 +0800 | [diff] [blame] | 1848 | if (reply & (1 << i)) { |
| 1849 | struct drm_display_mode *nmode; |
| 1850 | nmode = drm_mode_duplicate(connector->dev, |
| 1851 | &sdvo_tv_modes[i]); |
| 1852 | if (nmode) |
| 1853 | drm_mode_probed_add(connector, nmode); |
| 1854 | } |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1855 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1856 | } |
| 1857 | |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 1858 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
| 1859 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1860 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 1861 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1862 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1863 | struct drm_display_mode *newmode; |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 1864 | |
| 1865 | /* |
| 1866 | * Attempt to get the mode list from DDC. |
| 1867 | * Assume that the preferred modes are |
| 1868 | * arranged in priority order. |
| 1869 | */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1870 | intel_ddc_get_modes(intel_encoder); |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 1871 | if (list_empty(&connector->probed_modes) == false) |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1872 | goto end; |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 1873 | |
| 1874 | /* Fetch modes from VBT */ |
| 1875 | if (dev_priv->sdvo_lvds_vbt_mode != NULL) { |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 1876 | newmode = drm_mode_duplicate(connector->dev, |
| 1877 | dev_priv->sdvo_lvds_vbt_mode); |
| 1878 | if (newmode != NULL) { |
| 1879 | /* Guarantee the mode is preferred */ |
| 1880 | newmode->type = (DRM_MODE_TYPE_PREFERRED | |
| 1881 | DRM_MODE_TYPE_DRIVER); |
| 1882 | drm_mode_probed_add(connector, newmode); |
| 1883 | } |
| 1884 | } |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1885 | |
| 1886 | end: |
| 1887 | list_for_each_entry(newmode, &connector->probed_modes, head) { |
| 1888 | if (newmode->type & DRM_MODE_TYPE_PREFERRED) { |
| 1889 | sdvo_priv->sdvo_lvds_fixed_mode = |
| 1890 | drm_mode_duplicate(connector->dev, newmode); |
| 1891 | break; |
| 1892 | } |
| 1893 | } |
| 1894 | |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 1895 | } |
| 1896 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1897 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
| 1898 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1899 | struct intel_encoder *output = to_intel_encoder(connector); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1900 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
| 1901 | |
| 1902 | if (sdvo_priv->is_tv) |
| 1903 | intel_sdvo_get_tv_modes(connector); |
Ma Ling | 7086c87 | 2009-05-13 11:20:06 +0800 | [diff] [blame] | 1904 | else if (sdvo_priv->is_lvds == true) |
| 1905 | intel_sdvo_get_lvds_modes(connector); |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 1906 | else |
| 1907 | intel_sdvo_get_ddc_modes(connector); |
| 1908 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1909 | if (list_empty(&connector->probed_modes)) |
| 1910 | return 0; |
| 1911 | return 1; |
| 1912 | } |
| 1913 | |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 1914 | static |
| 1915 | void intel_sdvo_destroy_enhance_property(struct drm_connector *connector) |
| 1916 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1917 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1918 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 1919 | struct drm_device *dev = connector->dev; |
| 1920 | |
| 1921 | if (sdvo_priv->is_tv) { |
| 1922 | if (sdvo_priv->left_property) |
| 1923 | drm_property_destroy(dev, sdvo_priv->left_property); |
| 1924 | if (sdvo_priv->right_property) |
| 1925 | drm_property_destroy(dev, sdvo_priv->right_property); |
| 1926 | if (sdvo_priv->top_property) |
| 1927 | drm_property_destroy(dev, sdvo_priv->top_property); |
| 1928 | if (sdvo_priv->bottom_property) |
| 1929 | drm_property_destroy(dev, sdvo_priv->bottom_property); |
| 1930 | if (sdvo_priv->hpos_property) |
| 1931 | drm_property_destroy(dev, sdvo_priv->hpos_property); |
| 1932 | if (sdvo_priv->vpos_property) |
| 1933 | drm_property_destroy(dev, sdvo_priv->vpos_property); |
| 1934 | } |
| 1935 | if (sdvo_priv->is_tv) { |
| 1936 | if (sdvo_priv->saturation_property) |
| 1937 | drm_property_destroy(dev, |
| 1938 | sdvo_priv->saturation_property); |
| 1939 | if (sdvo_priv->contrast_property) |
| 1940 | drm_property_destroy(dev, |
| 1941 | sdvo_priv->contrast_property); |
| 1942 | if (sdvo_priv->hue_property) |
| 1943 | drm_property_destroy(dev, sdvo_priv->hue_property); |
| 1944 | } |
Zhao Yakui | d0cbde9 | 2009-09-10 15:45:47 +0800 | [diff] [blame] | 1945 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 1946 | if (sdvo_priv->brightness_property) |
| 1947 | drm_property_destroy(dev, |
| 1948 | sdvo_priv->brightness_property); |
| 1949 | } |
| 1950 | return; |
| 1951 | } |
| 1952 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1953 | static void intel_sdvo_destroy(struct drm_connector *connector) |
| 1954 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1955 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1956 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1957 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1958 | if (intel_encoder->i2c_bus) |
| 1959 | intel_i2c_destroy(intel_encoder->i2c_bus); |
| 1960 | if (intel_encoder->ddc_bus) |
| 1961 | intel_i2c_destroy(intel_encoder->ddc_bus); |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 1962 | if (sdvo_priv->analog_ddc_bus) |
| 1963 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 1964 | |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1965 | if (sdvo_priv->sdvo_lvds_fixed_mode != NULL) |
| 1966 | drm_mode_destroy(connector->dev, |
| 1967 | sdvo_priv->sdvo_lvds_fixed_mode); |
| 1968 | |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1969 | if (sdvo_priv->tv_format_property) |
| 1970 | drm_property_destroy(connector->dev, |
| 1971 | sdvo_priv->tv_format_property); |
| 1972 | |
Zhao Yakui | d0cbde9 | 2009-09-10 15:45:47 +0800 | [diff] [blame] | 1973 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 1974 | intel_sdvo_destroy_enhance_property(connector); |
| 1975 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1976 | drm_sysfs_connector_remove(connector); |
| 1977 | drm_connector_cleanup(connector); |
ling.ma@intel.com | 12682a9 | 2009-06-30 11:35:35 +0800 | [diff] [blame] | 1978 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1979 | kfree(intel_encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1980 | } |
| 1981 | |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1982 | static int |
| 1983 | intel_sdvo_set_property(struct drm_connector *connector, |
| 1984 | struct drm_property *property, |
| 1985 | uint64_t val) |
| 1986 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 1987 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 1988 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
| 1989 | struct drm_encoder *encoder = &intel_encoder->enc; |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1990 | struct drm_crtc *crtc = encoder->crtc; |
| 1991 | int ret = 0; |
| 1992 | bool changed = false; |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 1993 | uint8_t cmd, status; |
| 1994 | uint16_t temp_value; |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 1995 | |
| 1996 | ret = drm_connector_property_set_value(connector, property, val); |
| 1997 | if (ret < 0) |
| 1998 | goto out; |
| 1999 | |
| 2000 | if (property == sdvo_priv->tv_format_property) { |
| 2001 | if (val >= TV_FORMAT_NUM) { |
| 2002 | ret = -EINVAL; |
| 2003 | goto out; |
| 2004 | } |
| 2005 | if (sdvo_priv->tv_format_name == |
| 2006 | sdvo_priv->tv_format_supported[val]) |
| 2007 | goto out; |
| 2008 | |
| 2009 | sdvo_priv->tv_format_name = sdvo_priv->tv_format_supported[val]; |
| 2010 | changed = true; |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2011 | } |
| 2012 | |
Zhao Yakui | d0cbde9 | 2009-09-10 15:45:47 +0800 | [diff] [blame] | 2013 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2014 | cmd = 0; |
| 2015 | temp_value = val; |
| 2016 | if (sdvo_priv->left_property == property) { |
| 2017 | drm_connector_property_set_value(connector, |
| 2018 | sdvo_priv->right_property, val); |
| 2019 | if (sdvo_priv->left_margin == temp_value) |
| 2020 | goto out; |
| 2021 | |
| 2022 | sdvo_priv->left_margin = temp_value; |
| 2023 | sdvo_priv->right_margin = temp_value; |
| 2024 | temp_value = sdvo_priv->max_hscan - |
| 2025 | sdvo_priv->left_margin; |
| 2026 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
| 2027 | } else if (sdvo_priv->right_property == property) { |
| 2028 | drm_connector_property_set_value(connector, |
| 2029 | sdvo_priv->left_property, val); |
| 2030 | if (sdvo_priv->right_margin == temp_value) |
| 2031 | goto out; |
| 2032 | |
| 2033 | sdvo_priv->left_margin = temp_value; |
| 2034 | sdvo_priv->right_margin = temp_value; |
| 2035 | temp_value = sdvo_priv->max_hscan - |
| 2036 | sdvo_priv->left_margin; |
| 2037 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
| 2038 | } else if (sdvo_priv->top_property == property) { |
| 2039 | drm_connector_property_set_value(connector, |
| 2040 | sdvo_priv->bottom_property, val); |
| 2041 | if (sdvo_priv->top_margin == temp_value) |
| 2042 | goto out; |
| 2043 | |
| 2044 | sdvo_priv->top_margin = temp_value; |
| 2045 | sdvo_priv->bottom_margin = temp_value; |
| 2046 | temp_value = sdvo_priv->max_vscan - |
| 2047 | sdvo_priv->top_margin; |
| 2048 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
| 2049 | } else if (sdvo_priv->bottom_property == property) { |
| 2050 | drm_connector_property_set_value(connector, |
| 2051 | sdvo_priv->top_property, val); |
| 2052 | if (sdvo_priv->bottom_margin == temp_value) |
| 2053 | goto out; |
| 2054 | sdvo_priv->top_margin = temp_value; |
| 2055 | sdvo_priv->bottom_margin = temp_value; |
| 2056 | temp_value = sdvo_priv->max_vscan - |
| 2057 | sdvo_priv->top_margin; |
| 2058 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
| 2059 | } else if (sdvo_priv->hpos_property == property) { |
| 2060 | if (sdvo_priv->cur_hpos == temp_value) |
| 2061 | goto out; |
| 2062 | |
| 2063 | cmd = SDVO_CMD_SET_POSITION_H; |
| 2064 | sdvo_priv->cur_hpos = temp_value; |
| 2065 | } else if (sdvo_priv->vpos_property == property) { |
| 2066 | if (sdvo_priv->cur_vpos == temp_value) |
| 2067 | goto out; |
| 2068 | |
| 2069 | cmd = SDVO_CMD_SET_POSITION_V; |
| 2070 | sdvo_priv->cur_vpos = temp_value; |
| 2071 | } else if (sdvo_priv->saturation_property == property) { |
| 2072 | if (sdvo_priv->cur_saturation == temp_value) |
| 2073 | goto out; |
| 2074 | |
| 2075 | cmd = SDVO_CMD_SET_SATURATION; |
| 2076 | sdvo_priv->cur_saturation = temp_value; |
| 2077 | } else if (sdvo_priv->contrast_property == property) { |
| 2078 | if (sdvo_priv->cur_contrast == temp_value) |
| 2079 | goto out; |
| 2080 | |
| 2081 | cmd = SDVO_CMD_SET_CONTRAST; |
| 2082 | sdvo_priv->cur_contrast = temp_value; |
| 2083 | } else if (sdvo_priv->hue_property == property) { |
| 2084 | if (sdvo_priv->cur_hue == temp_value) |
| 2085 | goto out; |
| 2086 | |
| 2087 | cmd = SDVO_CMD_SET_HUE; |
| 2088 | sdvo_priv->cur_hue = temp_value; |
| 2089 | } else if (sdvo_priv->brightness_property == property) { |
| 2090 | if (sdvo_priv->cur_brightness == temp_value) |
| 2091 | goto out; |
| 2092 | |
| 2093 | cmd = SDVO_CMD_SET_BRIGHTNESS; |
| 2094 | sdvo_priv->cur_brightness = temp_value; |
| 2095 | } |
| 2096 | if (cmd) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2097 | intel_sdvo_write_cmd(intel_encoder, cmd, &temp_value, 2); |
| 2098 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2099 | NULL, 0); |
| 2100 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2101 | DRM_DEBUG_KMS("Incorrect SDVO command \n"); |
| 2102 | return -EINVAL; |
| 2103 | } |
| 2104 | changed = true; |
| 2105 | } |
| 2106 | } |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2107 | if (changed && crtc) |
| 2108 | drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, |
| 2109 | crtc->y, crtc->fb); |
| 2110 | out: |
| 2111 | return ret; |
| 2112 | } |
| 2113 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2114 | static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { |
| 2115 | .dpms = intel_sdvo_dpms, |
| 2116 | .mode_fixup = intel_sdvo_mode_fixup, |
| 2117 | .prepare = intel_encoder_prepare, |
| 2118 | .mode_set = intel_sdvo_mode_set, |
| 2119 | .commit = intel_encoder_commit, |
| 2120 | }; |
| 2121 | |
| 2122 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 2123 | .dpms = drm_helper_connector_dpms, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2124 | .save = intel_sdvo_save, |
| 2125 | .restore = intel_sdvo_restore, |
| 2126 | .detect = intel_sdvo_detect, |
| 2127 | .fill_modes = drm_helper_probe_single_connector_modes, |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2128 | .set_property = intel_sdvo_set_property, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2129 | .destroy = intel_sdvo_destroy, |
| 2130 | }; |
| 2131 | |
| 2132 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
| 2133 | .get_modes = intel_sdvo_get_modes, |
| 2134 | .mode_valid = intel_sdvo_mode_valid, |
| 2135 | .best_encoder = intel_best_encoder, |
| 2136 | }; |
| 2137 | |
Hannes Eder | b358d0a | 2008-12-18 21:18:47 +0100 | [diff] [blame] | 2138 | static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2139 | { |
| 2140 | drm_encoder_cleanup(encoder); |
| 2141 | } |
| 2142 | |
| 2143 | static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { |
| 2144 | .destroy = intel_sdvo_enc_destroy, |
| 2145 | }; |
| 2146 | |
| 2147 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 2148 | /** |
| 2149 | * Choose the appropriate DDC bus for control bus switch command for this |
| 2150 | * SDVO output based on the controlled output. |
| 2151 | * |
| 2152 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
| 2153 | * outputs, then LVDS outputs. |
| 2154 | */ |
| 2155 | static void |
| 2156 | intel_sdvo_select_ddc_bus(struct intel_sdvo_priv *dev_priv) |
| 2157 | { |
| 2158 | uint16_t mask = 0; |
| 2159 | unsigned int num_bits; |
| 2160 | |
| 2161 | /* Make a mask of outputs less than or equal to our own priority in the |
| 2162 | * list. |
| 2163 | */ |
| 2164 | switch (dev_priv->controlled_output) { |
| 2165 | case SDVO_OUTPUT_LVDS1: |
| 2166 | mask |= SDVO_OUTPUT_LVDS1; |
| 2167 | case SDVO_OUTPUT_LVDS0: |
| 2168 | mask |= SDVO_OUTPUT_LVDS0; |
| 2169 | case SDVO_OUTPUT_TMDS1: |
| 2170 | mask |= SDVO_OUTPUT_TMDS1; |
| 2171 | case SDVO_OUTPUT_TMDS0: |
| 2172 | mask |= SDVO_OUTPUT_TMDS0; |
| 2173 | case SDVO_OUTPUT_RGB1: |
| 2174 | mask |= SDVO_OUTPUT_RGB1; |
| 2175 | case SDVO_OUTPUT_RGB0: |
| 2176 | mask |= SDVO_OUTPUT_RGB0; |
| 2177 | break; |
| 2178 | } |
| 2179 | |
| 2180 | /* Count bits to find what number we are in the priority list. */ |
| 2181 | mask &= dev_priv->caps.output_flags; |
| 2182 | num_bits = hweight16(mask); |
| 2183 | if (num_bits > 3) { |
| 2184 | /* if more than 3 outputs, default to DDC bus 3 for now */ |
| 2185 | num_bits = 3; |
| 2186 | } |
| 2187 | |
| 2188 | /* Corresponds to SDVO_CONTROL_BUS_DDCx */ |
| 2189 | dev_priv->ddc_bus = 1 << num_bits; |
| 2190 | } |
| 2191 | |
| 2192 | static bool |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2193 | intel_sdvo_get_digital_encoding_mode(struct intel_encoder *output) |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 2194 | { |
| 2195 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
| 2196 | uint8_t status; |
| 2197 | |
| 2198 | intel_sdvo_set_target_output(output, sdvo_priv->controlled_output); |
| 2199 | |
| 2200 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_ENCODE, NULL, 0); |
| 2201 | status = intel_sdvo_read_response(output, &sdvo_priv->is_hdmi, 1); |
| 2202 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 2203 | return false; |
| 2204 | return true; |
| 2205 | } |
| 2206 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2207 | static struct intel_encoder * |
| 2208 | intel_sdvo_chan_to_intel_encoder(struct intel_i2c_chan *chan) |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2209 | { |
| 2210 | struct drm_device *dev = chan->drm_dev; |
| 2211 | struct drm_connector *connector; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2212 | struct intel_encoder *intel_encoder = NULL; |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2213 | |
| 2214 | list_for_each_entry(connector, |
| 2215 | &dev->mode_config.connector_list, head) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2216 | if (to_intel_encoder(connector)->ddc_bus == &chan->adapter) { |
| 2217 | intel_encoder = to_intel_encoder(connector); |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2218 | break; |
| 2219 | } |
| 2220 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2221 | return intel_encoder; |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2222 | } |
| 2223 | |
| 2224 | static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap, |
| 2225 | struct i2c_msg msgs[], int num) |
| 2226 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2227 | struct intel_encoder *intel_encoder; |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2228 | struct intel_sdvo_priv *sdvo_priv; |
| 2229 | struct i2c_algo_bit_data *algo_data; |
Keith Packard | f9c10a9 | 2009-05-30 12:16:25 -0700 | [diff] [blame] | 2230 | const struct i2c_algorithm *algo; |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2231 | |
| 2232 | algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2233 | intel_encoder = |
| 2234 | intel_sdvo_chan_to_intel_encoder( |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2235 | (struct intel_i2c_chan *)(algo_data->data)); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2236 | if (intel_encoder == NULL) |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2237 | return -EINVAL; |
| 2238 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2239 | sdvo_priv = intel_encoder->dev_priv; |
| 2240 | algo = intel_encoder->i2c_bus->algo; |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2241 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2242 | intel_sdvo_set_control_bus_switch(intel_encoder, sdvo_priv->ddc_bus); |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2243 | return algo->master_xfer(i2c_adap, msgs, num); |
| 2244 | } |
| 2245 | |
| 2246 | static struct i2c_algorithm intel_sdvo_i2c_bit_algo = { |
| 2247 | .master_xfer = intel_sdvo_master_xfer, |
| 2248 | }; |
| 2249 | |
yakui_zhao | 714605e | 2009-05-31 17:18:07 +0800 | [diff] [blame] | 2250 | static u8 |
| 2251 | intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device) |
| 2252 | { |
| 2253 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 2254 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
| 2255 | |
| 2256 | if (output_device == SDVOB) { |
| 2257 | my_mapping = &dev_priv->sdvo_mappings[0]; |
| 2258 | other_mapping = &dev_priv->sdvo_mappings[1]; |
| 2259 | } else { |
| 2260 | my_mapping = &dev_priv->sdvo_mappings[1]; |
| 2261 | other_mapping = &dev_priv->sdvo_mappings[0]; |
| 2262 | } |
| 2263 | |
| 2264 | /* If the BIOS described our SDVO device, take advantage of it. */ |
| 2265 | if (my_mapping->slave_addr) |
| 2266 | return my_mapping->slave_addr; |
| 2267 | |
| 2268 | /* If the BIOS only described a different SDVO device, use the |
| 2269 | * address that it isn't using. |
| 2270 | */ |
| 2271 | if (other_mapping->slave_addr) { |
| 2272 | if (other_mapping->slave_addr == 0x70) |
| 2273 | return 0x72; |
| 2274 | else |
| 2275 | return 0x70; |
| 2276 | } |
| 2277 | |
| 2278 | /* No SDVO device info is found for another DVO port, |
| 2279 | * so use mapping assumption we had before BIOS parsing. |
| 2280 | */ |
| 2281 | if (output_device == SDVOB) |
| 2282 | return 0x70; |
| 2283 | else |
| 2284 | return 0x72; |
| 2285 | } |
| 2286 | |
Zhao Yakui | 6070a4a | 2010-02-08 21:35:12 +0800 | [diff] [blame] | 2287 | static int intel_sdvo_bad_tv_callback(const struct dmi_system_id *id) |
| 2288 | { |
| 2289 | DRM_DEBUG_KMS("Ignoring bad SDVO TV connector for %s\n", id->ident); |
| 2290 | return 1; |
| 2291 | } |
| 2292 | |
| 2293 | static struct dmi_system_id intel_sdvo_bad_tv[] = { |
| 2294 | { |
| 2295 | .callback = intel_sdvo_bad_tv_callback, |
| 2296 | .ident = "IntelG45/ICH10R/DME1737", |
| 2297 | .matches = { |
| 2298 | DMI_MATCH(DMI_SYS_VENDOR, "IBM CORPORATION"), |
| 2299 | DMI_MATCH(DMI_PRODUCT_NAME, "4800784"), |
| 2300 | }, |
| 2301 | }, |
| 2302 | |
| 2303 | { } /* terminating entry */ |
| 2304 | }; |
| 2305 | |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2306 | static bool |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2307 | intel_sdvo_output_setup(struct intel_encoder *intel_encoder, uint16_t flags) |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2308 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2309 | struct drm_connector *connector = &intel_encoder->base; |
| 2310 | struct drm_encoder *encoder = &intel_encoder->enc; |
| 2311 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2312 | bool ret = true, registered = false; |
| 2313 | |
| 2314 | sdvo_priv->is_tv = false; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2315 | intel_encoder->needs_tv_clock = false; |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2316 | sdvo_priv->is_lvds = false; |
| 2317 | |
| 2318 | if (device_is_registered(&connector->kdev)) { |
| 2319 | drm_sysfs_connector_remove(connector); |
| 2320 | registered = true; |
| 2321 | } |
| 2322 | |
| 2323 | if (flags & |
| 2324 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) { |
| 2325 | if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_TMDS0) |
| 2326 | sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS0; |
| 2327 | else |
| 2328 | sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS1; |
| 2329 | |
| 2330 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
| 2331 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
| 2332 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2333 | if (intel_sdvo_get_supp_encode(intel_encoder, |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2334 | &sdvo_priv->encode) && |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2335 | intel_sdvo_get_digital_encoding_mode(intel_encoder) && |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2336 | sdvo_priv->is_hdmi) { |
| 2337 | /* enable hdmi encoding mode if supported */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2338 | intel_sdvo_set_encode(intel_encoder, SDVO_ENCODE_HDMI); |
| 2339 | intel_sdvo_set_colorimetry(intel_encoder, |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2340 | SDVO_COLORIMETRY_RGB256); |
| 2341 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2342 | intel_encoder->clone_mask = |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 2343 | (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
| 2344 | (1 << INTEL_ANALOG_CLONE_BIT); |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2345 | } |
Zhao Yakui | 6070a4a | 2010-02-08 21:35:12 +0800 | [diff] [blame] | 2346 | } else if ((flags & SDVO_OUTPUT_SVID0) && |
| 2347 | !dmi_check_system(intel_sdvo_bad_tv)) { |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2348 | |
| 2349 | sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0; |
| 2350 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
| 2351 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
| 2352 | sdvo_priv->is_tv = true; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2353 | intel_encoder->needs_tv_clock = true; |
| 2354 | intel_encoder->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2355 | } else if (flags & SDVO_OUTPUT_RGB0) { |
| 2356 | |
| 2357 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0; |
| 2358 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
| 2359 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2360 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 2361 | (1 << INTEL_ANALOG_CLONE_BIT); |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2362 | } else if (flags & SDVO_OUTPUT_RGB1) { |
| 2363 | |
| 2364 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1; |
| 2365 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
| 2366 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2367 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
Zhao Yakui | e270846 | 2009-09-10 15:45:48 +0800 | [diff] [blame] | 2368 | (1 << INTEL_ANALOG_CLONE_BIT); |
Zhao Yakui | 2dd8738 | 2010-01-27 16:32:46 +0800 | [diff] [blame] | 2369 | } else if (flags & SDVO_OUTPUT_CVBS0) { |
| 2370 | |
| 2371 | sdvo_priv->controlled_output = SDVO_OUTPUT_CVBS0; |
| 2372 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
| 2373 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
| 2374 | sdvo_priv->is_tv = true; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2375 | intel_encoder->needs_tv_clock = true; |
| 2376 | intel_encoder->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2377 | } else if (flags & SDVO_OUTPUT_LVDS0) { |
| 2378 | |
| 2379 | sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0; |
| 2380 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
| 2381 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
| 2382 | sdvo_priv->is_lvds = true; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2383 | intel_encoder->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 2384 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2385 | } else if (flags & SDVO_OUTPUT_LVDS1) { |
| 2386 | |
| 2387 | sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1; |
| 2388 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
| 2389 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
| 2390 | sdvo_priv->is_lvds = true; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2391 | intel_encoder->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 2392 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2393 | } else { |
| 2394 | |
| 2395 | unsigned char bytes[2]; |
| 2396 | |
| 2397 | sdvo_priv->controlled_output = 0; |
| 2398 | memcpy(bytes, &sdvo_priv->caps.output_flags, 2); |
Dave Airlie | 51c8b40 | 2009-08-20 13:38:04 +1000 | [diff] [blame] | 2399 | DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", |
| 2400 | SDVO_NAME(sdvo_priv), |
| 2401 | bytes[0], bytes[1]); |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2402 | ret = false; |
| 2403 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2404 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2405 | |
| 2406 | if (ret && registered) |
| 2407 | ret = drm_sysfs_connector_add(connector) == 0 ? true : false; |
| 2408 | |
| 2409 | |
| 2410 | return ret; |
| 2411 | |
| 2412 | } |
| 2413 | |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2414 | static void intel_sdvo_tv_create_property(struct drm_connector *connector) |
| 2415 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2416 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 2417 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2418 | struct intel_sdvo_tv_format format; |
| 2419 | uint32_t format_map, i; |
| 2420 | uint8_t status; |
| 2421 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2422 | intel_sdvo_set_target_output(intel_encoder, |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2423 | sdvo_priv->controlled_output); |
| 2424 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2425 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2426 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2427 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2428 | &format, sizeof(format)); |
| 2429 | if (status != SDVO_CMD_STATUS_SUCCESS) |
| 2430 | return; |
| 2431 | |
| 2432 | memcpy(&format_map, &format, sizeof(format) > sizeof(format_map) ? |
| 2433 | sizeof(format_map) : sizeof(format)); |
| 2434 | |
| 2435 | if (format_map == 0) |
| 2436 | return; |
| 2437 | |
| 2438 | sdvo_priv->format_supported_num = 0; |
| 2439 | for (i = 0 ; i < TV_FORMAT_NUM; i++) |
| 2440 | if (format_map & (1 << i)) { |
| 2441 | sdvo_priv->tv_format_supported |
| 2442 | [sdvo_priv->format_supported_num++] = |
| 2443 | tv_format_names[i]; |
| 2444 | } |
| 2445 | |
| 2446 | |
| 2447 | sdvo_priv->tv_format_property = |
| 2448 | drm_property_create( |
| 2449 | connector->dev, DRM_MODE_PROP_ENUM, |
| 2450 | "mode", sdvo_priv->format_supported_num); |
| 2451 | |
| 2452 | for (i = 0; i < sdvo_priv->format_supported_num; i++) |
| 2453 | drm_property_add_enum( |
| 2454 | sdvo_priv->tv_format_property, i, |
| 2455 | i, sdvo_priv->tv_format_supported[i]); |
| 2456 | |
| 2457 | sdvo_priv->tv_format_name = sdvo_priv->tv_format_supported[0]; |
| 2458 | drm_connector_attach_property( |
| 2459 | connector, sdvo_priv->tv_format_property, 0); |
| 2460 | |
| 2461 | } |
| 2462 | |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2463 | static void intel_sdvo_create_enhance_property(struct drm_connector *connector) |
| 2464 | { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2465 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
| 2466 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2467 | struct intel_sdvo_enhancements_reply sdvo_data; |
| 2468 | struct drm_device *dev = connector->dev; |
| 2469 | uint8_t status; |
| 2470 | uint16_t response, data_value[2]; |
| 2471 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2472 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2473 | NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2474 | status = intel_sdvo_read_response(intel_encoder, &sdvo_data, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2475 | sizeof(sdvo_data)); |
| 2476 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2477 | DRM_DEBUG_KMS(" incorrect response is returned\n"); |
| 2478 | return; |
| 2479 | } |
| 2480 | response = *((uint16_t *)&sdvo_data); |
| 2481 | if (!response) { |
| 2482 | DRM_DEBUG_KMS("No enhancement is supported\n"); |
| 2483 | return; |
| 2484 | } |
| 2485 | if (sdvo_priv->is_tv) { |
| 2486 | /* when horizontal overscan is supported, Add the left/right |
| 2487 | * property |
| 2488 | */ |
| 2489 | if (sdvo_data.overscan_h) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2490 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2491 | SDVO_CMD_GET_MAX_OVERSCAN_H, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2492 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2493 | &data_value, 4); |
| 2494 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2495 | DRM_DEBUG_KMS("Incorrect SDVO max " |
| 2496 | "h_overscan\n"); |
| 2497 | return; |
| 2498 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2499 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2500 | SDVO_CMD_GET_OVERSCAN_H, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2501 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2502 | &response, 2); |
| 2503 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2504 | DRM_DEBUG_KMS("Incorrect SDVO h_overscan\n"); |
| 2505 | return; |
| 2506 | } |
| 2507 | sdvo_priv->max_hscan = data_value[0]; |
| 2508 | sdvo_priv->left_margin = data_value[0] - response; |
| 2509 | sdvo_priv->right_margin = sdvo_priv->left_margin; |
| 2510 | sdvo_priv->left_property = |
| 2511 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2512 | "left_margin", 2); |
| 2513 | sdvo_priv->left_property->values[0] = 0; |
| 2514 | sdvo_priv->left_property->values[1] = data_value[0]; |
| 2515 | drm_connector_attach_property(connector, |
| 2516 | sdvo_priv->left_property, |
| 2517 | sdvo_priv->left_margin); |
| 2518 | sdvo_priv->right_property = |
| 2519 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2520 | "right_margin", 2); |
| 2521 | sdvo_priv->right_property->values[0] = 0; |
| 2522 | sdvo_priv->right_property->values[1] = data_value[0]; |
| 2523 | drm_connector_attach_property(connector, |
| 2524 | sdvo_priv->right_property, |
| 2525 | sdvo_priv->right_margin); |
| 2526 | DRM_DEBUG_KMS("h_overscan: max %d, " |
| 2527 | "default %d, current %d\n", |
| 2528 | data_value[0], data_value[1], response); |
| 2529 | } |
| 2530 | if (sdvo_data.overscan_v) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2531 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2532 | SDVO_CMD_GET_MAX_OVERSCAN_V, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2533 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2534 | &data_value, 4); |
| 2535 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2536 | DRM_DEBUG_KMS("Incorrect SDVO max " |
| 2537 | "v_overscan\n"); |
| 2538 | return; |
| 2539 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2540 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2541 | SDVO_CMD_GET_OVERSCAN_V, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2542 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2543 | &response, 2); |
| 2544 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2545 | DRM_DEBUG_KMS("Incorrect SDVO v_overscan\n"); |
| 2546 | return; |
| 2547 | } |
| 2548 | sdvo_priv->max_vscan = data_value[0]; |
| 2549 | sdvo_priv->top_margin = data_value[0] - response; |
| 2550 | sdvo_priv->bottom_margin = sdvo_priv->top_margin; |
| 2551 | sdvo_priv->top_property = |
| 2552 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2553 | "top_margin", 2); |
| 2554 | sdvo_priv->top_property->values[0] = 0; |
| 2555 | sdvo_priv->top_property->values[1] = data_value[0]; |
| 2556 | drm_connector_attach_property(connector, |
| 2557 | sdvo_priv->top_property, |
| 2558 | sdvo_priv->top_margin); |
| 2559 | sdvo_priv->bottom_property = |
| 2560 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2561 | "bottom_margin", 2); |
| 2562 | sdvo_priv->bottom_property->values[0] = 0; |
| 2563 | sdvo_priv->bottom_property->values[1] = data_value[0]; |
| 2564 | drm_connector_attach_property(connector, |
| 2565 | sdvo_priv->bottom_property, |
| 2566 | sdvo_priv->bottom_margin); |
| 2567 | DRM_DEBUG_KMS("v_overscan: max %d, " |
| 2568 | "default %d, current %d\n", |
| 2569 | data_value[0], data_value[1], response); |
| 2570 | } |
| 2571 | if (sdvo_data.position_h) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2572 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2573 | SDVO_CMD_GET_MAX_POSITION_H, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2574 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2575 | &data_value, 4); |
| 2576 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2577 | DRM_DEBUG_KMS("Incorrect SDVO Max h_pos\n"); |
| 2578 | return; |
| 2579 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2580 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2581 | SDVO_CMD_GET_POSITION_H, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2582 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2583 | &response, 2); |
| 2584 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2585 | DRM_DEBUG_KMS("Incorrect SDVO get h_postion\n"); |
| 2586 | return; |
| 2587 | } |
| 2588 | sdvo_priv->max_hpos = data_value[0]; |
| 2589 | sdvo_priv->cur_hpos = response; |
| 2590 | sdvo_priv->hpos_property = |
| 2591 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2592 | "hpos", 2); |
| 2593 | sdvo_priv->hpos_property->values[0] = 0; |
| 2594 | sdvo_priv->hpos_property->values[1] = data_value[0]; |
| 2595 | drm_connector_attach_property(connector, |
| 2596 | sdvo_priv->hpos_property, |
| 2597 | sdvo_priv->cur_hpos); |
| 2598 | DRM_DEBUG_KMS("h_position: max %d, " |
| 2599 | "default %d, current %d\n", |
| 2600 | data_value[0], data_value[1], response); |
| 2601 | } |
| 2602 | if (sdvo_data.position_v) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2603 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2604 | SDVO_CMD_GET_MAX_POSITION_V, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2605 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2606 | &data_value, 4); |
| 2607 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2608 | DRM_DEBUG_KMS("Incorrect SDVO Max v_pos\n"); |
| 2609 | return; |
| 2610 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2611 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2612 | SDVO_CMD_GET_POSITION_V, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2613 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2614 | &response, 2); |
| 2615 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2616 | DRM_DEBUG_KMS("Incorrect SDVO get v_postion\n"); |
| 2617 | return; |
| 2618 | } |
| 2619 | sdvo_priv->max_vpos = data_value[0]; |
| 2620 | sdvo_priv->cur_vpos = response; |
| 2621 | sdvo_priv->vpos_property = |
| 2622 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2623 | "vpos", 2); |
| 2624 | sdvo_priv->vpos_property->values[0] = 0; |
| 2625 | sdvo_priv->vpos_property->values[1] = data_value[0]; |
| 2626 | drm_connector_attach_property(connector, |
| 2627 | sdvo_priv->vpos_property, |
| 2628 | sdvo_priv->cur_vpos); |
| 2629 | DRM_DEBUG_KMS("v_position: max %d, " |
| 2630 | "default %d, current %d\n", |
| 2631 | data_value[0], data_value[1], response); |
| 2632 | } |
| 2633 | } |
| 2634 | if (sdvo_priv->is_tv) { |
| 2635 | if (sdvo_data.saturation) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2636 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2637 | SDVO_CMD_GET_MAX_SATURATION, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2638 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2639 | &data_value, 4); |
| 2640 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2641 | DRM_DEBUG_KMS("Incorrect SDVO Max sat\n"); |
| 2642 | return; |
| 2643 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2644 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2645 | SDVO_CMD_GET_SATURATION, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2646 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2647 | &response, 2); |
| 2648 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2649 | DRM_DEBUG_KMS("Incorrect SDVO get sat\n"); |
| 2650 | return; |
| 2651 | } |
| 2652 | sdvo_priv->max_saturation = data_value[0]; |
| 2653 | sdvo_priv->cur_saturation = response; |
| 2654 | sdvo_priv->saturation_property = |
| 2655 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2656 | "saturation", 2); |
| 2657 | sdvo_priv->saturation_property->values[0] = 0; |
| 2658 | sdvo_priv->saturation_property->values[1] = |
| 2659 | data_value[0]; |
| 2660 | drm_connector_attach_property(connector, |
| 2661 | sdvo_priv->saturation_property, |
| 2662 | sdvo_priv->cur_saturation); |
| 2663 | DRM_DEBUG_KMS("saturation: max %d, " |
| 2664 | "default %d, current %d\n", |
| 2665 | data_value[0], data_value[1], response); |
| 2666 | } |
| 2667 | if (sdvo_data.contrast) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2668 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2669 | SDVO_CMD_GET_MAX_CONTRAST, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2670 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2671 | &data_value, 4); |
| 2672 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2673 | DRM_DEBUG_KMS("Incorrect SDVO Max contrast\n"); |
| 2674 | return; |
| 2675 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2676 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2677 | SDVO_CMD_GET_CONTRAST, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2678 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2679 | &response, 2); |
| 2680 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2681 | DRM_DEBUG_KMS("Incorrect SDVO get contrast\n"); |
| 2682 | return; |
| 2683 | } |
| 2684 | sdvo_priv->max_contrast = data_value[0]; |
| 2685 | sdvo_priv->cur_contrast = response; |
| 2686 | sdvo_priv->contrast_property = |
| 2687 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2688 | "contrast", 2); |
| 2689 | sdvo_priv->contrast_property->values[0] = 0; |
| 2690 | sdvo_priv->contrast_property->values[1] = data_value[0]; |
| 2691 | drm_connector_attach_property(connector, |
| 2692 | sdvo_priv->contrast_property, |
| 2693 | sdvo_priv->cur_contrast); |
| 2694 | DRM_DEBUG_KMS("contrast: max %d, " |
| 2695 | "default %d, current %d\n", |
| 2696 | data_value[0], data_value[1], response); |
| 2697 | } |
| 2698 | if (sdvo_data.hue) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2699 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2700 | SDVO_CMD_GET_MAX_HUE, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2701 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2702 | &data_value, 4); |
| 2703 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2704 | DRM_DEBUG_KMS("Incorrect SDVO Max hue\n"); |
| 2705 | return; |
| 2706 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2707 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2708 | SDVO_CMD_GET_HUE, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2709 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2710 | &response, 2); |
| 2711 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2712 | DRM_DEBUG_KMS("Incorrect SDVO get hue\n"); |
| 2713 | return; |
| 2714 | } |
| 2715 | sdvo_priv->max_hue = data_value[0]; |
| 2716 | sdvo_priv->cur_hue = response; |
| 2717 | sdvo_priv->hue_property = |
| 2718 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2719 | "hue", 2); |
| 2720 | sdvo_priv->hue_property->values[0] = 0; |
| 2721 | sdvo_priv->hue_property->values[1] = |
| 2722 | data_value[0]; |
| 2723 | drm_connector_attach_property(connector, |
| 2724 | sdvo_priv->hue_property, |
| 2725 | sdvo_priv->cur_hue); |
| 2726 | DRM_DEBUG_KMS("hue: max %d, default %d, current %d\n", |
| 2727 | data_value[0], data_value[1], response); |
| 2728 | } |
| 2729 | } |
Zhao Yakui | d0cbde9 | 2009-09-10 15:45:47 +0800 | [diff] [blame] | 2730 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2731 | if (sdvo_data.brightness) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2732 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2733 | SDVO_CMD_GET_MAX_BRIGHTNESS, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2734 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2735 | &data_value, 4); |
| 2736 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2737 | DRM_DEBUG_KMS("Incorrect SDVO Max bright\n"); |
| 2738 | return; |
| 2739 | } |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2740 | intel_sdvo_write_cmd(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2741 | SDVO_CMD_GET_BRIGHTNESS, NULL, 0); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2742 | status = intel_sdvo_read_response(intel_encoder, |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2743 | &response, 2); |
| 2744 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
| 2745 | DRM_DEBUG_KMS("Incorrect SDVO get brigh\n"); |
| 2746 | return; |
| 2747 | } |
| 2748 | sdvo_priv->max_brightness = data_value[0]; |
| 2749 | sdvo_priv->cur_brightness = response; |
| 2750 | sdvo_priv->brightness_property = |
| 2751 | drm_property_create(dev, DRM_MODE_PROP_RANGE, |
| 2752 | "brightness", 2); |
| 2753 | sdvo_priv->brightness_property->values[0] = 0; |
| 2754 | sdvo_priv->brightness_property->values[1] = |
| 2755 | data_value[0]; |
| 2756 | drm_connector_attach_property(connector, |
| 2757 | sdvo_priv->brightness_property, |
| 2758 | sdvo_priv->cur_brightness); |
| 2759 | DRM_DEBUG_KMS("brightness: max %d, " |
| 2760 | "default %d, current %d\n", |
| 2761 | data_value[0], data_value[1], response); |
| 2762 | } |
| 2763 | } |
| 2764 | return; |
| 2765 | } |
| 2766 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 2767 | bool intel_sdvo_init(struct drm_device *dev, int output_device) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2768 | { |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 2769 | struct drm_i915_private *dev_priv = dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2770 | struct drm_connector *connector; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2771 | struct intel_encoder *intel_encoder; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2772 | struct intel_sdvo_priv *sdvo_priv; |
Keith Packard | f9c10a9 | 2009-05-30 12:16:25 -0700 | [diff] [blame] | 2773 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2774 | u8 ch[0x40]; |
| 2775 | int i; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2776 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2777 | intel_encoder = kcalloc(sizeof(struct intel_encoder)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL); |
| 2778 | if (!intel_encoder) { |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 2779 | return false; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2780 | } |
| 2781 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2782 | sdvo_priv = (struct intel_sdvo_priv *)(intel_encoder + 1); |
Keith Packard | 308cd3a | 2009-06-14 11:56:18 -0700 | [diff] [blame] | 2783 | sdvo_priv->output_device = output_device; |
| 2784 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2785 | intel_encoder->dev_priv = sdvo_priv; |
| 2786 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2787 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2788 | /* setup the DDC bus. */ |
Keith Packard | 308cd3a | 2009-06-14 11:56:18 -0700 | [diff] [blame] | 2789 | if (output_device == SDVOB) |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2790 | intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB"); |
Keith Packard | 308cd3a | 2009-06-14 11:56:18 -0700 | [diff] [blame] | 2791 | else |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2792 | intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC"); |
Keith Packard | 308cd3a | 2009-06-14 11:56:18 -0700 | [diff] [blame] | 2793 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2794 | if (!intel_encoder->i2c_bus) |
Jonas Bonn | ad5b2a6 | 2009-05-15 09:10:41 +0200 | [diff] [blame] | 2795 | goto err_inteloutput; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2796 | |
Keith Packard | 308cd3a | 2009-06-14 11:56:18 -0700 | [diff] [blame] | 2797 | sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, output_device); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2798 | |
Keith Packard | 308cd3a | 2009-06-14 11:56:18 -0700 | [diff] [blame] | 2799 | /* Save the bit-banging i2c functionality for use by the DDC wrapper */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2800 | intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2801 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2802 | /* Read the regs to test if we can talk to the device */ |
| 2803 | for (i = 0; i < 0x40; i++) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2804 | if (!intel_sdvo_read_byte(intel_encoder, i, &ch[i])) { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 2805 | DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 2806 | output_device == SDVOB ? 'B' : 'C'); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2807 | goto err_i2c; |
| 2808 | } |
| 2809 | } |
| 2810 | |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2811 | /* setup the DDC bus. */ |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 2812 | if (output_device == SDVOB) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2813 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 2814 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, |
| 2815 | "SDVOB/VGA DDC BUS"); |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 2816 | dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 2817 | } else { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2818 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 2819 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, |
| 2820 | "SDVOC/VGA DDC BUS"); |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 2821 | dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 2822 | } |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2823 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2824 | if (intel_encoder->ddc_bus == NULL) |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2825 | goto err_i2c; |
| 2826 | |
Keith Packard | 308cd3a | 2009-06-14 11:56:18 -0700 | [diff] [blame] | 2827 | /* Wrap with our custom algo which switches to DDC mode */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2828 | intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; |
Ma Ling | 619ac3b | 2009-05-18 16:12:46 +0800 | [diff] [blame] | 2829 | |
André Goddard Rosa | af901ca | 2009-11-14 13:09:05 -0200 | [diff] [blame] | 2830 | /* In default case sdvo lvds is false */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2831 | intel_sdvo_get_capabilities(intel_encoder, &sdvo_priv->caps); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2832 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2833 | if (intel_sdvo_output_setup(intel_encoder, |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2834 | sdvo_priv->caps.output_flags) != true) { |
Dave Airlie | 51c8b40 | 2009-08-20 13:38:04 +1000 | [diff] [blame] | 2835 | DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2836 | output_device == SDVOB ? 'B' : 'C'); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2837 | goto err_i2c; |
| 2838 | } |
| 2839 | |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2840 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2841 | connector = &intel_encoder->base; |
Jonas Bonn | ad5b2a6 | 2009-05-15 09:10:41 +0200 | [diff] [blame] | 2842 | drm_connector_init(dev, connector, &intel_sdvo_connector_funcs, |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2843 | connector->connector_type); |
| 2844 | |
Jonas Bonn | ad5b2a6 | 2009-05-15 09:10:41 +0200 | [diff] [blame] | 2845 | drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs); |
| 2846 | connector->interlace_allowed = 0; |
| 2847 | connector->doublescan_allowed = 0; |
| 2848 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 2849 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2850 | drm_encoder_init(dev, &intel_encoder->enc, |
| 2851 | &intel_sdvo_enc_funcs, intel_encoder->enc.encoder_type); |
ling.ma@intel.com | fb7a46f | 2009-07-23 17:11:34 +0800 | [diff] [blame] | 2852 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2853 | drm_encoder_helper_add(&intel_encoder->enc, &intel_sdvo_helper_funcs); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2854 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2855 | drm_mode_connector_attach_encoder(&intel_encoder->base, &intel_encoder->enc); |
Zhao Yakui | d0cbde9 | 2009-09-10 15:45:47 +0800 | [diff] [blame] | 2856 | if (sdvo_priv->is_tv) |
Zhao Yakui | ce6feab | 2009-08-24 13:50:26 +0800 | [diff] [blame] | 2857 | intel_sdvo_tv_create_property(connector); |
Zhao Yakui | d0cbde9 | 2009-09-10 15:45:47 +0800 | [diff] [blame] | 2858 | |
| 2859 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) |
Zhao Yakui | b9219c5 | 2009-09-10 15:45:46 +0800 | [diff] [blame] | 2860 | intel_sdvo_create_enhance_property(connector); |
Zhao Yakui | d0cbde9 | 2009-09-10 15:45:47 +0800 | [diff] [blame] | 2861 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2862 | drm_sysfs_connector_add(connector); |
| 2863 | |
Jesse Barnes | e2f0ba9 | 2009-02-02 15:11:52 -0800 | [diff] [blame] | 2864 | intel_sdvo_select_ddc_bus(sdvo_priv); |
| 2865 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2866 | /* Set the input timing to the screen. Assume always input 0. */ |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2867 | intel_sdvo_set_target_input(intel_encoder, true, false); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2868 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2869 | intel_sdvo_get_input_pixel_clock_range(intel_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2870 | &sdvo_priv->pixel_clock_min, |
| 2871 | &sdvo_priv->pixel_clock_max); |
| 2872 | |
| 2873 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 2874 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 2875 | "clock range %dMHz - %dMHz, " |
| 2876 | "input 1: %c, input 2: %c, " |
| 2877 | "output 1: %c, output 2: %c\n", |
| 2878 | SDVO_NAME(sdvo_priv), |
| 2879 | sdvo_priv->caps.vendor_id, sdvo_priv->caps.device_id, |
| 2880 | sdvo_priv->caps.device_rev_id, |
| 2881 | sdvo_priv->pixel_clock_min / 1000, |
| 2882 | sdvo_priv->pixel_clock_max / 1000, |
| 2883 | (sdvo_priv->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', |
| 2884 | (sdvo_priv->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', |
| 2885 | /* check currently supported outputs */ |
| 2886 | sdvo_priv->caps.output_flags & |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2887 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', |
yakui_zhao | 342dc38 | 2009-06-02 14:12:00 +0800 | [diff] [blame] | 2888 | sdvo_priv->caps.output_flags & |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2889 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
| 2890 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 2891 | return true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2892 | |
| 2893 | err_i2c: |
Keith Packard | 57cdaf9 | 2009-09-04 13:07:54 +0800 | [diff] [blame] | 2894 | if (sdvo_priv->analog_ddc_bus != NULL) |
| 2895 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2896 | if (intel_encoder->ddc_bus != NULL) |
| 2897 | intel_i2c_destroy(intel_encoder->ddc_bus); |
| 2898 | if (intel_encoder->i2c_bus != NULL) |
| 2899 | intel_i2c_destroy(intel_encoder->i2c_bus); |
Jonas Bonn | ad5b2a6 | 2009-05-15 09:10:41 +0200 | [diff] [blame] | 2900 | err_inteloutput: |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame^] | 2901 | kfree(intel_encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2902 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 2903 | return false; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 2904 | } |