Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1 | /* |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 2 | * 3-axis accelerometer driver supporting following Bosch-Sensortec chips: |
| 3 | * - BMC150 |
| 4 | * - BMI055 |
| 5 | * - BMA255 |
| 6 | * - BMA250E |
| 7 | * - BMA222E |
| 8 | * - BMA280 |
| 9 | * |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 10 | * Copyright (c) 2014, Intel Corporation. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify it |
| 13 | * under the terms and conditions of the GNU General Public License, |
| 14 | * version 2, as published by the Free Software Foundation. |
| 15 | * |
| 16 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 19 | * more details. |
| 20 | */ |
| 21 | |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/i2c.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/slab.h> |
| 27 | #include <linux/acpi.h> |
| 28 | #include <linux/gpio/consumer.h> |
| 29 | #include <linux/pm.h> |
| 30 | #include <linux/pm_runtime.h> |
| 31 | #include <linux/iio/iio.h> |
| 32 | #include <linux/iio/sysfs.h> |
| 33 | #include <linux/iio/buffer.h> |
| 34 | #include <linux/iio/events.h> |
| 35 | #include <linux/iio/trigger.h> |
| 36 | #include <linux/iio/trigger_consumer.h> |
| 37 | #include <linux/iio/triggered_buffer.h> |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 38 | #include <linux/regmap.h> |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 39 | |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 40 | #include "bmc150-accel.h" |
| 41 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 42 | #define BMC150_ACCEL_DRV_NAME "bmc150_accel" |
| 43 | #define BMC150_ACCEL_IRQ_NAME "bmc150_accel_event" |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 44 | |
| 45 | #define BMC150_ACCEL_REG_CHIP_ID 0x00 |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 46 | |
| 47 | #define BMC150_ACCEL_REG_INT_STATUS_2 0x0B |
| 48 | #define BMC150_ACCEL_ANY_MOTION_MASK 0x07 |
Srinivas Pandruvada | 8d5a978 | 2014-10-10 20:35:32 -0700 | [diff] [blame] | 49 | #define BMC150_ACCEL_ANY_MOTION_BIT_X BIT(0) |
| 50 | #define BMC150_ACCEL_ANY_MOTION_BIT_Y BIT(1) |
| 51 | #define BMC150_ACCEL_ANY_MOTION_BIT_Z BIT(2) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 52 | #define BMC150_ACCEL_ANY_MOTION_BIT_SIGN BIT(3) |
| 53 | |
| 54 | #define BMC150_ACCEL_REG_PMU_LPW 0x11 |
| 55 | #define BMC150_ACCEL_PMU_MODE_MASK 0xE0 |
| 56 | #define BMC150_ACCEL_PMU_MODE_SHIFT 5 |
| 57 | #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK 0x17 |
| 58 | #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT 1 |
| 59 | |
| 60 | #define BMC150_ACCEL_REG_PMU_RANGE 0x0F |
| 61 | |
| 62 | #define BMC150_ACCEL_DEF_RANGE_2G 0x03 |
| 63 | #define BMC150_ACCEL_DEF_RANGE_4G 0x05 |
| 64 | #define BMC150_ACCEL_DEF_RANGE_8G 0x08 |
| 65 | #define BMC150_ACCEL_DEF_RANGE_16G 0x0C |
| 66 | |
| 67 | /* Default BW: 125Hz */ |
| 68 | #define BMC150_ACCEL_REG_PMU_BW 0x10 |
| 69 | #define BMC150_ACCEL_DEF_BW 125 |
| 70 | |
| 71 | #define BMC150_ACCEL_REG_INT_MAP_0 0x19 |
| 72 | #define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE BIT(2) |
| 73 | |
| 74 | #define BMC150_ACCEL_REG_INT_MAP_1 0x1A |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 75 | #define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0) |
| 76 | #define BMC150_ACCEL_INT_MAP_1_BIT_FWM BIT(1) |
| 77 | #define BMC150_ACCEL_INT_MAP_1_BIT_FFULL BIT(2) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 78 | |
| 79 | #define BMC150_ACCEL_REG_INT_RST_LATCH 0x21 |
| 80 | #define BMC150_ACCEL_INT_MODE_LATCH_RESET 0x80 |
| 81 | #define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F |
| 82 | #define BMC150_ACCEL_INT_MODE_NON_LATCH_INT 0x00 |
| 83 | |
| 84 | #define BMC150_ACCEL_REG_INT_EN_0 0x16 |
| 85 | #define BMC150_ACCEL_INT_EN_BIT_SLP_X BIT(0) |
| 86 | #define BMC150_ACCEL_INT_EN_BIT_SLP_Y BIT(1) |
| 87 | #define BMC150_ACCEL_INT_EN_BIT_SLP_Z BIT(2) |
| 88 | |
| 89 | #define BMC150_ACCEL_REG_INT_EN_1 0x17 |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 90 | #define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4) |
| 91 | #define BMC150_ACCEL_INT_EN_BIT_FFULL_EN BIT(5) |
| 92 | #define BMC150_ACCEL_INT_EN_BIT_FWM_EN BIT(6) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 93 | |
| 94 | #define BMC150_ACCEL_REG_INT_OUT_CTRL 0x20 |
| 95 | #define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL BIT(0) |
| 96 | |
| 97 | #define BMC150_ACCEL_REG_INT_5 0x27 |
| 98 | #define BMC150_ACCEL_SLOPE_DUR_MASK 0x03 |
| 99 | |
| 100 | #define BMC150_ACCEL_REG_INT_6 0x28 |
| 101 | #define BMC150_ACCEL_SLOPE_THRES_MASK 0xFF |
| 102 | |
| 103 | /* Slope duration in terms of number of samples */ |
Srinivas Pandruvada | 9e8e228 | 2014-10-10 20:35:33 -0700 | [diff] [blame] | 104 | #define BMC150_ACCEL_DEF_SLOPE_DURATION 1 |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 105 | /* in terms of multiples of g's/LSB, based on range */ |
Srinivas Pandruvada | 9e8e228 | 2014-10-10 20:35:33 -0700 | [diff] [blame] | 106 | #define BMC150_ACCEL_DEF_SLOPE_THRESHOLD 1 |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 107 | |
| 108 | #define BMC150_ACCEL_REG_XOUT_L 0x02 |
| 109 | |
| 110 | #define BMC150_ACCEL_MAX_STARTUP_TIME_MS 100 |
| 111 | |
| 112 | /* Sleep Duration values */ |
| 113 | #define BMC150_ACCEL_SLEEP_500_MICRO 0x05 |
| 114 | #define BMC150_ACCEL_SLEEP_1_MS 0x06 |
| 115 | #define BMC150_ACCEL_SLEEP_2_MS 0x07 |
| 116 | #define BMC150_ACCEL_SLEEP_4_MS 0x08 |
| 117 | #define BMC150_ACCEL_SLEEP_6_MS 0x09 |
| 118 | #define BMC150_ACCEL_SLEEP_10_MS 0x0A |
| 119 | #define BMC150_ACCEL_SLEEP_25_MS 0x0B |
| 120 | #define BMC150_ACCEL_SLEEP_50_MS 0x0C |
| 121 | #define BMC150_ACCEL_SLEEP_100_MS 0x0D |
| 122 | #define BMC150_ACCEL_SLEEP_500_MS 0x0E |
| 123 | #define BMC150_ACCEL_SLEEP_1_SEC 0x0F |
| 124 | |
| 125 | #define BMC150_ACCEL_REG_TEMP 0x08 |
| 126 | #define BMC150_ACCEL_TEMP_CENTER_VAL 24 |
| 127 | |
| 128 | #define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2)) |
| 129 | #define BMC150_AUTO_SUSPEND_DELAY_MS 2000 |
| 130 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 131 | #define BMC150_ACCEL_REG_FIFO_STATUS 0x0E |
| 132 | #define BMC150_ACCEL_REG_FIFO_CONFIG0 0x30 |
| 133 | #define BMC150_ACCEL_REG_FIFO_CONFIG1 0x3E |
| 134 | #define BMC150_ACCEL_REG_FIFO_DATA 0x3F |
| 135 | #define BMC150_ACCEL_FIFO_LENGTH 32 |
| 136 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 137 | enum bmc150_accel_axis { |
| 138 | AXIS_X, |
| 139 | AXIS_Y, |
| 140 | AXIS_Z, |
| 141 | }; |
| 142 | |
| 143 | enum bmc150_power_modes { |
| 144 | BMC150_ACCEL_SLEEP_MODE_NORMAL, |
| 145 | BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, |
| 146 | BMC150_ACCEL_SLEEP_MODE_LPM, |
| 147 | BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04, |
| 148 | }; |
| 149 | |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 150 | struct bmc150_scale_info { |
| 151 | int scale; |
| 152 | u8 reg_range; |
| 153 | }; |
| 154 | |
| 155 | struct bmc150_accel_chip_info { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 156 | const char *name; |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 157 | u8 chip_id; |
| 158 | const struct iio_chan_spec *channels; |
| 159 | int num_channels; |
| 160 | const struct bmc150_scale_info scale_table[4]; |
| 161 | }; |
| 162 | |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 163 | struct bmc150_accel_interrupt { |
| 164 | const struct bmc150_accel_interrupt_info *info; |
| 165 | atomic_t users; |
| 166 | }; |
| 167 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 168 | struct bmc150_accel_trigger { |
| 169 | struct bmc150_accel_data *data; |
| 170 | struct iio_trigger *indio_trig; |
| 171 | int (*setup)(struct bmc150_accel_trigger *t, bool state); |
| 172 | int intr; |
| 173 | bool enabled; |
| 174 | }; |
| 175 | |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 176 | enum bmc150_accel_interrupt_id { |
| 177 | BMC150_ACCEL_INT_DATA_READY, |
| 178 | BMC150_ACCEL_INT_ANY_MOTION, |
| 179 | BMC150_ACCEL_INT_WATERMARK, |
| 180 | BMC150_ACCEL_INTERRUPTS, |
| 181 | }; |
| 182 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 183 | enum bmc150_accel_trigger_id { |
| 184 | BMC150_ACCEL_TRIGGER_DATA_READY, |
| 185 | BMC150_ACCEL_TRIGGER_ANY_MOTION, |
| 186 | BMC150_ACCEL_TRIGGERS, |
| 187 | }; |
| 188 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 189 | struct bmc150_accel_data { |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 190 | struct regmap *regmap; |
| 191 | struct device *dev; |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 192 | int irq; |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 193 | struct bmc150_accel_interrupt interrupts[BMC150_ACCEL_INTERRUPTS]; |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 194 | atomic_t active_intr; |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 195 | struct bmc150_accel_trigger triggers[BMC150_ACCEL_TRIGGERS]; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 196 | struct mutex mutex; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 197 | u8 fifo_mode, watermark; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 198 | s16 buffer[8]; |
| 199 | u8 bw_bits; |
| 200 | u32 slope_dur; |
| 201 | u32 slope_thres; |
| 202 | u32 range; |
| 203 | int ev_enable_state; |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 204 | int64_t timestamp, old_timestamp; /* Only used in hw fifo mode. */ |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 205 | const struct bmc150_accel_chip_info *chip_info; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 206 | }; |
| 207 | |
| 208 | static const struct { |
| 209 | int val; |
| 210 | int val2; |
| 211 | u8 bw_bits; |
Sathyanarayanan Kuppuswamy | 0ba8da9 | 2015-03-03 18:17:56 +0200 | [diff] [blame] | 212 | } bmc150_accel_samp_freq_table[] = { {15, 620000, 0x08}, |
| 213 | {31, 260000, 0x09}, |
| 214 | {62, 500000, 0x0A}, |
| 215 | {125, 0, 0x0B}, |
| 216 | {250, 0, 0x0C}, |
| 217 | {500, 0, 0x0D}, |
| 218 | {1000, 0, 0x0E}, |
| 219 | {2000, 0, 0x0F} }; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 220 | |
| 221 | static const struct { |
| 222 | int bw_bits; |
| 223 | int msec; |
| 224 | } bmc150_accel_sample_upd_time[] = { {0x08, 64}, |
| 225 | {0x09, 32}, |
| 226 | {0x0A, 16}, |
| 227 | {0x0B, 8}, |
| 228 | {0x0C, 4}, |
| 229 | {0x0D, 2}, |
| 230 | {0x0E, 1}, |
| 231 | {0x0F, 1} }; |
| 232 | |
| 233 | static const struct { |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 234 | int sleep_dur; |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 235 | u8 reg_value; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 236 | } bmc150_accel_sleep_value_table[] = { {0, 0}, |
| 237 | {500, BMC150_ACCEL_SLEEP_500_MICRO}, |
| 238 | {1000, BMC150_ACCEL_SLEEP_1_MS}, |
| 239 | {2000, BMC150_ACCEL_SLEEP_2_MS}, |
| 240 | {4000, BMC150_ACCEL_SLEEP_4_MS}, |
| 241 | {6000, BMC150_ACCEL_SLEEP_6_MS}, |
| 242 | {10000, BMC150_ACCEL_SLEEP_10_MS}, |
| 243 | {25000, BMC150_ACCEL_SLEEP_25_MS}, |
| 244 | {50000, BMC150_ACCEL_SLEEP_50_MS}, |
| 245 | {100000, BMC150_ACCEL_SLEEP_100_MS}, |
| 246 | {500000, BMC150_ACCEL_SLEEP_500_MS}, |
| 247 | {1000000, BMC150_ACCEL_SLEEP_1_SEC} }; |
| 248 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 249 | static const struct regmap_config bmc150_i2c_regmap_conf = { |
| 250 | .reg_bits = 8, |
| 251 | .val_bits = 8, |
| 252 | .max_register = 0x3f, |
| 253 | }; |
| 254 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 255 | static int bmc150_accel_set_mode(struct bmc150_accel_data *data, |
| 256 | enum bmc150_power_modes mode, |
| 257 | int dur_us) |
| 258 | { |
| 259 | int i; |
| 260 | int ret; |
| 261 | u8 lpw_bits; |
| 262 | int dur_val = -1; |
| 263 | |
| 264 | if (dur_us > 0) { |
| 265 | for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table); |
| 266 | ++i) { |
| 267 | if (bmc150_accel_sleep_value_table[i].sleep_dur == |
| 268 | dur_us) |
| 269 | dur_val = |
| 270 | bmc150_accel_sleep_value_table[i].reg_value; |
| 271 | } |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 272 | } else { |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 273 | dur_val = 0; |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 274 | } |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 275 | |
| 276 | if (dur_val < 0) |
| 277 | return -EINVAL; |
| 278 | |
| 279 | lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT; |
| 280 | lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT); |
| 281 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 282 | dev_dbg(data->dev, "Set Mode bits %x\n", lpw_bits); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 283 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 284 | ret = regmap_write(data->regmap, BMC150_ACCEL_REG_PMU_LPW, lpw_bits); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 285 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 286 | dev_err(data->dev, "Error writing reg_pmu_lpw\n"); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 287 | return ret; |
| 288 | } |
| 289 | |
| 290 | return 0; |
| 291 | } |
| 292 | |
| 293 | static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val, |
| 294 | int val2) |
| 295 | { |
| 296 | int i; |
| 297 | int ret; |
| 298 | |
| 299 | for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) { |
| 300 | if (bmc150_accel_samp_freq_table[i].val == val && |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 301 | bmc150_accel_samp_freq_table[i].val2 == val2) { |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 302 | ret = regmap_write(data->regmap, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 303 | BMC150_ACCEL_REG_PMU_BW, |
| 304 | bmc150_accel_samp_freq_table[i].bw_bits); |
| 305 | if (ret < 0) |
| 306 | return ret; |
| 307 | |
| 308 | data->bw_bits = |
| 309 | bmc150_accel_samp_freq_table[i].bw_bits; |
| 310 | return 0; |
| 311 | } |
| 312 | } |
| 313 | |
| 314 | return -EINVAL; |
| 315 | } |
| 316 | |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 317 | static int bmc150_accel_update_slope(struct bmc150_accel_data *data) |
| 318 | { |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 319 | int ret; |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 320 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 321 | ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_6, |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 322 | data->slope_thres); |
| 323 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 324 | dev_err(data->dev, "Error writing reg_int_6\n"); |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 325 | return ret; |
| 326 | } |
| 327 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 328 | ret = regmap_update_bits(data->regmap, BMC150_ACCEL_REG_INT_5, |
| 329 | BMC150_ACCEL_SLOPE_DUR_MASK, data->slope_dur); |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 330 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 331 | dev_err(data->dev, "Error updating reg_int_5\n"); |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 332 | return ret; |
| 333 | } |
| 334 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 335 | dev_dbg(data->dev, "%s: %x %x\n", __func__, data->slope_thres, |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 336 | data->slope_dur); |
| 337 | |
| 338 | return ret; |
| 339 | } |
| 340 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 341 | static int bmc150_accel_any_motion_setup(struct bmc150_accel_trigger *t, |
| 342 | bool state) |
| 343 | { |
| 344 | if (state) |
| 345 | return bmc150_accel_update_slope(t->data); |
| 346 | |
| 347 | return 0; |
| 348 | } |
| 349 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 350 | static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val, |
| 351 | int *val2) |
| 352 | { |
| 353 | int i; |
| 354 | |
| 355 | for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) { |
| 356 | if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) { |
| 357 | *val = bmc150_accel_samp_freq_table[i].val; |
| 358 | *val2 = bmc150_accel_samp_freq_table[i].val2; |
| 359 | return IIO_VAL_INT_PLUS_MICRO; |
| 360 | } |
| 361 | } |
| 362 | |
| 363 | return -EINVAL; |
| 364 | } |
| 365 | |
Rafael J. Wysocki | 6f0a13f | 2014-12-04 01:08:13 +0100 | [diff] [blame] | 366 | #ifdef CONFIG_PM |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 367 | static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data) |
| 368 | { |
| 369 | int i; |
| 370 | |
| 371 | for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) { |
| 372 | if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits) |
| 373 | return bmc150_accel_sample_upd_time[i].msec; |
| 374 | } |
| 375 | |
| 376 | return BMC150_ACCEL_MAX_STARTUP_TIME_MS; |
| 377 | } |
| 378 | |
| 379 | static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on) |
| 380 | { |
| 381 | int ret; |
| 382 | |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 383 | if (on) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 384 | ret = pm_runtime_get_sync(data->dev); |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 385 | } else { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 386 | pm_runtime_mark_last_busy(data->dev); |
| 387 | ret = pm_runtime_put_autosuspend(data->dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 388 | } |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 389 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 390 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 391 | dev_err(data->dev, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 392 | "Failed: bmc150_accel_set_power_state for %d\n", on); |
Srinivas Pandruvada | aaeecd8 | 2014-10-10 20:35:31 -0700 | [diff] [blame] | 393 | if (on) |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 394 | pm_runtime_put_noidle(data->dev); |
Srinivas Pandruvada | aaeecd8 | 2014-10-10 20:35:31 -0700 | [diff] [blame] | 395 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 396 | return ret; |
| 397 | } |
| 398 | |
| 399 | return 0; |
| 400 | } |
Laurentiu Palcu | b31b05c | 2014-08-29 09:38:00 +0100 | [diff] [blame] | 401 | #else |
| 402 | static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on) |
| 403 | { |
| 404 | return 0; |
| 405 | } |
| 406 | #endif |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 407 | |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 408 | static const struct bmc150_accel_interrupt_info { |
| 409 | u8 map_reg; |
| 410 | u8 map_bitmask; |
| 411 | u8 en_reg; |
| 412 | u8 en_bitmask; |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 413 | } bmc150_accel_interrupts[BMC150_ACCEL_INTERRUPTS] = { |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 414 | { /* data ready interrupt */ |
| 415 | .map_reg = BMC150_ACCEL_REG_INT_MAP_1, |
| 416 | .map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_DATA, |
| 417 | .en_reg = BMC150_ACCEL_REG_INT_EN_1, |
| 418 | .en_bitmask = BMC150_ACCEL_INT_EN_BIT_DATA_EN, |
| 419 | }, |
| 420 | { /* motion interrupt */ |
| 421 | .map_reg = BMC150_ACCEL_REG_INT_MAP_0, |
| 422 | .map_bitmask = BMC150_ACCEL_INT_MAP_0_BIT_SLOPE, |
| 423 | .en_reg = BMC150_ACCEL_REG_INT_EN_0, |
| 424 | .en_bitmask = BMC150_ACCEL_INT_EN_BIT_SLP_X | |
| 425 | BMC150_ACCEL_INT_EN_BIT_SLP_Y | |
| 426 | BMC150_ACCEL_INT_EN_BIT_SLP_Z |
| 427 | }, |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 428 | { /* fifo watermark interrupt */ |
| 429 | .map_reg = BMC150_ACCEL_REG_INT_MAP_1, |
| 430 | .map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_FWM, |
| 431 | .en_reg = BMC150_ACCEL_REG_INT_EN_1, |
| 432 | .en_bitmask = BMC150_ACCEL_INT_EN_BIT_FWM_EN, |
| 433 | }, |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 434 | }; |
| 435 | |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 436 | static void bmc150_accel_interrupts_setup(struct iio_dev *indio_dev, |
| 437 | struct bmc150_accel_data *data) |
| 438 | { |
| 439 | int i; |
| 440 | |
| 441 | for (i = 0; i < BMC150_ACCEL_INTERRUPTS; i++) |
| 442 | data->interrupts[i].info = &bmc150_accel_interrupts[i]; |
| 443 | } |
| 444 | |
| 445 | static int bmc150_accel_set_interrupt(struct bmc150_accel_data *data, int i, |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 446 | bool state) |
| 447 | { |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 448 | struct bmc150_accel_interrupt *intr = &data->interrupts[i]; |
| 449 | const struct bmc150_accel_interrupt_info *info = intr->info; |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 450 | int ret; |
| 451 | |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 452 | if (state) { |
| 453 | if (atomic_inc_return(&intr->users) > 1) |
| 454 | return 0; |
| 455 | } else { |
| 456 | if (atomic_dec_return(&intr->users) > 0) |
| 457 | return 0; |
| 458 | } |
| 459 | |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 460 | /* |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 461 | * We will expect the enable and disable to do operation in reverse |
| 462 | * order. This will happen here anyway, as our resume operation uses |
| 463 | * sync mode runtime pm calls. The suspend operation will be delayed |
| 464 | * by autosuspend delay. |
| 465 | * So the disable operation will still happen in reverse order of |
| 466 | * enable operation. When runtime pm is disabled the mode is always on, |
| 467 | * so sequence doesn't matter. |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 468 | */ |
| 469 | ret = bmc150_accel_set_power_state(data, state); |
| 470 | if (ret < 0) |
| 471 | return ret; |
| 472 | |
| 473 | /* map the interrupt to the appropriate pins */ |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 474 | ret = regmap_update_bits(data->regmap, info->map_reg, info->map_bitmask, |
| 475 | (state ? info->map_bitmask : 0)); |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 476 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 477 | dev_err(data->dev, "Error updating reg_int_map\n"); |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 478 | goto out_fix_power_state; |
| 479 | } |
| 480 | |
| 481 | /* enable/disable the interrupt */ |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 482 | ret = regmap_update_bits(data->regmap, info->en_reg, info->en_bitmask, |
| 483 | (state ? info->en_bitmask : 0)); |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 484 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 485 | dev_err(data->dev, "Error updating reg_int_en\n"); |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 486 | goto out_fix_power_state; |
| 487 | } |
| 488 | |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 489 | if (state) |
| 490 | atomic_inc(&data->active_intr); |
| 491 | else |
| 492 | atomic_dec(&data->active_intr); |
| 493 | |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 494 | return 0; |
| 495 | |
| 496 | out_fix_power_state: |
| 497 | bmc150_accel_set_power_state(data, false); |
| 498 | return ret; |
| 499 | } |
| 500 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 501 | static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val) |
| 502 | { |
| 503 | int ret, i; |
| 504 | |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 505 | for (i = 0; i < ARRAY_SIZE(data->chip_info->scale_table); ++i) { |
| 506 | if (data->chip_info->scale_table[i].scale == val) { |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 507 | ret = regmap_write(data->regmap, |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 508 | BMC150_ACCEL_REG_PMU_RANGE, |
| 509 | data->chip_info->scale_table[i].reg_range); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 510 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 511 | dev_err(data->dev, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 512 | "Error writing pmu_range\n"); |
| 513 | return ret; |
| 514 | } |
| 515 | |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 516 | data->range = data->chip_info->scale_table[i].reg_range; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 517 | return 0; |
| 518 | } |
| 519 | } |
| 520 | |
| 521 | return -EINVAL; |
| 522 | } |
| 523 | |
| 524 | static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val) |
| 525 | { |
| 526 | int ret; |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 527 | unsigned int value; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 528 | |
| 529 | mutex_lock(&data->mutex); |
| 530 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 531 | ret = regmap_read(data->regmap, BMC150_ACCEL_REG_TEMP, &value); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 532 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 533 | dev_err(data->dev, "Error reading reg_temp\n"); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 534 | mutex_unlock(&data->mutex); |
| 535 | return ret; |
| 536 | } |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 537 | *val = sign_extend32(value, 7); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 538 | |
| 539 | mutex_unlock(&data->mutex); |
| 540 | |
| 541 | return IIO_VAL_INT; |
| 542 | } |
| 543 | |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 544 | static int bmc150_accel_get_axis(struct bmc150_accel_data *data, |
| 545 | struct iio_chan_spec const *chan, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 546 | int *val) |
| 547 | { |
| 548 | int ret; |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 549 | int axis = chan->scan_index; |
Irina Tirdea | 2215f31 | 2016-03-29 15:35:45 +0300 | [diff] [blame^] | 550 | __le16 raw_val; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 551 | |
| 552 | mutex_lock(&data->mutex); |
| 553 | ret = bmc150_accel_set_power_state(data, true); |
| 554 | if (ret < 0) { |
| 555 | mutex_unlock(&data->mutex); |
| 556 | return ret; |
| 557 | } |
| 558 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 559 | ret = regmap_bulk_read(data->regmap, BMC150_ACCEL_AXIS_TO_REG(axis), |
Irina Tirdea | 2215f31 | 2016-03-29 15:35:45 +0300 | [diff] [blame^] | 560 | &raw_val, sizeof(raw_val)); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 561 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 562 | dev_err(data->dev, "Error reading axis %d\n", axis); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 563 | bmc150_accel_set_power_state(data, false); |
| 564 | mutex_unlock(&data->mutex); |
| 565 | return ret; |
| 566 | } |
Irina Tirdea | 2215f31 | 2016-03-29 15:35:45 +0300 | [diff] [blame^] | 567 | *val = sign_extend32(le16_to_cpu(raw_val) >> chan->scan_type.shift, |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 568 | chan->scan_type.realbits - 1); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 569 | ret = bmc150_accel_set_power_state(data, false); |
| 570 | mutex_unlock(&data->mutex); |
| 571 | if (ret < 0) |
| 572 | return ret; |
| 573 | |
| 574 | return IIO_VAL_INT; |
| 575 | } |
| 576 | |
| 577 | static int bmc150_accel_read_raw(struct iio_dev *indio_dev, |
| 578 | struct iio_chan_spec const *chan, |
| 579 | int *val, int *val2, long mask) |
| 580 | { |
| 581 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 582 | int ret; |
| 583 | |
| 584 | switch (mask) { |
| 585 | case IIO_CHAN_INFO_RAW: |
| 586 | switch (chan->type) { |
| 587 | case IIO_TEMP: |
| 588 | return bmc150_accel_get_temp(data, val); |
| 589 | case IIO_ACCEL: |
| 590 | if (iio_buffer_enabled(indio_dev)) |
| 591 | return -EBUSY; |
| 592 | else |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 593 | return bmc150_accel_get_axis(data, chan, val); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 594 | default: |
| 595 | return -EINVAL; |
| 596 | } |
| 597 | case IIO_CHAN_INFO_OFFSET: |
| 598 | if (chan->type == IIO_TEMP) { |
| 599 | *val = BMC150_ACCEL_TEMP_CENTER_VAL; |
| 600 | return IIO_VAL_INT; |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 601 | } else { |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 602 | return -EINVAL; |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 603 | } |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 604 | case IIO_CHAN_INFO_SCALE: |
| 605 | *val = 0; |
| 606 | switch (chan->type) { |
| 607 | case IIO_TEMP: |
| 608 | *val2 = 500000; |
| 609 | return IIO_VAL_INT_PLUS_MICRO; |
| 610 | case IIO_ACCEL: |
| 611 | { |
| 612 | int i; |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 613 | const struct bmc150_scale_info *si; |
| 614 | int st_size = ARRAY_SIZE(data->chip_info->scale_table); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 615 | |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 616 | for (i = 0; i < st_size; ++i) { |
| 617 | si = &data->chip_info->scale_table[i]; |
| 618 | if (si->reg_range == data->range) { |
| 619 | *val2 = si->scale; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 620 | return IIO_VAL_INT_PLUS_MICRO; |
| 621 | } |
| 622 | } |
| 623 | return -EINVAL; |
| 624 | } |
| 625 | default: |
| 626 | return -EINVAL; |
| 627 | } |
| 628 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 629 | mutex_lock(&data->mutex); |
| 630 | ret = bmc150_accel_get_bw(data, val, val2); |
| 631 | mutex_unlock(&data->mutex); |
| 632 | return ret; |
| 633 | default: |
| 634 | return -EINVAL; |
| 635 | } |
| 636 | } |
| 637 | |
| 638 | static int bmc150_accel_write_raw(struct iio_dev *indio_dev, |
| 639 | struct iio_chan_spec const *chan, |
| 640 | int val, int val2, long mask) |
| 641 | { |
| 642 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 643 | int ret; |
| 644 | |
| 645 | switch (mask) { |
| 646 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 647 | mutex_lock(&data->mutex); |
| 648 | ret = bmc150_accel_set_bw(data, val, val2); |
| 649 | mutex_unlock(&data->mutex); |
| 650 | break; |
| 651 | case IIO_CHAN_INFO_SCALE: |
| 652 | if (val) |
| 653 | return -EINVAL; |
| 654 | |
| 655 | mutex_lock(&data->mutex); |
| 656 | ret = bmc150_accel_set_scale(data, val2); |
| 657 | mutex_unlock(&data->mutex); |
| 658 | return ret; |
| 659 | default: |
| 660 | ret = -EINVAL; |
| 661 | } |
| 662 | |
| 663 | return ret; |
| 664 | } |
| 665 | |
| 666 | static int bmc150_accel_read_event(struct iio_dev *indio_dev, |
| 667 | const struct iio_chan_spec *chan, |
| 668 | enum iio_event_type type, |
| 669 | enum iio_event_direction dir, |
| 670 | enum iio_event_info info, |
| 671 | int *val, int *val2) |
| 672 | { |
| 673 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 674 | |
| 675 | *val2 = 0; |
| 676 | switch (info) { |
| 677 | case IIO_EV_INFO_VALUE: |
| 678 | *val = data->slope_thres; |
| 679 | break; |
| 680 | case IIO_EV_INFO_PERIOD: |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 681 | *val = data->slope_dur; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 682 | break; |
| 683 | default: |
| 684 | return -EINVAL; |
| 685 | } |
| 686 | |
| 687 | return IIO_VAL_INT; |
| 688 | } |
| 689 | |
| 690 | static int bmc150_accel_write_event(struct iio_dev *indio_dev, |
| 691 | const struct iio_chan_spec *chan, |
| 692 | enum iio_event_type type, |
| 693 | enum iio_event_direction dir, |
| 694 | enum iio_event_info info, |
| 695 | int val, int val2) |
| 696 | { |
| 697 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 698 | |
| 699 | if (data->ev_enable_state) |
| 700 | return -EBUSY; |
| 701 | |
| 702 | switch (info) { |
| 703 | case IIO_EV_INFO_VALUE: |
Hartmut Knaack | fdd15f6 | 2015-06-15 23:48:25 +0200 | [diff] [blame] | 704 | data->slope_thres = val & BMC150_ACCEL_SLOPE_THRES_MASK; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 705 | break; |
| 706 | case IIO_EV_INFO_PERIOD: |
Octavian Purdila | 802a3ae | 2015-01-31 02:00:03 +0200 | [diff] [blame] | 707 | data->slope_dur = val & BMC150_ACCEL_SLOPE_DUR_MASK; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 708 | break; |
| 709 | default: |
| 710 | return -EINVAL; |
| 711 | } |
| 712 | |
| 713 | return 0; |
| 714 | } |
| 715 | |
| 716 | static int bmc150_accel_read_event_config(struct iio_dev *indio_dev, |
| 717 | const struct iio_chan_spec *chan, |
| 718 | enum iio_event_type type, |
| 719 | enum iio_event_direction dir) |
| 720 | { |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 721 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 722 | |
| 723 | return data->ev_enable_state; |
| 724 | } |
| 725 | |
| 726 | static int bmc150_accel_write_event_config(struct iio_dev *indio_dev, |
| 727 | const struct iio_chan_spec *chan, |
| 728 | enum iio_event_type type, |
| 729 | enum iio_event_direction dir, |
| 730 | int state) |
| 731 | { |
| 732 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 733 | int ret; |
| 734 | |
Octavian Purdila | 14ee64f | 2015-01-31 02:00:05 +0200 | [diff] [blame] | 735 | if (state == data->ev_enable_state) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 736 | return 0; |
| 737 | |
| 738 | mutex_lock(&data->mutex); |
| 739 | |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 740 | ret = bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_ANY_MOTION, |
| 741 | state); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 742 | if (ret < 0) { |
| 743 | mutex_unlock(&data->mutex); |
| 744 | return ret; |
| 745 | } |
| 746 | |
| 747 | data->ev_enable_state = state; |
| 748 | mutex_unlock(&data->mutex); |
| 749 | |
| 750 | return 0; |
| 751 | } |
| 752 | |
| 753 | static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev, |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 754 | struct iio_trigger *trig) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 755 | { |
| 756 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 757 | int i; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 758 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 759 | for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) { |
| 760 | if (data->triggers[i].indio_trig == trig) |
| 761 | return 0; |
| 762 | } |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 763 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 764 | return -EINVAL; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 765 | } |
| 766 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 767 | static ssize_t bmc150_accel_get_fifo_watermark(struct device *dev, |
| 768 | struct device_attribute *attr, |
| 769 | char *buf) |
| 770 | { |
| 771 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
| 772 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 773 | int wm; |
| 774 | |
| 775 | mutex_lock(&data->mutex); |
| 776 | wm = data->watermark; |
| 777 | mutex_unlock(&data->mutex); |
| 778 | |
| 779 | return sprintf(buf, "%d\n", wm); |
| 780 | } |
| 781 | |
| 782 | static ssize_t bmc150_accel_get_fifo_state(struct device *dev, |
| 783 | struct device_attribute *attr, |
| 784 | char *buf) |
| 785 | { |
| 786 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
| 787 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 788 | bool state; |
| 789 | |
| 790 | mutex_lock(&data->mutex); |
| 791 | state = data->fifo_mode; |
| 792 | mutex_unlock(&data->mutex); |
| 793 | |
| 794 | return sprintf(buf, "%d\n", state); |
| 795 | } |
| 796 | |
| 797 | static IIO_CONST_ATTR(hwfifo_watermark_min, "1"); |
| 798 | static IIO_CONST_ATTR(hwfifo_watermark_max, |
| 799 | __stringify(BMC150_ACCEL_FIFO_LENGTH)); |
| 800 | static IIO_DEVICE_ATTR(hwfifo_enabled, S_IRUGO, |
| 801 | bmc150_accel_get_fifo_state, NULL, 0); |
| 802 | static IIO_DEVICE_ATTR(hwfifo_watermark, S_IRUGO, |
| 803 | bmc150_accel_get_fifo_watermark, NULL, 0); |
| 804 | |
| 805 | static const struct attribute *bmc150_accel_fifo_attributes[] = { |
| 806 | &iio_const_attr_hwfifo_watermark_min.dev_attr.attr, |
| 807 | &iio_const_attr_hwfifo_watermark_max.dev_attr.attr, |
| 808 | &iio_dev_attr_hwfifo_watermark.dev_attr.attr, |
| 809 | &iio_dev_attr_hwfifo_enabled.dev_attr.attr, |
| 810 | NULL, |
| 811 | }; |
| 812 | |
| 813 | static int bmc150_accel_set_watermark(struct iio_dev *indio_dev, unsigned val) |
| 814 | { |
| 815 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 816 | |
| 817 | if (val > BMC150_ACCEL_FIFO_LENGTH) |
| 818 | val = BMC150_ACCEL_FIFO_LENGTH; |
| 819 | |
| 820 | mutex_lock(&data->mutex); |
| 821 | data->watermark = val; |
| 822 | mutex_unlock(&data->mutex); |
| 823 | |
| 824 | return 0; |
| 825 | } |
| 826 | |
| 827 | /* |
| 828 | * We must read at least one full frame in one burst, otherwise the rest of the |
| 829 | * frame data is discarded. |
| 830 | */ |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 831 | static int bmc150_accel_fifo_transfer(struct bmc150_accel_data *data, |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 832 | char *buffer, int samples) |
| 833 | { |
| 834 | int sample_length = 3 * 2; |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 835 | int ret; |
| 836 | int total_length = samples * sample_length; |
| 837 | int i; |
| 838 | size_t step = regmap_get_raw_read_max(data->regmap); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 839 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 840 | if (!step || step > total_length) |
| 841 | step = total_length; |
| 842 | else if (step < total_length) |
| 843 | step = sample_length; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 844 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 845 | /* |
| 846 | * Seems we have a bus with size limitation so we have to execute |
| 847 | * multiple reads |
| 848 | */ |
| 849 | for (i = 0; i < total_length; i += step) { |
| 850 | ret = regmap_raw_read(data->regmap, BMC150_ACCEL_REG_FIFO_DATA, |
| 851 | &buffer[i], step); |
| 852 | if (ret) |
| 853 | break; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 854 | } |
| 855 | |
| 856 | if (ret) |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 857 | dev_err(data->dev, "Error transferring data from fifo in single steps of %zu\n", |
| 858 | step); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 859 | |
| 860 | return ret; |
| 861 | } |
| 862 | |
| 863 | static int __bmc150_accel_fifo_flush(struct iio_dev *indio_dev, |
| 864 | unsigned samples, bool irq) |
| 865 | { |
| 866 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 867 | int ret, i; |
| 868 | u8 count; |
| 869 | u16 buffer[BMC150_ACCEL_FIFO_LENGTH * 3]; |
| 870 | int64_t tstamp; |
| 871 | uint64_t sample_period; |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 872 | unsigned int val; |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 873 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 874 | ret = regmap_read(data->regmap, BMC150_ACCEL_REG_FIFO_STATUS, &val); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 875 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 876 | dev_err(data->dev, "Error reading reg_fifo_status\n"); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 877 | return ret; |
| 878 | } |
| 879 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 880 | count = val & 0x7F; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 881 | |
| 882 | if (!count) |
| 883 | return 0; |
| 884 | |
| 885 | /* |
| 886 | * If we getting called from IRQ handler we know the stored timestamp is |
| 887 | * fairly accurate for the last stored sample. Otherwise, if we are |
| 888 | * called as a result of a read operation from userspace and hence |
| 889 | * before the watermark interrupt was triggered, take a timestamp |
| 890 | * now. We can fall anywhere in between two samples so the error in this |
| 891 | * case is at most one sample period. |
| 892 | */ |
| 893 | if (!irq) { |
| 894 | data->old_timestamp = data->timestamp; |
| 895 | data->timestamp = iio_get_time_ns(); |
| 896 | } |
| 897 | |
| 898 | /* |
| 899 | * Approximate timestamps for each of the sample based on the sampling |
| 900 | * frequency, timestamp for last sample and number of samples. |
| 901 | * |
| 902 | * Note that we can't use the current bandwidth settings to compute the |
| 903 | * sample period because the sample rate varies with the device |
| 904 | * (e.g. between 31.70ms to 32.20ms for a bandwidth of 15.63HZ). That |
| 905 | * small variation adds when we store a large number of samples and |
| 906 | * creates significant jitter between the last and first samples in |
| 907 | * different batches (e.g. 32ms vs 21ms). |
| 908 | * |
| 909 | * To avoid this issue we compute the actual sample period ourselves |
| 910 | * based on the timestamp delta between the last two flush operations. |
| 911 | */ |
| 912 | sample_period = (data->timestamp - data->old_timestamp); |
| 913 | do_div(sample_period, count); |
| 914 | tstamp = data->timestamp - (count - 1) * sample_period; |
| 915 | |
| 916 | if (samples && count > samples) |
| 917 | count = samples; |
| 918 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 919 | ret = bmc150_accel_fifo_transfer(data, (u8 *)buffer, count); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 920 | if (ret) |
| 921 | return ret; |
| 922 | |
| 923 | /* |
| 924 | * Ideally we want the IIO core to handle the demux when running in fifo |
| 925 | * mode but not when running in triggered buffer mode. Unfortunately |
| 926 | * this does not seem to be possible, so stick with driver demux for |
| 927 | * now. |
| 928 | */ |
| 929 | for (i = 0; i < count; i++) { |
| 930 | u16 sample[8]; |
| 931 | int j, bit; |
| 932 | |
| 933 | j = 0; |
| 934 | for_each_set_bit(bit, indio_dev->active_scan_mask, |
| 935 | indio_dev->masklength) |
| 936 | memcpy(&sample[j++], &buffer[i * 3 + bit], 2); |
| 937 | |
| 938 | iio_push_to_buffers_with_timestamp(indio_dev, sample, tstamp); |
| 939 | |
| 940 | tstamp += sample_period; |
| 941 | } |
| 942 | |
| 943 | return count; |
| 944 | } |
| 945 | |
| 946 | static int bmc150_accel_fifo_flush(struct iio_dev *indio_dev, unsigned samples) |
| 947 | { |
| 948 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 949 | int ret; |
| 950 | |
| 951 | mutex_lock(&data->mutex); |
| 952 | ret = __bmc150_accel_fifo_flush(indio_dev, samples, false); |
| 953 | mutex_unlock(&data->mutex); |
| 954 | |
| 955 | return ret; |
| 956 | } |
| 957 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 958 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( |
Sathyanarayanan Kuppuswamy | 0ba8da9 | 2015-03-03 18:17:56 +0200 | [diff] [blame] | 959 | "15.620000 31.260000 62.50000 125 250 500 1000 2000"); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 960 | |
| 961 | static struct attribute *bmc150_accel_attributes[] = { |
| 962 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, |
| 963 | NULL, |
| 964 | }; |
| 965 | |
| 966 | static const struct attribute_group bmc150_accel_attrs_group = { |
| 967 | .attrs = bmc150_accel_attributes, |
| 968 | }; |
| 969 | |
| 970 | static const struct iio_event_spec bmc150_accel_event = { |
| 971 | .type = IIO_EV_TYPE_ROC, |
Srinivas Pandruvada | 1174124 | 2014-10-10 20:35:34 -0700 | [diff] [blame] | 972 | .dir = IIO_EV_DIR_EITHER, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 973 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | |
| 974 | BIT(IIO_EV_INFO_ENABLE) | |
| 975 | BIT(IIO_EV_INFO_PERIOD) |
| 976 | }; |
| 977 | |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 978 | #define BMC150_ACCEL_CHANNEL(_axis, bits) { \ |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 979 | .type = IIO_ACCEL, \ |
| 980 | .modified = 1, \ |
| 981 | .channel2 = IIO_MOD_##_axis, \ |
| 982 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
| 983 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ |
| 984 | BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
| 985 | .scan_index = AXIS_##_axis, \ |
| 986 | .scan_type = { \ |
| 987 | .sign = 's', \ |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 988 | .realbits = (bits), \ |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 989 | .storagebits = 16, \ |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 990 | .shift = 16 - (bits), \ |
Irina Tirdea | 2215f31 | 2016-03-29 15:35:45 +0300 | [diff] [blame^] | 991 | .endianness = IIO_LE, \ |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 992 | }, \ |
| 993 | .event_spec = &bmc150_accel_event, \ |
| 994 | .num_event_specs = 1 \ |
| 995 | } |
| 996 | |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 997 | #define BMC150_ACCEL_CHANNELS(bits) { \ |
| 998 | { \ |
| 999 | .type = IIO_TEMP, \ |
| 1000 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
| 1001 | BIT(IIO_CHAN_INFO_SCALE) | \ |
| 1002 | BIT(IIO_CHAN_INFO_OFFSET), \ |
| 1003 | .scan_index = -1, \ |
| 1004 | }, \ |
| 1005 | BMC150_ACCEL_CHANNEL(X, bits), \ |
| 1006 | BMC150_ACCEL_CHANNEL(Y, bits), \ |
| 1007 | BMC150_ACCEL_CHANNEL(Z, bits), \ |
| 1008 | IIO_CHAN_SOFT_TIMESTAMP(3), \ |
| 1009 | } |
| 1010 | |
| 1011 | static const struct iio_chan_spec bma222e_accel_channels[] = |
| 1012 | BMC150_ACCEL_CHANNELS(8); |
| 1013 | static const struct iio_chan_spec bma250e_accel_channels[] = |
| 1014 | BMC150_ACCEL_CHANNELS(10); |
| 1015 | static const struct iio_chan_spec bmc150_accel_channels[] = |
| 1016 | BMC150_ACCEL_CHANNELS(12); |
| 1017 | static const struct iio_chan_spec bma280_accel_channels[] = |
| 1018 | BMC150_ACCEL_CHANNELS(14); |
| 1019 | |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1020 | static const struct bmc150_accel_chip_info bmc150_accel_chip_info_tbl[] = { |
| 1021 | [bmc150] = { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1022 | .name = "BMC150A", |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1023 | .chip_id = 0xFA, |
| 1024 | .channels = bmc150_accel_channels, |
| 1025 | .num_channels = ARRAY_SIZE(bmc150_accel_channels), |
| 1026 | .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G}, |
| 1027 | {19122, BMC150_ACCEL_DEF_RANGE_4G}, |
| 1028 | {38344, BMC150_ACCEL_DEF_RANGE_8G}, |
| 1029 | {76590, BMC150_ACCEL_DEF_RANGE_16G} }, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1030 | }, |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1031 | [bmi055] = { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1032 | .name = "BMI055A", |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1033 | .chip_id = 0xFA, |
| 1034 | .channels = bmc150_accel_channels, |
| 1035 | .num_channels = ARRAY_SIZE(bmc150_accel_channels), |
| 1036 | .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G}, |
| 1037 | {19122, BMC150_ACCEL_DEF_RANGE_4G}, |
| 1038 | {38344, BMC150_ACCEL_DEF_RANGE_8G}, |
| 1039 | {76590, BMC150_ACCEL_DEF_RANGE_16G} }, |
| 1040 | }, |
| 1041 | [bma255] = { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1042 | .name = "BMA0255", |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1043 | .chip_id = 0xFA, |
| 1044 | .channels = bmc150_accel_channels, |
| 1045 | .num_channels = ARRAY_SIZE(bmc150_accel_channels), |
| 1046 | .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G}, |
| 1047 | {19122, BMC150_ACCEL_DEF_RANGE_4G}, |
| 1048 | {38344, BMC150_ACCEL_DEF_RANGE_8G}, |
| 1049 | {76590, BMC150_ACCEL_DEF_RANGE_16G} }, |
| 1050 | }, |
| 1051 | [bma250e] = { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1052 | .name = "BMA250E", |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1053 | .chip_id = 0xF9, |
| 1054 | .channels = bma250e_accel_channels, |
| 1055 | .num_channels = ARRAY_SIZE(bma250e_accel_channels), |
| 1056 | .scale_table = { {38344, BMC150_ACCEL_DEF_RANGE_2G}, |
| 1057 | {76590, BMC150_ACCEL_DEF_RANGE_4G}, |
| 1058 | {153277, BMC150_ACCEL_DEF_RANGE_8G}, |
| 1059 | {306457, BMC150_ACCEL_DEF_RANGE_16G} }, |
| 1060 | }, |
| 1061 | [bma222e] = { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1062 | .name = "BMA222E", |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1063 | .chip_id = 0xF8, |
| 1064 | .channels = bma222e_accel_channels, |
| 1065 | .num_channels = ARRAY_SIZE(bma222e_accel_channels), |
| 1066 | .scale_table = { {153277, BMC150_ACCEL_DEF_RANGE_2G}, |
| 1067 | {306457, BMC150_ACCEL_DEF_RANGE_4G}, |
| 1068 | {612915, BMC150_ACCEL_DEF_RANGE_8G}, |
| 1069 | {1225831, BMC150_ACCEL_DEF_RANGE_16G} }, |
| 1070 | }, |
| 1071 | [bma280] = { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1072 | .name = "BMA0280", |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1073 | .chip_id = 0xFB, |
| 1074 | .channels = bma280_accel_channels, |
| 1075 | .num_channels = ARRAY_SIZE(bma280_accel_channels), |
| 1076 | .scale_table = { {2392, BMC150_ACCEL_DEF_RANGE_2G}, |
| 1077 | {4785, BMC150_ACCEL_DEF_RANGE_4G}, |
| 1078 | {9581, BMC150_ACCEL_DEF_RANGE_8G}, |
| 1079 | {19152, BMC150_ACCEL_DEF_RANGE_16G} }, |
| 1080 | }, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1081 | }; |
| 1082 | |
| 1083 | static const struct iio_info bmc150_accel_info = { |
| 1084 | .attrs = &bmc150_accel_attrs_group, |
| 1085 | .read_raw = bmc150_accel_read_raw, |
| 1086 | .write_raw = bmc150_accel_write_raw, |
| 1087 | .read_event_value = bmc150_accel_read_event, |
| 1088 | .write_event_value = bmc150_accel_write_event, |
| 1089 | .write_event_config = bmc150_accel_write_event_config, |
| 1090 | .read_event_config = bmc150_accel_read_event_config, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1091 | .driver_module = THIS_MODULE, |
| 1092 | }; |
| 1093 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1094 | static const struct iio_info bmc150_accel_info_fifo = { |
| 1095 | .attrs = &bmc150_accel_attrs_group, |
| 1096 | .read_raw = bmc150_accel_read_raw, |
| 1097 | .write_raw = bmc150_accel_write_raw, |
| 1098 | .read_event_value = bmc150_accel_read_event, |
| 1099 | .write_event_value = bmc150_accel_write_event, |
| 1100 | .write_event_config = bmc150_accel_write_event_config, |
| 1101 | .read_event_config = bmc150_accel_read_event_config, |
| 1102 | .validate_trigger = bmc150_accel_validate_trigger, |
| 1103 | .hwfifo_set_watermark = bmc150_accel_set_watermark, |
| 1104 | .hwfifo_flush_to_buffer = bmc150_accel_fifo_flush, |
| 1105 | .driver_module = THIS_MODULE, |
| 1106 | }; |
| 1107 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1108 | static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p) |
| 1109 | { |
| 1110 | struct iio_poll_func *pf = p; |
| 1111 | struct iio_dev *indio_dev = pf->indio_dev; |
| 1112 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1113 | int bit, ret, i = 0; |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1114 | unsigned int raw_val; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1115 | |
| 1116 | mutex_lock(&data->mutex); |
Octavian Purdila | 70dddee | 2015-03-02 21:03:05 +0200 | [diff] [blame] | 1117 | for_each_set_bit(bit, indio_dev->active_scan_mask, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1118 | indio_dev->masklength) { |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1119 | ret = regmap_bulk_read(data->regmap, |
| 1120 | BMC150_ACCEL_AXIS_TO_REG(bit), &raw_val, |
| 1121 | 2); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1122 | if (ret < 0) { |
| 1123 | mutex_unlock(&data->mutex); |
| 1124 | goto err_read; |
| 1125 | } |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1126 | data->buffer[i++] = raw_val; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1127 | } |
| 1128 | mutex_unlock(&data->mutex); |
| 1129 | |
| 1130 | iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1131 | pf->timestamp); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1132 | err_read: |
| 1133 | iio_trigger_notify_done(indio_dev->trig); |
| 1134 | |
| 1135 | return IRQ_HANDLED; |
| 1136 | } |
| 1137 | |
| 1138 | static int bmc150_accel_trig_try_reen(struct iio_trigger *trig) |
| 1139 | { |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1140 | struct bmc150_accel_trigger *t = iio_trigger_get_drvdata(trig); |
| 1141 | struct bmc150_accel_data *data = t->data; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1142 | int ret; |
| 1143 | |
| 1144 | /* new data interrupts don't need ack */ |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1145 | if (t == &t->data->triggers[BMC150_ACCEL_TRIGGER_DATA_READY]) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1146 | return 0; |
| 1147 | |
| 1148 | mutex_lock(&data->mutex); |
| 1149 | /* clear any latched interrupt */ |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1150 | ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH, |
| 1151 | BMC150_ACCEL_INT_MODE_LATCH_INT | |
| 1152 | BMC150_ACCEL_INT_MODE_LATCH_RESET); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1153 | mutex_unlock(&data->mutex); |
| 1154 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1155 | dev_err(data->dev, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1156 | "Error writing reg_int_rst_latch\n"); |
| 1157 | return ret; |
| 1158 | } |
| 1159 | |
| 1160 | return 0; |
| 1161 | } |
| 1162 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1163 | static int bmc150_accel_trigger_set_state(struct iio_trigger *trig, |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 1164 | bool state) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1165 | { |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1166 | struct bmc150_accel_trigger *t = iio_trigger_get_drvdata(trig); |
| 1167 | struct bmc150_accel_data *data = t->data; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1168 | int ret; |
| 1169 | |
| 1170 | mutex_lock(&data->mutex); |
| 1171 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1172 | if (t->enabled == state) { |
| 1173 | mutex_unlock(&data->mutex); |
| 1174 | return 0; |
| 1175 | } |
| 1176 | |
| 1177 | if (t->setup) { |
| 1178 | ret = t->setup(t, state); |
| 1179 | if (ret < 0) { |
Octavian Purdila | 14ee64f | 2015-01-31 02:00:05 +0200 | [diff] [blame] | 1180 | mutex_unlock(&data->mutex); |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1181 | return ret; |
Octavian Purdila | 14ee64f | 2015-01-31 02:00:05 +0200 | [diff] [blame] | 1182 | } |
| 1183 | } |
| 1184 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1185 | ret = bmc150_accel_set_interrupt(data, t->intr, state); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1186 | if (ret < 0) { |
| 1187 | mutex_unlock(&data->mutex); |
| 1188 | return ret; |
| 1189 | } |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1190 | |
| 1191 | t->enabled = state; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1192 | |
| 1193 | mutex_unlock(&data->mutex); |
| 1194 | |
| 1195 | return ret; |
| 1196 | } |
| 1197 | |
| 1198 | static const struct iio_trigger_ops bmc150_accel_trigger_ops = { |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1199 | .set_trigger_state = bmc150_accel_trigger_set_state, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1200 | .try_reenable = bmc150_accel_trig_try_reen, |
| 1201 | .owner = THIS_MODULE, |
| 1202 | }; |
| 1203 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1204 | static int bmc150_accel_handle_roc_event(struct iio_dev *indio_dev) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1205 | { |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1206 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1207 | int dir; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1208 | int ret; |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1209 | unsigned int val; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1210 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1211 | ret = regmap_read(data->regmap, BMC150_ACCEL_REG_INT_STATUS_2, &val); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1212 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1213 | dev_err(data->dev, "Error reading reg_int_status_2\n"); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1214 | return ret; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1215 | } |
| 1216 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1217 | if (val & BMC150_ACCEL_ANY_MOTION_BIT_SIGN) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1218 | dir = IIO_EV_DIR_FALLING; |
| 1219 | else |
| 1220 | dir = IIO_EV_DIR_RISING; |
| 1221 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1222 | if (val & BMC150_ACCEL_ANY_MOTION_BIT_X) |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 1223 | iio_push_event(indio_dev, |
| 1224 | IIO_MOD_EVENT_CODE(IIO_ACCEL, |
| 1225 | 0, |
| 1226 | IIO_MOD_X, |
| 1227 | IIO_EV_TYPE_ROC, |
| 1228 | dir), |
| 1229 | data->timestamp); |
| 1230 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1231 | if (val & BMC150_ACCEL_ANY_MOTION_BIT_Y) |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 1232 | iio_push_event(indio_dev, |
| 1233 | IIO_MOD_EVENT_CODE(IIO_ACCEL, |
| 1234 | 0, |
| 1235 | IIO_MOD_Y, |
| 1236 | IIO_EV_TYPE_ROC, |
| 1237 | dir), |
| 1238 | data->timestamp); |
| 1239 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1240 | if (val & BMC150_ACCEL_ANY_MOTION_BIT_Z) |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 1241 | iio_push_event(indio_dev, |
| 1242 | IIO_MOD_EVENT_CODE(IIO_ACCEL, |
| 1243 | 0, |
| 1244 | IIO_MOD_Z, |
| 1245 | IIO_EV_TYPE_ROC, |
| 1246 | dir), |
| 1247 | data->timestamp); |
| 1248 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1249 | return ret; |
| 1250 | } |
| 1251 | |
| 1252 | static irqreturn_t bmc150_accel_irq_thread_handler(int irq, void *private) |
| 1253 | { |
| 1254 | struct iio_dev *indio_dev = private; |
| 1255 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1256 | bool ack = false; |
| 1257 | int ret; |
| 1258 | |
| 1259 | mutex_lock(&data->mutex); |
| 1260 | |
| 1261 | if (data->fifo_mode) { |
| 1262 | ret = __bmc150_accel_fifo_flush(indio_dev, |
| 1263 | BMC150_ACCEL_FIFO_LENGTH, true); |
| 1264 | if (ret > 0) |
| 1265 | ack = true; |
| 1266 | } |
| 1267 | |
| 1268 | if (data->ev_enable_state) { |
| 1269 | ret = bmc150_accel_handle_roc_event(indio_dev); |
| 1270 | if (ret > 0) |
| 1271 | ack = true; |
| 1272 | } |
| 1273 | |
| 1274 | if (ack) { |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1275 | ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH, |
| 1276 | BMC150_ACCEL_INT_MODE_LATCH_INT | |
| 1277 | BMC150_ACCEL_INT_MODE_LATCH_RESET); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1278 | if (ret) |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1279 | dev_err(data->dev, "Error writing reg_int_rst_latch\n"); |
Hartmut Knaack | e20008e | 2015-06-15 23:48:26 +0200 | [diff] [blame] | 1280 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1281 | ret = IRQ_HANDLED; |
| 1282 | } else { |
| 1283 | ret = IRQ_NONE; |
| 1284 | } |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1285 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1286 | mutex_unlock(&data->mutex); |
| 1287 | |
| 1288 | return ret; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1289 | } |
| 1290 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1291 | static irqreturn_t bmc150_accel_irq_handler(int irq, void *private) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1292 | { |
| 1293 | struct iio_dev *indio_dev = private; |
| 1294 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1295 | bool ack = false; |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1296 | int i; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1297 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1298 | data->old_timestamp = data->timestamp; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1299 | data->timestamp = iio_get_time_ns(); |
| 1300 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1301 | for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) { |
| 1302 | if (data->triggers[i].enabled) { |
| 1303 | iio_trigger_poll(data->triggers[i].indio_trig); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1304 | ack = true; |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1305 | break; |
| 1306 | } |
| 1307 | } |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1308 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1309 | if (data->ev_enable_state || data->fifo_mode) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1310 | return IRQ_WAKE_THREAD; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1311 | |
| 1312 | if (ack) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1313 | return IRQ_HANDLED; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1314 | |
| 1315 | return IRQ_NONE; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1316 | } |
| 1317 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1318 | static const struct { |
| 1319 | int intr; |
| 1320 | const char *name; |
| 1321 | int (*setup)(struct bmc150_accel_trigger *t, bool state); |
| 1322 | } bmc150_accel_triggers[BMC150_ACCEL_TRIGGERS] = { |
| 1323 | { |
| 1324 | .intr = 0, |
| 1325 | .name = "%s-dev%d", |
| 1326 | }, |
| 1327 | { |
| 1328 | .intr = 1, |
| 1329 | .name = "%s-any-motion-dev%d", |
| 1330 | .setup = bmc150_accel_any_motion_setup, |
| 1331 | }, |
| 1332 | }; |
| 1333 | |
| 1334 | static void bmc150_accel_unregister_triggers(struct bmc150_accel_data *data, |
| 1335 | int from) |
| 1336 | { |
| 1337 | int i; |
| 1338 | |
Hartmut Knaack | 7a1d0d9 | 2015-06-15 23:48:24 +0200 | [diff] [blame] | 1339 | for (i = from; i >= 0; i--) { |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1340 | if (data->triggers[i].indio_trig) { |
| 1341 | iio_trigger_unregister(data->triggers[i].indio_trig); |
| 1342 | data->triggers[i].indio_trig = NULL; |
| 1343 | } |
| 1344 | } |
| 1345 | } |
| 1346 | |
| 1347 | static int bmc150_accel_triggers_setup(struct iio_dev *indio_dev, |
| 1348 | struct bmc150_accel_data *data) |
| 1349 | { |
| 1350 | int i, ret; |
| 1351 | |
| 1352 | for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) { |
| 1353 | struct bmc150_accel_trigger *t = &data->triggers[i]; |
| 1354 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1355 | t->indio_trig = devm_iio_trigger_alloc(data->dev, |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1356 | bmc150_accel_triggers[i].name, |
| 1357 | indio_dev->name, |
| 1358 | indio_dev->id); |
| 1359 | if (!t->indio_trig) { |
| 1360 | ret = -ENOMEM; |
| 1361 | break; |
| 1362 | } |
| 1363 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1364 | t->indio_trig->dev.parent = data->dev; |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1365 | t->indio_trig->ops = &bmc150_accel_trigger_ops; |
| 1366 | t->intr = bmc150_accel_triggers[i].intr; |
| 1367 | t->data = data; |
| 1368 | t->setup = bmc150_accel_triggers[i].setup; |
| 1369 | iio_trigger_set_drvdata(t->indio_trig, t); |
| 1370 | |
| 1371 | ret = iio_trigger_register(t->indio_trig); |
| 1372 | if (ret) |
| 1373 | break; |
| 1374 | } |
| 1375 | |
| 1376 | if (ret) |
| 1377 | bmc150_accel_unregister_triggers(data, i - 1); |
| 1378 | |
| 1379 | return ret; |
| 1380 | } |
| 1381 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1382 | #define BMC150_ACCEL_FIFO_MODE_STREAM 0x80 |
| 1383 | #define BMC150_ACCEL_FIFO_MODE_FIFO 0x40 |
| 1384 | #define BMC150_ACCEL_FIFO_MODE_BYPASS 0x00 |
| 1385 | |
| 1386 | static int bmc150_accel_fifo_set_mode(struct bmc150_accel_data *data) |
| 1387 | { |
| 1388 | u8 reg = BMC150_ACCEL_REG_FIFO_CONFIG1; |
| 1389 | int ret; |
| 1390 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1391 | ret = regmap_write(data->regmap, reg, data->fifo_mode); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1392 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1393 | dev_err(data->dev, "Error writing reg_fifo_config1\n"); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1394 | return ret; |
| 1395 | } |
| 1396 | |
| 1397 | if (!data->fifo_mode) |
| 1398 | return 0; |
| 1399 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1400 | ret = regmap_write(data->regmap, BMC150_ACCEL_REG_FIFO_CONFIG0, |
| 1401 | data->watermark); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1402 | if (ret < 0) |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1403 | dev_err(data->dev, "Error writing reg_fifo_config0\n"); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1404 | |
| 1405 | return ret; |
| 1406 | } |
| 1407 | |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1408 | static int bmc150_accel_buffer_preenable(struct iio_dev *indio_dev) |
| 1409 | { |
| 1410 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1411 | |
| 1412 | return bmc150_accel_set_power_state(data, true); |
| 1413 | } |
| 1414 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1415 | static int bmc150_accel_buffer_postenable(struct iio_dev *indio_dev) |
| 1416 | { |
| 1417 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1418 | int ret = 0; |
| 1419 | |
| 1420 | if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) |
| 1421 | return iio_triggered_buffer_postenable(indio_dev); |
| 1422 | |
| 1423 | mutex_lock(&data->mutex); |
| 1424 | |
| 1425 | if (!data->watermark) |
| 1426 | goto out; |
| 1427 | |
| 1428 | ret = bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK, |
| 1429 | true); |
| 1430 | if (ret) |
| 1431 | goto out; |
| 1432 | |
| 1433 | data->fifo_mode = BMC150_ACCEL_FIFO_MODE_FIFO; |
| 1434 | |
| 1435 | ret = bmc150_accel_fifo_set_mode(data); |
| 1436 | if (ret) { |
| 1437 | data->fifo_mode = 0; |
| 1438 | bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK, |
| 1439 | false); |
| 1440 | } |
| 1441 | |
| 1442 | out: |
| 1443 | mutex_unlock(&data->mutex); |
| 1444 | |
| 1445 | return ret; |
| 1446 | } |
| 1447 | |
| 1448 | static int bmc150_accel_buffer_predisable(struct iio_dev *indio_dev) |
| 1449 | { |
| 1450 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1451 | |
| 1452 | if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) |
| 1453 | return iio_triggered_buffer_predisable(indio_dev); |
| 1454 | |
| 1455 | mutex_lock(&data->mutex); |
| 1456 | |
| 1457 | if (!data->fifo_mode) |
| 1458 | goto out; |
| 1459 | |
| 1460 | bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK, false); |
| 1461 | __bmc150_accel_fifo_flush(indio_dev, BMC150_ACCEL_FIFO_LENGTH, false); |
| 1462 | data->fifo_mode = 0; |
| 1463 | bmc150_accel_fifo_set_mode(data); |
| 1464 | |
| 1465 | out: |
| 1466 | mutex_unlock(&data->mutex); |
| 1467 | |
| 1468 | return 0; |
| 1469 | } |
| 1470 | |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1471 | static int bmc150_accel_buffer_postdisable(struct iio_dev *indio_dev) |
| 1472 | { |
| 1473 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1474 | |
| 1475 | return bmc150_accel_set_power_state(data, false); |
| 1476 | } |
| 1477 | |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1478 | static const struct iio_buffer_setup_ops bmc150_accel_buffer_ops = { |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1479 | .preenable = bmc150_accel_buffer_preenable, |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1480 | .postenable = bmc150_accel_buffer_postenable, |
| 1481 | .predisable = bmc150_accel_buffer_predisable, |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1482 | .postdisable = bmc150_accel_buffer_postdisable, |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1483 | }; |
| 1484 | |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1485 | static int bmc150_accel_chip_init(struct bmc150_accel_data *data) |
| 1486 | { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1487 | int ret, i; |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1488 | unsigned int val; |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1489 | |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1490 | ret = regmap_read(data->regmap, BMC150_ACCEL_REG_CHIP_ID, &val); |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1491 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1492 | dev_err(data->dev, |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1493 | "Error: Reading chip id\n"); |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1494 | return ret; |
| 1495 | } |
| 1496 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1497 | dev_dbg(data->dev, "Chip Id %x\n", val); |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1498 | for (i = 0; i < ARRAY_SIZE(bmc150_accel_chip_info_tbl); i++) { |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1499 | if (bmc150_accel_chip_info_tbl[i].chip_id == val) { |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1500 | data->chip_info = &bmc150_accel_chip_info_tbl[i]; |
| 1501 | break; |
| 1502 | } |
| 1503 | } |
| 1504 | |
| 1505 | if (!data->chip_info) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1506 | dev_err(data->dev, "Invalid chip %x\n", val); |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1507 | return -ENODEV; |
| 1508 | } |
| 1509 | |
| 1510 | ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0); |
| 1511 | if (ret < 0) |
| 1512 | return ret; |
| 1513 | |
| 1514 | /* Set Bandwidth */ |
| 1515 | ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0); |
| 1516 | if (ret < 0) |
| 1517 | return ret; |
| 1518 | |
| 1519 | /* Set Default Range */ |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1520 | ret = regmap_write(data->regmap, BMC150_ACCEL_REG_PMU_RANGE, |
| 1521 | BMC150_ACCEL_DEF_RANGE_4G); |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1522 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1523 | dev_err(data->dev, |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1524 | "Error writing reg_pmu_range\n"); |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1525 | return ret; |
| 1526 | } |
| 1527 | |
| 1528 | data->range = BMC150_ACCEL_DEF_RANGE_4G; |
| 1529 | |
| 1530 | /* Set default slope duration and thresholds */ |
| 1531 | data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD; |
| 1532 | data->slope_dur = BMC150_ACCEL_DEF_SLOPE_DURATION; |
| 1533 | ret = bmc150_accel_update_slope(data); |
| 1534 | if (ret < 0) |
| 1535 | return ret; |
| 1536 | |
| 1537 | /* Set default as latched interrupts */ |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1538 | ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH, |
| 1539 | BMC150_ACCEL_INT_MODE_LATCH_INT | |
| 1540 | BMC150_ACCEL_INT_MODE_LATCH_RESET); |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1541 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1542 | dev_err(data->dev, |
Bastien Nocera | c4eaab7 | 2015-07-23 17:20:59 +0200 | [diff] [blame] | 1543 | "Error writing reg_int_rst_latch\n"); |
| 1544 | return ret; |
| 1545 | } |
| 1546 | |
| 1547 | return 0; |
| 1548 | } |
| 1549 | |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1550 | int bmc150_accel_core_probe(struct device *dev, struct regmap *regmap, int irq, |
| 1551 | const char *name, bool block_supported) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1552 | { |
| 1553 | struct bmc150_accel_data *data; |
| 1554 | struct iio_dev *indio_dev; |
| 1555 | int ret; |
| 1556 | |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1557 | indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1558 | if (!indio_dev) |
| 1559 | return -ENOMEM; |
| 1560 | |
| 1561 | data = iio_priv(indio_dev); |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1562 | dev_set_drvdata(dev, indio_dev); |
| 1563 | data->dev = dev; |
| 1564 | data->irq = irq; |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1565 | |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1566 | data->regmap = regmap; |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1567 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1568 | ret = bmc150_accel_chip_init(data); |
| 1569 | if (ret < 0) |
| 1570 | return ret; |
| 1571 | |
| 1572 | mutex_init(&data->mutex); |
| 1573 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1574 | indio_dev->dev.parent = dev; |
Laurentiu Palcu | 8ecbb3c | 2014-02-09 10:30:00 +0000 | [diff] [blame] | 1575 | indio_dev->channels = data->chip_info->channels; |
| 1576 | indio_dev->num_channels = data->chip_info->num_channels; |
Bastien Nocera | 0ad4bf3 | 2015-07-23 17:21:07 +0200 | [diff] [blame] | 1577 | indio_dev->name = name ? name : data->chip_info->name; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1578 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 1579 | indio_dev->info = &bmc150_accel_info; |
| 1580 | |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1581 | ret = iio_triggered_buffer_setup(indio_dev, |
| 1582 | &iio_pollfunc_store_time, |
| 1583 | bmc150_accel_trigger_handler, |
| 1584 | &bmc150_accel_buffer_ops); |
| 1585 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1586 | dev_err(data->dev, "Failed: iio triggered buffer setup\n"); |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1587 | return ret; |
| 1588 | } |
| 1589 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1590 | if (data->irq > 0) { |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1591 | ret = devm_request_threaded_irq( |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1592 | data->dev, data->irq, |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1593 | bmc150_accel_irq_handler, |
| 1594 | bmc150_accel_irq_thread_handler, |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1595 | IRQF_TRIGGER_RISING, |
| 1596 | BMC150_ACCEL_IRQ_NAME, |
| 1597 | indio_dev); |
| 1598 | if (ret) |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1599 | goto err_buffer_cleanup; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1600 | |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 1601 | /* |
| 1602 | * Set latched mode interrupt. While certain interrupts are |
| 1603 | * non-latched regardless of this settings (e.g. new data) we |
| 1604 | * want to use latch mode when we can to prevent interrupt |
| 1605 | * flooding. |
| 1606 | */ |
Markus Pargmann | 4011eda | 2015-09-21 12:55:13 +0200 | [diff] [blame] | 1607 | ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH, |
| 1608 | BMC150_ACCEL_INT_MODE_LATCH_RESET); |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 1609 | if (ret < 0) { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1610 | dev_err(data->dev, "Error writing reg_int_rst_latch\n"); |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1611 | goto err_buffer_cleanup; |
Octavian Purdila | 8e22f47 | 2015-01-31 02:00:04 +0200 | [diff] [blame] | 1612 | } |
| 1613 | |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 1614 | bmc150_accel_interrupts_setup(indio_dev, data); |
| 1615 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1616 | ret = bmc150_accel_triggers_setup(indio_dev, data); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1617 | if (ret) |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1618 | goto err_buffer_cleanup; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1619 | |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1620 | if (block_supported) { |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1621 | indio_dev->modes |= INDIO_BUFFER_SOFTWARE; |
| 1622 | indio_dev->info = &bmc150_accel_info_fifo; |
| 1623 | indio_dev->buffer->attrs = bmc150_accel_fifo_attributes; |
| 1624 | } |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1625 | } |
| 1626 | |
Adriana Reus | 7d0ead5 | 2015-11-05 16:25:29 +0200 | [diff] [blame] | 1627 | ret = pm_runtime_set_active(dev); |
| 1628 | if (ret) |
| 1629 | goto err_trigger_unregister; |
| 1630 | |
| 1631 | pm_runtime_enable(dev); |
| 1632 | pm_runtime_set_autosuspend_delay(dev, BMC150_AUTO_SUSPEND_DELAY_MS); |
| 1633 | pm_runtime_use_autosuspend(dev); |
| 1634 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1635 | ret = iio_device_register(indio_dev); |
| 1636 | if (ret < 0) { |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1637 | dev_err(dev, "Unable to register iio device\n"); |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1638 | goto err_trigger_unregister; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1639 | } |
| 1640 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1641 | return 0; |
| 1642 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1643 | err_trigger_unregister: |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1644 | bmc150_accel_unregister_triggers(data, BMC150_ACCEL_TRIGGERS - 1); |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1645 | err_buffer_cleanup: |
| 1646 | iio_triggered_buffer_cleanup(indio_dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1647 | |
| 1648 | return ret; |
| 1649 | } |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1650 | EXPORT_SYMBOL_GPL(bmc150_accel_core_probe); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1651 | |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1652 | int bmc150_accel_core_remove(struct device *dev) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1653 | { |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1654 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1655 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1656 | |
Adriana Reus | 7d0ead5 | 2015-11-05 16:25:29 +0200 | [diff] [blame] | 1657 | iio_device_unregister(indio_dev); |
| 1658 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1659 | pm_runtime_disable(data->dev); |
| 1660 | pm_runtime_set_suspended(data->dev); |
| 1661 | pm_runtime_put_noidle(data->dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1662 | |
Octavian Purdila | 7d96321 | 2015-03-03 18:17:58 +0200 | [diff] [blame] | 1663 | bmc150_accel_unregister_triggers(data, BMC150_ACCEL_TRIGGERS - 1); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1664 | |
Vlad Dogaru | c16bff4 | 2015-05-12 17:03:24 +0300 | [diff] [blame] | 1665 | iio_triggered_buffer_cleanup(indio_dev); |
| 1666 | |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1667 | mutex_lock(&data->mutex); |
| 1668 | bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0); |
| 1669 | mutex_unlock(&data->mutex); |
| 1670 | |
| 1671 | return 0; |
| 1672 | } |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1673 | EXPORT_SYMBOL_GPL(bmc150_accel_core_remove); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1674 | |
| 1675 | #ifdef CONFIG_PM_SLEEP |
| 1676 | static int bmc150_accel_suspend(struct device *dev) |
| 1677 | { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1678 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1679 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1680 | |
| 1681 | mutex_lock(&data->mutex); |
| 1682 | bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0); |
| 1683 | mutex_unlock(&data->mutex); |
| 1684 | |
| 1685 | return 0; |
| 1686 | } |
| 1687 | |
| 1688 | static int bmc150_accel_resume(struct device *dev) |
| 1689 | { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1690 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1691 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1692 | |
| 1693 | mutex_lock(&data->mutex); |
Octavian Purdila | 3e825ec | 2015-03-03 18:17:57 +0200 | [diff] [blame] | 1694 | if (atomic_read(&data->active_intr)) |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1695 | bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0); |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1696 | bmc150_accel_fifo_set_mode(data); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1697 | mutex_unlock(&data->mutex); |
| 1698 | |
| 1699 | return 0; |
| 1700 | } |
| 1701 | #endif |
| 1702 | |
Rafael J. Wysocki | 6f0a13f | 2014-12-04 01:08:13 +0100 | [diff] [blame] | 1703 | #ifdef CONFIG_PM |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1704 | static int bmc150_accel_runtime_suspend(struct device *dev) |
| 1705 | { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1706 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1707 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
Srinivas Pandruvada | aaeecd8 | 2014-10-10 20:35:31 -0700 | [diff] [blame] | 1708 | int ret; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1709 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1710 | dev_dbg(data->dev, __func__); |
Srinivas Pandruvada | aaeecd8 | 2014-10-10 20:35:31 -0700 | [diff] [blame] | 1711 | ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0); |
| 1712 | if (ret < 0) |
| 1713 | return -EAGAIN; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1714 | |
Srinivas Pandruvada | aaeecd8 | 2014-10-10 20:35:31 -0700 | [diff] [blame] | 1715 | return 0; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1716 | } |
| 1717 | |
| 1718 | static int bmc150_accel_runtime_resume(struct device *dev) |
| 1719 | { |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1720 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1721 | struct bmc150_accel_data *data = iio_priv(indio_dev); |
| 1722 | int ret; |
| 1723 | int sleep_val; |
| 1724 | |
Markus Pargmann | 19c95d6 | 2015-09-21 12:55:14 +0200 | [diff] [blame] | 1725 | dev_dbg(data->dev, __func__); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1726 | |
| 1727 | ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0); |
| 1728 | if (ret < 0) |
| 1729 | return ret; |
Octavian Purdila | 3bbec97 | 2015-03-22 20:33:40 +0200 | [diff] [blame] | 1730 | ret = bmc150_accel_fifo_set_mode(data); |
| 1731 | if (ret < 0) |
| 1732 | return ret; |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1733 | |
| 1734 | sleep_val = bmc150_accel_get_startup_times(data); |
| 1735 | if (sleep_val < 20) |
| 1736 | usleep_range(sleep_val * 1000, 20000); |
| 1737 | else |
| 1738 | msleep_interruptible(sleep_val); |
| 1739 | |
| 1740 | return 0; |
| 1741 | } |
| 1742 | #endif |
| 1743 | |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1744 | const struct dev_pm_ops bmc150_accel_pm_ops = { |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1745 | SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume) |
| 1746 | SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend, |
| 1747 | bmc150_accel_runtime_resume, NULL) |
| 1748 | }; |
Markus Pargmann | 55637c3 | 2015-09-21 12:55:15 +0200 | [diff] [blame] | 1749 | EXPORT_SYMBOL_GPL(bmc150_accel_pm_ops); |
Srinivas Pandruvada | bd7fe5b | 2014-05-08 22:57:00 +0100 | [diff] [blame] | 1750 | |
| 1751 | MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); |
| 1752 | MODULE_LICENSE("GPL v2"); |
| 1753 | MODULE_DESCRIPTION("BMC150 accelerometer driver"); |