Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2002 Andi Kleen, SuSE Labs. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * Thanks to Ben LaHaise for precious feedback. |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 4 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | #include <linux/highmem.h> |
Ingo Molnar | 8192206 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 6 | #include <linux/bootmem.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | #include <linux/module.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 8 | #include <linux/sched.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #include <linux/slab.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 10 | #include <linux/mm.h> |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 11 | #include <linux/interrupt.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 12 | |
Thomas Gleixner | 950f9d9 | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 13 | #include <asm/e820.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <asm/processor.h> |
| 15 | #include <asm/tlbflush.h> |
Dave Jones | f8af095 | 2006-01-06 00:12:10 -0800 | [diff] [blame] | 16 | #include <asm/sections.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 17 | #include <asm/uaccess.h> |
| 18 | #include <asm/pgalloc.h> |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 19 | #include <asm/proto.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 21 | /* |
| 22 | * The current flushing context - we pass it instead of 5 arguments: |
| 23 | */ |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 24 | struct cpa_data { |
| 25 | unsigned long vaddr; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 26 | pgprot_t mask_set; |
| 27 | pgprot_t mask_clr; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 28 | int numpages; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 29 | int flushtlb; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 30 | unsigned long pfn; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 31 | }; |
| 32 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 33 | #ifdef CONFIG_X86_64 |
| 34 | |
| 35 | static inline unsigned long highmap_start_pfn(void) |
| 36 | { |
| 37 | return __pa(_text) >> PAGE_SHIFT; |
| 38 | } |
| 39 | |
| 40 | static inline unsigned long highmap_end_pfn(void) |
| 41 | { |
| 42 | return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT; |
| 43 | } |
| 44 | |
| 45 | #endif |
| 46 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 47 | static inline int |
| 48 | within(unsigned long addr, unsigned long start, unsigned long end) |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 49 | { |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 50 | return addr >= start && addr < end; |
| 51 | } |
| 52 | |
| 53 | /* |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 54 | * Flushing functions |
| 55 | */ |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 56 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 57 | /** |
| 58 | * clflush_cache_range - flush a cache range with clflush |
| 59 | * @addr: virtual start address |
| 60 | * @size: number of bytes to flush |
| 61 | * |
| 62 | * clflush is an unordered instruction which needs fencing with mfence |
| 63 | * to avoid ordering issues. |
| 64 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 65 | void clflush_cache_range(void *vaddr, unsigned int size) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 66 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 67 | void *vend = vaddr + size - 1; |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 68 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 69 | mb(); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 70 | |
| 71 | for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size) |
| 72 | clflush(vaddr); |
| 73 | /* |
| 74 | * Flush any possible final partial cacheline: |
| 75 | */ |
| 76 | clflush(vend); |
| 77 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 78 | mb(); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 79 | } |
| 80 | |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 81 | static void __cpa_flush_all(void *arg) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 82 | { |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 83 | unsigned long cache = (unsigned long)arg; |
| 84 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 85 | /* |
| 86 | * Flush all to work around Errata in early athlons regarding |
| 87 | * large page flushing. |
| 88 | */ |
| 89 | __flush_tlb_all(); |
| 90 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 91 | if (cache && boot_cpu_data.x86_model >= 4) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 92 | wbinvd(); |
| 93 | } |
| 94 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 95 | static void cpa_flush_all(unsigned long cache) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 96 | { |
| 97 | BUG_ON(irqs_disabled()); |
| 98 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 99 | on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 100 | } |
| 101 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 102 | static void __cpa_flush_range(void *arg) |
| 103 | { |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 104 | /* |
| 105 | * We could optimize that further and do individual per page |
| 106 | * tlb invalidates for a low number of pages. Caveat: we must |
| 107 | * flush the high aliases on 64bit as well. |
| 108 | */ |
| 109 | __flush_tlb_all(); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 110 | } |
| 111 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 112 | static void cpa_flush_range(unsigned long start, int numpages, int cache) |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 113 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 114 | unsigned int i, level; |
| 115 | unsigned long addr; |
| 116 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 117 | BUG_ON(irqs_disabled()); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 118 | WARN_ON(PAGE_ALIGN(start) != start); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 119 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 120 | on_each_cpu(__cpa_flush_range, NULL, 1, 1); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 121 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 122 | if (!cache) |
| 123 | return; |
| 124 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 125 | /* |
| 126 | * We only need to flush on one CPU, |
| 127 | * clflush is a MESI-coherent instruction that |
| 128 | * will cause all other CPUs to flush the same |
| 129 | * cachelines: |
| 130 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 131 | for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) { |
| 132 | pte_t *pte = lookup_address(addr, &level); |
| 133 | |
| 134 | /* |
| 135 | * Only flush present addresses: |
| 136 | */ |
Thomas Gleixner | 7bfb72e | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 137 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 138 | clflush_cache_range((void *) addr, PAGE_SIZE); |
| 139 | } |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 140 | } |
| 141 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 142 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 143 | * Certain areas of memory on x86 require very specific protection flags, |
| 144 | * for example the BIOS area or kernel text. Callers don't always get this |
| 145 | * right (again, ioremap() on BIOS memory is not uncommon) so this function |
| 146 | * checks and fixes these known static required protection bits. |
| 147 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 148 | static inline pgprot_t static_protections(pgprot_t prot, unsigned long address, |
| 149 | unsigned long pfn) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 150 | { |
| 151 | pgprot_t forbidden = __pgprot(0); |
| 152 | |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 153 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 154 | * The BIOS area between 640k and 1Mb needs to be executable for |
| 155 | * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support. |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 156 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 157 | if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT)) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 158 | pgprot_val(forbidden) |= _PAGE_NX; |
| 159 | |
| 160 | /* |
| 161 | * The kernel text needs to be executable for obvious reasons |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 162 | * Does not cover __inittext since that is gone later on. On |
| 163 | * 64bit we do not enforce !NX on the low mapping |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 164 | */ |
| 165 | if (within(address, (unsigned long)_text, (unsigned long)_etext)) |
| 166 | pgprot_val(forbidden) |= _PAGE_NX; |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 167 | |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 168 | /* |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 169 | * The .rodata section needs to be read-only. Using the pfn |
| 170 | * catches all aliases. |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 171 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 172 | if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT, |
| 173 | __pa((unsigned long)__end_rodata) >> PAGE_SHIFT)) |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 174 | pgprot_val(forbidden) |= _PAGE_RW; |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 175 | |
| 176 | prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 177 | |
| 178 | return prot; |
| 179 | } |
| 180 | |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 181 | /* |
| 182 | * Lookup the page table entry for a virtual address. Return a pointer |
| 183 | * to the entry and the level of the mapping. |
| 184 | * |
| 185 | * Note: We return pud and pmd either when the entry is marked large |
| 186 | * or when the present bit is not set. Otherwise we would return a |
| 187 | * pointer to a nonexisting mapping. |
| 188 | */ |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 189 | pte_t *lookup_address(unsigned long address, unsigned int *level) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 190 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | pgd_t *pgd = pgd_offset_k(address); |
| 192 | pud_t *pud; |
| 193 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 194 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 195 | *level = PG_LEVEL_NONE; |
| 196 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | if (pgd_none(*pgd)) |
| 198 | return NULL; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 199 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | pud = pud_offset(pgd, address); |
| 201 | if (pud_none(*pud)) |
| 202 | return NULL; |
Andi Kleen | c2f71ee | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 203 | |
| 204 | *level = PG_LEVEL_1G; |
| 205 | if (pud_large(*pud) || !pud_present(*pud)) |
| 206 | return (pte_t *)pud; |
| 207 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | pmd = pmd_offset(pud, address); |
| 209 | if (pmd_none(*pmd)) |
| 210 | return NULL; |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 211 | |
| 212 | *level = PG_LEVEL_2M; |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 213 | if (pmd_large(*pmd) || !pmd_present(*pmd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | return (pte_t *)pmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 215 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 216 | *level = PG_LEVEL_4K; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 217 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 218 | return pte_offset_kernel(pmd, address); |
| 219 | } |
| 220 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 221 | /* |
| 222 | * Set the new pmd in all the pgds we know about: |
| 223 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 224 | static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 225 | { |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 226 | /* change init_mm */ |
| 227 | set_pte_atomic(kpte, pte); |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 228 | #ifdef CONFIG_X86_32 |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 229 | if (!SHARED_KERNEL_PMD) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 230 | struct page *page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 231 | |
Jeremy Fitzhardinge | e3ed910 | 2008-01-30 13:34:11 +0100 | [diff] [blame] | 232 | list_for_each_entry(page, &pgd_list, lru) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 233 | pgd_t *pgd; |
| 234 | pud_t *pud; |
| 235 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 236 | |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 237 | pgd = (pgd_t *)page_address(page) + pgd_index(address); |
| 238 | pud = pud_offset(pgd, address); |
| 239 | pmd = pmd_offset(pud, address); |
| 240 | set_pte_atomic((pte_t *)pmd, pte); |
| 241 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 243 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | } |
| 245 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 246 | static int |
| 247 | try_preserve_large_page(pte_t *kpte, unsigned long address, |
| 248 | struct cpa_data *cpa) |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 249 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 250 | unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 251 | pte_t new_pte, old_pte, *tmp; |
| 252 | pgprot_t old_prot, new_prot; |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 253 | int i, do_split = 1; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 254 | unsigned int level; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 255 | |
| 256 | spin_lock_irqsave(&pgd_lock, flags); |
| 257 | /* |
| 258 | * Check for races, another CPU might have split this page |
| 259 | * up already: |
| 260 | */ |
| 261 | tmp = lookup_address(address, &level); |
| 262 | if (tmp != kpte) |
| 263 | goto out_unlock; |
| 264 | |
| 265 | switch (level) { |
| 266 | case PG_LEVEL_2M: |
Andi Kleen | 31422c5 | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 267 | psize = PMD_PAGE_SIZE; |
| 268 | pmask = PMD_PAGE_MASK; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 269 | break; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 270 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 271 | case PG_LEVEL_1G: |
Andi Kleen | 5d3c8b2 | 2008-02-13 16:20:35 +0100 | [diff] [blame] | 272 | psize = PUD_PAGE_SIZE; |
| 273 | pmask = PUD_PAGE_MASK; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 274 | break; |
| 275 | #endif |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 276 | default: |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 277 | do_split = -EINVAL; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 278 | goto out_unlock; |
| 279 | } |
| 280 | |
| 281 | /* |
| 282 | * Calculate the number of pages, which fit into this large |
| 283 | * page starting at address: |
| 284 | */ |
| 285 | nextpage_addr = (address + psize) & pmask; |
| 286 | numpages = (nextpage_addr - address) >> PAGE_SHIFT; |
| 287 | if (numpages < cpa->numpages) |
| 288 | cpa->numpages = numpages; |
| 289 | |
| 290 | /* |
| 291 | * We are safe now. Check whether the new pgprot is the same: |
| 292 | */ |
| 293 | old_pte = *kpte; |
| 294 | old_prot = new_prot = pte_pgprot(old_pte); |
| 295 | |
| 296 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 297 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 298 | |
| 299 | /* |
| 300 | * old_pte points to the large page base address. So we need |
| 301 | * to add the offset of the virtual address: |
| 302 | */ |
| 303 | pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT); |
| 304 | cpa->pfn = pfn; |
| 305 | |
| 306 | new_prot = static_protections(new_prot, address, pfn); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 307 | |
| 308 | /* |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 309 | * We need to check the full range, whether |
| 310 | * static_protection() requires a different pgprot for one of |
| 311 | * the pages in the range we try to preserve: |
| 312 | */ |
| 313 | addr = address + PAGE_SIZE; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 314 | pfn++; |
| 315 | for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) { |
| 316 | pgprot_t chk_prot = static_protections(new_prot, addr, pfn); |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 317 | |
| 318 | if (pgprot_val(chk_prot) != pgprot_val(new_prot)) |
| 319 | goto out_unlock; |
| 320 | } |
| 321 | |
| 322 | /* |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 323 | * If there are no changes, return. maxpages has been updated |
| 324 | * above: |
| 325 | */ |
| 326 | if (pgprot_val(new_prot) == pgprot_val(old_prot)) { |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 327 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 328 | goto out_unlock; |
| 329 | } |
| 330 | |
| 331 | /* |
| 332 | * We need to change the attributes. Check, whether we can |
| 333 | * change the large page in one go. We request a split, when |
| 334 | * the address is not aligned and the number of pages is |
| 335 | * smaller than the number of pages in the large page. Note |
| 336 | * that we limited the number of possible pages already to |
| 337 | * the number of pages in the large page. |
| 338 | */ |
| 339 | if (address == (nextpage_addr - psize) && cpa->numpages == numpages) { |
| 340 | /* |
| 341 | * The address is aligned and the number of pages |
| 342 | * covers the full page. |
| 343 | */ |
| 344 | new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot)); |
| 345 | __set_pmd_pte(kpte, address, new_pte); |
| 346 | cpa->flushtlb = 1; |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 347 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 348 | } |
| 349 | |
| 350 | out_unlock: |
| 351 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 352 | |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 353 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 354 | } |
| 355 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 356 | static LIST_HEAD(page_pool); |
| 357 | static unsigned long pool_size, pool_pages, pool_low; |
| 358 | static unsigned long pool_used, pool_failed, pool_refill; |
| 359 | |
| 360 | static void cpa_fill_pool(void) |
| 361 | { |
| 362 | struct page *p; |
| 363 | gfp_t gfp = GFP_KERNEL; |
| 364 | |
| 365 | /* Do not allocate from interrupt context */ |
| 366 | if (in_irq() || irqs_disabled()) |
| 367 | return; |
| 368 | /* |
| 369 | * Check unlocked. I does not matter when we have one more |
| 370 | * page in the pool. The bit lock avoids recursive pool |
| 371 | * allocations: |
| 372 | */ |
| 373 | if (pool_pages >= pool_size || test_and_set_bit_lock(0, &pool_refill)) |
| 374 | return; |
| 375 | |
| 376 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 377 | /* |
| 378 | * We could do: |
| 379 | * gfp = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; |
| 380 | * but this fails on !PREEMPT kernels |
| 381 | */ |
| 382 | gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN; |
| 383 | #endif |
| 384 | |
| 385 | while (pool_pages < pool_size) { |
| 386 | p = alloc_pages(gfp, 0); |
| 387 | if (!p) { |
| 388 | pool_failed++; |
| 389 | break; |
| 390 | } |
| 391 | spin_lock_irq(&pgd_lock); |
| 392 | list_add(&p->lru, &page_pool); |
| 393 | pool_pages++; |
| 394 | spin_unlock_irq(&pgd_lock); |
| 395 | } |
| 396 | clear_bit_unlock(0, &pool_refill); |
| 397 | } |
| 398 | |
| 399 | #define SHIFT_MB (20 - PAGE_SHIFT) |
| 400 | #define ROUND_MB_GB ((1 << 10) - 1) |
| 401 | #define SHIFT_MB_GB 10 |
| 402 | #define POOL_PAGES_PER_GB 16 |
| 403 | |
| 404 | void __init cpa_init(void) |
| 405 | { |
| 406 | struct sysinfo si; |
| 407 | unsigned long gb; |
| 408 | |
| 409 | si_meminfo(&si); |
| 410 | /* |
| 411 | * Calculate the number of pool pages: |
| 412 | * |
| 413 | * Convert totalram (nr of pages) to MiB and round to the next |
| 414 | * GiB. Shift MiB to Gib and multiply the result by |
| 415 | * POOL_PAGES_PER_GB: |
| 416 | */ |
| 417 | gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB; |
| 418 | pool_size = POOL_PAGES_PER_GB * gb; |
| 419 | pool_low = pool_size; |
| 420 | |
| 421 | cpa_fill_pool(); |
| 422 | printk(KERN_DEBUG |
| 423 | "CPA: page pool initialized %lu of %lu pages preallocated\n", |
| 424 | pool_pages, pool_size); |
| 425 | } |
| 426 | |
Ingo Molnar | 7afe15b | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 427 | static int split_large_page(pte_t *kpte, unsigned long address) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 428 | { |
Thomas Gleixner | 7b610ee | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 429 | unsigned long flags, pfn, pfninc = 1; |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 430 | unsigned int i, level; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 431 | pte_t *pbase, *tmp; |
| 432 | pgprot_t ref_prot; |
| 433 | struct page *base; |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 434 | |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 435 | /* |
| 436 | * Get a page from the pool. The pool list is protected by the |
| 437 | * pgd_lock, which we have to take anyway for the split |
| 438 | * operation: |
| 439 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 440 | spin_lock_irqsave(&pgd_lock, flags); |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 441 | if (list_empty(&page_pool)) { |
| 442 | spin_unlock_irqrestore(&pgd_lock, flags); |
| 443 | return -ENOMEM; |
| 444 | } |
| 445 | |
| 446 | base = list_first_entry(&page_pool, struct page, lru); |
| 447 | list_del(&base->lru); |
| 448 | pool_pages--; |
| 449 | |
| 450 | if (pool_pages < pool_low) |
| 451 | pool_low = pool_pages; |
| 452 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 453 | /* |
| 454 | * Check for races, another CPU might have split this page |
| 455 | * up for us already: |
| 456 | */ |
| 457 | tmp = lookup_address(address, &level); |
Ingo Molnar | 6ce9fc1 | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 458 | if (tmp != kpte) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 459 | goto out_unlock; |
| 460 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 461 | pbase = (pte_t *)page_address(base); |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 462 | #ifdef CONFIG_X86_32 |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 463 | paravirt_alloc_pt(&init_mm, page_to_pfn(base)); |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 464 | #endif |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 465 | ref_prot = pte_pgprot(pte_clrhuge(*kpte)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 466 | |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 467 | #ifdef CONFIG_X86_64 |
| 468 | if (level == PG_LEVEL_1G) { |
| 469 | pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT; |
| 470 | pgprot_val(ref_prot) |= _PAGE_PSE; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 471 | } |
| 472 | #endif |
| 473 | |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 474 | /* |
| 475 | * Get the target pfn from the original entry: |
| 476 | */ |
| 477 | pfn = pte_pfn(*kpte); |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 478 | for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc) |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 479 | set_pte(&pbase[i], pfn_pte(pfn, ref_prot)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 480 | |
| 481 | /* |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 482 | * Install the new, split up pagetable. Important details here: |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 483 | * |
| 484 | * On Intel the NX bit of all levels must be cleared to make a |
| 485 | * page executable. See section 4.13.2 of Intel 64 and IA-32 |
| 486 | * Architectures Software Developer's Manual). |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 487 | * |
| 488 | * Mark the entry present. The current mapping might be |
| 489 | * set to not present, which we preserved above. |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 490 | */ |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 491 | ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte))); |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 492 | pgprot_val(ref_prot) |= _PAGE_PRESENT; |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 493 | __set_pmd_pte(kpte, address, mk_pte(base, ref_prot)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 494 | base = NULL; |
| 495 | |
| 496 | out_unlock: |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 497 | /* |
| 498 | * If we dropped out via the lookup_address check under |
| 499 | * pgd_lock then stick the page back into the pool: |
| 500 | */ |
| 501 | if (base) { |
| 502 | list_add(&base->lru, &page_pool); |
| 503 | pool_pages++; |
| 504 | } else |
| 505 | pool_used++; |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 506 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 507 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 508 | return 0; |
| 509 | } |
| 510 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 511 | static int __change_page_attr(struct cpa_data *cpa, int primary) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 512 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 513 | unsigned long address = cpa->vaddr; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 514 | int do_split, err; |
| 515 | unsigned int level; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 516 | pte_t *kpte, old_pte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | |
Ingo Molnar | 97f99fe | 2008-01-30 13:33:55 +0100 | [diff] [blame] | 518 | repeat: |
Ingo Molnar | f0646e4 | 2008-01-30 13:33:43 +0100 | [diff] [blame] | 519 | kpte = lookup_address(address, &level); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | if (!kpte) |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 521 | return primary ? -EINVAL : 0; |
| 522 | |
| 523 | old_pte = *kpte; |
| 524 | if (!pte_val(old_pte)) { |
| 525 | if (!primary) |
| 526 | return 0; |
| 527 | printk(KERN_WARNING "CPA: called for zero pte. " |
| 528 | "vaddr = %lx cpa->vaddr = %lx\n", address, |
| 529 | cpa->vaddr); |
| 530 | WARN_ON(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 531 | return -EINVAL; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 532 | } |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 533 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 534 | if (level == PG_LEVEL_4K) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 535 | pte_t new_pte; |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 536 | pgprot_t new_prot = pte_pgprot(old_pte); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 537 | unsigned long pfn = pte_pfn(old_pte); |
Thomas Gleixner | a72a08a | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 538 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 539 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 540 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 541 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 542 | new_prot = static_protections(new_prot, address, pfn); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 543 | |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 544 | /* |
| 545 | * We need to keep the pfn from the existing PTE, |
| 546 | * after all we're only going to change it's attributes |
| 547 | * not the memory it points to |
| 548 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 549 | new_pte = pfn_pte(pfn, canon_pgprot(new_prot)); |
| 550 | cpa->pfn = pfn; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 551 | /* |
| 552 | * Do we really change anything ? |
| 553 | */ |
| 554 | if (pte_val(old_pte) != pte_val(new_pte)) { |
| 555 | set_pte_atomic(kpte, new_pte); |
| 556 | cpa->flushtlb = 1; |
| 557 | } |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 558 | cpa->numpages = 1; |
| 559 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | } |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 561 | |
| 562 | /* |
| 563 | * Check, whether we can keep the large page intact |
| 564 | * and just change the pte: |
| 565 | */ |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 566 | do_split = try_preserve_large_page(kpte, address, cpa); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 567 | /* |
| 568 | * When the range fits into the existing large page, |
| 569 | * return. cp->numpages and cpa->tlbflush have been updated in |
| 570 | * try_large_page: |
| 571 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 572 | if (do_split <= 0) |
| 573 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 574 | |
| 575 | /* |
| 576 | * We have to split the large page: |
| 577 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 578 | err = split_large_page(kpte, address); |
| 579 | if (!err) { |
| 580 | cpa->flushtlb = 1; |
| 581 | goto repeat; |
| 582 | } |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 583 | |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 584 | return err; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 585 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 587 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias); |
| 588 | |
| 589 | static int cpa_process_alias(struct cpa_data *cpa) |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 590 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 591 | struct cpa_data alias_cpa; |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 592 | int ret = 0; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 593 | |
| 594 | if (cpa->pfn > max_pfn_mapped) |
| 595 | return 0; |
| 596 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 597 | /* |
| 598 | * No need to redo, when the primary call touched the direct |
| 599 | * mapping already: |
| 600 | */ |
| 601 | if (!within(cpa->vaddr, PAGE_OFFSET, |
| 602 | PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 603 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 604 | alias_cpa = *cpa; |
| 605 | alias_cpa.vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT); |
| 606 | |
| 607 | ret = __change_page_attr_set_clr(&alias_cpa, 0); |
| 608 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 609 | |
Arjan van de Ven | 488fd99 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 610 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 611 | if (ret) |
| 612 | return ret; |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 613 | /* |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 614 | * No need to redo, when the primary call touched the high |
| 615 | * mapping already: |
| 616 | */ |
| 617 | if (within(cpa->vaddr, (unsigned long) _text, (unsigned long) _end)) |
| 618 | return 0; |
| 619 | |
| 620 | /* |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 621 | * If the physical address is inside the kernel map, we need |
| 622 | * to touch the high mapped kernel as well: |
| 623 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 624 | if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) |
| 625 | return 0; |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 626 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 627 | alias_cpa = *cpa; |
| 628 | alias_cpa.vaddr = |
| 629 | (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base; |
| 630 | |
| 631 | /* |
| 632 | * The high mapping range is imprecise, so ignore the return value. |
| 633 | */ |
| 634 | __change_page_attr_set_clr(&alias_cpa, 0); |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 635 | #endif |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 636 | return ret; |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 637 | } |
| 638 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 639 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 640 | { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 641 | int ret, numpages = cpa->numpages; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 642 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 643 | while (numpages) { |
| 644 | /* |
| 645 | * Store the remaining nr of pages for the large page |
| 646 | * preservation check. |
| 647 | */ |
| 648 | cpa->numpages = numpages; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 649 | |
| 650 | ret = __change_page_attr(cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 651 | if (ret) |
| 652 | return ret; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 653 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 654 | if (checkalias) { |
| 655 | ret = cpa_process_alias(cpa); |
| 656 | if (ret) |
| 657 | return ret; |
| 658 | } |
| 659 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 660 | /* |
| 661 | * Adjust the number of pages with the result of the |
| 662 | * CPA operation. Either a large page has been |
| 663 | * preserved or a single page update happened. |
| 664 | */ |
| 665 | BUG_ON(cpa->numpages > numpages); |
| 666 | numpages -= cpa->numpages; |
| 667 | cpa->vaddr += cpa->numpages * PAGE_SIZE; |
| 668 | } |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 669 | return 0; |
| 670 | } |
| 671 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 672 | static inline int cache_attr(pgprot_t attr) |
| 673 | { |
| 674 | return pgprot_val(attr) & |
| 675 | (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD); |
| 676 | } |
| 677 | |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 678 | static int change_page_attr_set_clr(unsigned long addr, int numpages, |
| 679 | pgprot_t mask_set, pgprot_t mask_clr) |
| 680 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 681 | struct cpa_data cpa; |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 682 | int ret, cache, checkalias; |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 683 | |
| 684 | /* |
| 685 | * Check, if we are requested to change a not supported |
| 686 | * feature: |
| 687 | */ |
| 688 | mask_set = canon_pgprot(mask_set); |
| 689 | mask_clr = canon_pgprot(mask_clr); |
| 690 | if (!pgprot_val(mask_set) && !pgprot_val(mask_clr)) |
| 691 | return 0; |
| 692 | |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 693 | /* Ensure we are PAGE_SIZE aligned */ |
| 694 | if (addr & ~PAGE_MASK) { |
| 695 | addr &= PAGE_MASK; |
| 696 | /* |
| 697 | * People should not be passing in unaligned addresses: |
| 698 | */ |
| 699 | WARN_ON_ONCE(1); |
| 700 | } |
| 701 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 702 | cpa.vaddr = addr; |
| 703 | cpa.numpages = numpages; |
| 704 | cpa.mask_set = mask_set; |
| 705 | cpa.mask_clr = mask_clr; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 706 | cpa.flushtlb = 0; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 707 | |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 708 | /* No alias checking for _NX bit modifications */ |
| 709 | checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX; |
| 710 | |
| 711 | ret = __change_page_attr_set_clr(&cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 712 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 713 | /* |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 714 | * Check whether we really changed something: |
| 715 | */ |
| 716 | if (!cpa.flushtlb) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 717 | goto out; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 718 | |
| 719 | /* |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 720 | * No need to flush, when we did not set any of the caching |
| 721 | * attributes: |
| 722 | */ |
| 723 | cache = cache_attr(mask_set); |
| 724 | |
| 725 | /* |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 726 | * On success we use clflush, when the CPU supports it to |
| 727 | * avoid the wbindv. If the CPU does not support it and in the |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 728 | * error case we fall back to cpa_flush_all (which uses |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 729 | * wbindv): |
| 730 | */ |
| 731 | if (!ret && cpu_has_clflush) |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 732 | cpa_flush_range(addr, numpages, cache); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 733 | else |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 734 | cpa_flush_all(cache); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 735 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 736 | out: |
| 737 | cpa_fill_pool(); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 738 | return ret; |
| 739 | } |
| 740 | |
Thomas Gleixner | 5674454 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 741 | static inline int change_page_attr_set(unsigned long addr, int numpages, |
| 742 | pgprot_t mask) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 743 | { |
Thomas Gleixner | 5674454 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 744 | return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 745 | } |
| 746 | |
Thomas Gleixner | 5674454 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 747 | static inline int change_page_attr_clear(unsigned long addr, int numpages, |
| 748 | pgprot_t mask) |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 749 | { |
Huang, Ying | 5827040 | 2008-01-31 22:05:43 +0100 | [diff] [blame] | 750 | return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask); |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 751 | } |
| 752 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 753 | int set_memory_uc(unsigned long addr, int numpages) |
| 754 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 755 | return change_page_attr_set(addr, numpages, |
| 756 | __pgprot(_PAGE_PCD | _PAGE_PWT)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 757 | } |
| 758 | EXPORT_SYMBOL(set_memory_uc); |
| 759 | |
| 760 | int set_memory_wb(unsigned long addr, int numpages) |
| 761 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 762 | return change_page_attr_clear(addr, numpages, |
| 763 | __pgprot(_PAGE_PCD | _PAGE_PWT)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 764 | } |
| 765 | EXPORT_SYMBOL(set_memory_wb); |
| 766 | |
| 767 | int set_memory_x(unsigned long addr, int numpages) |
| 768 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 769 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 770 | } |
| 771 | EXPORT_SYMBOL(set_memory_x); |
| 772 | |
| 773 | int set_memory_nx(unsigned long addr, int numpages) |
| 774 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 775 | return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 776 | } |
| 777 | EXPORT_SYMBOL(set_memory_nx); |
| 778 | |
| 779 | int set_memory_ro(unsigned long addr, int numpages) |
| 780 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 781 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 782 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 783 | |
| 784 | int set_memory_rw(unsigned long addr, int numpages) |
| 785 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 786 | return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 787 | } |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 788 | |
| 789 | int set_memory_np(unsigned long addr, int numpages) |
| 790 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 791 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT)); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 792 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 793 | |
| 794 | int set_pages_uc(struct page *page, int numpages) |
| 795 | { |
| 796 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 797 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 798 | return set_memory_uc(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 799 | } |
| 800 | EXPORT_SYMBOL(set_pages_uc); |
| 801 | |
| 802 | int set_pages_wb(struct page *page, int numpages) |
| 803 | { |
| 804 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 805 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 806 | return set_memory_wb(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 807 | } |
| 808 | EXPORT_SYMBOL(set_pages_wb); |
| 809 | |
| 810 | int set_pages_x(struct page *page, int numpages) |
| 811 | { |
| 812 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 813 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 814 | return set_memory_x(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 815 | } |
| 816 | EXPORT_SYMBOL(set_pages_x); |
| 817 | |
| 818 | int set_pages_nx(struct page *page, int numpages) |
| 819 | { |
| 820 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 821 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 822 | return set_memory_nx(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 823 | } |
| 824 | EXPORT_SYMBOL(set_pages_nx); |
| 825 | |
| 826 | int set_pages_ro(struct page *page, int numpages) |
| 827 | { |
| 828 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 829 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 830 | return set_memory_ro(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 831 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 832 | |
| 833 | int set_pages_rw(struct page *page, int numpages) |
| 834 | { |
| 835 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 836 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 837 | return set_memory_rw(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 838 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 839 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | #ifdef CONFIG_DEBUG_PAGEALLOC |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 841 | |
| 842 | static int __set_pages_p(struct page *page, int numpages) |
| 843 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 844 | struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page), |
| 845 | .numpages = numpages, |
| 846 | .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
| 847 | .mask_clr = __pgprot(0)}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 848 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 849 | return __change_page_attr_set_clr(&cpa, 1); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 850 | } |
| 851 | |
| 852 | static int __set_pages_np(struct page *page, int numpages) |
| 853 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 854 | struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page), |
| 855 | .numpages = numpages, |
| 856 | .mask_set = __pgprot(0), |
| 857 | .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 858 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 859 | return __change_page_attr_set_clr(&cpa, 1); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 860 | } |
| 861 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 862 | void kernel_map_pages(struct page *page, int numpages, int enable) |
| 863 | { |
| 864 | if (PageHighMem(page)) |
| 865 | return; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 866 | if (!enable) { |
Ingo Molnar | f9b8404 | 2006-06-27 02:54:49 -0700 | [diff] [blame] | 867 | debug_check_no_locks_freed(page_address(page), |
| 868 | numpages * PAGE_SIZE); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 869 | } |
Ingo Molnar | de5097c | 2006-01-09 15:59:21 -0800 | [diff] [blame] | 870 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 871 | /* |
Ingo Molnar | 12d6f21 | 2008-01-30 13:33:58 +0100 | [diff] [blame] | 872 | * If page allocator is not up yet then do not call c_p_a(): |
| 873 | */ |
| 874 | if (!debug_pagealloc_enabled) |
| 875 | return; |
| 876 | |
| 877 | /* |
Ingo Molnar | f8d8406 | 2008-02-13 14:09:53 +0100 | [diff] [blame] | 878 | * The return value is ignored as the calls cannot fail. |
| 879 | * Large pages are kept enabled at boot time, and are |
| 880 | * split up quickly with DEBUG_PAGEALLOC. If a splitup |
| 881 | * fails here (due to temporary memory shortage) no damage |
| 882 | * is done because we just keep the largepage intact up |
| 883 | * to the next attempt when it will likely be split up: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 884 | */ |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 885 | if (enable) |
| 886 | __set_pages_p(page, numpages); |
| 887 | else |
| 888 | __set_pages_np(page, numpages); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 889 | |
| 890 | /* |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 891 | * We should perform an IPI and flush all tlbs, |
| 892 | * but that can deadlock->flush only current cpu: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 893 | */ |
| 894 | __flush_tlb_all(); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 895 | |
| 896 | /* |
| 897 | * Try to refill the page pool here. We can do this only after |
| 898 | * the tlb flush. |
| 899 | */ |
| 900 | cpa_fill_pool(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 901 | } |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 902 | |
| 903 | #ifdef CONFIG_HIBERNATION |
| 904 | |
| 905 | bool kernel_page_present(struct page *page) |
| 906 | { |
| 907 | unsigned int level; |
| 908 | pte_t *pte; |
| 909 | |
| 910 | if (PageHighMem(page)) |
| 911 | return false; |
| 912 | |
| 913 | pte = lookup_address((unsigned long)page_address(page), &level); |
| 914 | return (pte_val(*pte) & _PAGE_PRESENT); |
| 915 | } |
| 916 | |
| 917 | #endif /* CONFIG_HIBERNATION */ |
| 918 | |
| 919 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Arjan van de Ven | d1028a1 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 920 | |
| 921 | /* |
| 922 | * The testcases use internal knowledge of the implementation that shouldn't |
| 923 | * be exposed to the rest of the kernel. Include these directly here. |
| 924 | */ |
| 925 | #ifdef CONFIG_CPA_DEBUG |
| 926 | #include "pageattr-test.c" |
| 927 | #endif |