Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Frame buffer driver for Trident Blade and Image series |
| 3 | * |
| 4 | * Copyright 2001,2002 - Jani Monoses <jani@iv.ro> |
| 5 | * |
| 6 | * |
| 7 | * CREDITS:(in order of appearance) |
| 8 | * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video |
| 9 | * Special thanks ;) to Mattia Crivellini <tia@mclink.it> |
| 10 | * much inspired by the XFree86 4.x Trident driver sources by Alan Hourihane |
| 11 | * the FreeVGA project |
| 12 | * Francesco Salvestrini <salvestrini@users.sf.net> XP support,code,suggestions |
| 13 | * TODO: |
| 14 | * timing value tweaking so it looks good on every monitor in every mode |
| 15 | * TGUI acceleration |
| 16 | */ |
| 17 | |
| 18 | #include <linux/config.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/fb.h> |
| 21 | #include <linux/init.h> |
| 22 | #include <linux/pci.h> |
| 23 | |
| 24 | #include <linux/delay.h> |
| 25 | #include <video/trident.h> |
| 26 | |
| 27 | #define VERSION "0.7.8-NEWAPI" |
| 28 | |
| 29 | struct tridentfb_par { |
| 30 | int vclk; //in MHz |
| 31 | void __iomem * io_virt; //iospace virtual memory address |
| 32 | }; |
| 33 | |
| 34 | static unsigned char eng_oper; //engine operation... |
| 35 | static struct fb_ops tridentfb_ops; |
| 36 | |
| 37 | static struct tridentfb_par default_par; |
| 38 | |
| 39 | /* FIXME:kmalloc these 3 instead */ |
| 40 | static struct fb_info fb_info; |
| 41 | static u32 pseudo_pal[16]; |
| 42 | |
| 43 | |
| 44 | static struct fb_var_screeninfo default_var; |
| 45 | |
| 46 | static struct fb_fix_screeninfo tridentfb_fix = { |
| 47 | .id = "Trident", |
| 48 | .type = FB_TYPE_PACKED_PIXELS, |
| 49 | .ypanstep = 1, |
| 50 | .visual = FB_VISUAL_PSEUDOCOLOR, |
| 51 | .accel = FB_ACCEL_NONE, |
| 52 | }; |
| 53 | |
| 54 | static int chip_id; |
| 55 | |
| 56 | static int defaultaccel; |
| 57 | static int displaytype; |
| 58 | |
| 59 | |
| 60 | /* defaults which are normally overriden by user values */ |
| 61 | |
| 62 | /* video mode */ |
| 63 | static char * mode = "640x480"; |
| 64 | static int bpp = 8; |
| 65 | |
| 66 | static int noaccel; |
| 67 | |
| 68 | static int center; |
| 69 | static int stretch; |
| 70 | |
| 71 | static int fp; |
| 72 | static int crt; |
| 73 | |
| 74 | static int memsize; |
| 75 | static int memdiff; |
| 76 | static int nativex; |
| 77 | |
| 78 | |
| 79 | module_param(mode, charp, 0); |
| 80 | module_param(bpp, int, 0); |
| 81 | module_param(center, int, 0); |
| 82 | module_param(stretch, int, 0); |
| 83 | module_param(noaccel, int, 0); |
| 84 | module_param(memsize, int, 0); |
| 85 | module_param(memdiff, int, 0); |
| 86 | module_param(nativex, int, 0); |
| 87 | module_param(fp, int, 0); |
| 88 | module_param(crt, int, 0); |
| 89 | |
| 90 | |
| 91 | static int chip3D; |
| 92 | static int chipcyber; |
| 93 | |
| 94 | static int is3Dchip(int id) |
| 95 | { |
| 96 | return ((id == BLADE3D) || (id == CYBERBLADEE4) || |
| 97 | (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) || |
| 98 | (id == CYBER9397) || (id == CYBER9397DVD) || |
| 99 | (id == CYBER9520) || (id == CYBER9525DVD) || |
| 100 | (id == IMAGE975) || (id == IMAGE985) || |
| 101 | (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) || |
| 102 | (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) || |
| 103 | (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) || |
| 104 | (id == CYBERBLADEXPAi1)); |
| 105 | } |
| 106 | |
| 107 | static int iscyber(int id) |
| 108 | { |
| 109 | switch (id) { |
| 110 | case CYBER9388: |
| 111 | case CYBER9382: |
| 112 | case CYBER9385: |
| 113 | case CYBER9397: |
| 114 | case CYBER9397DVD: |
| 115 | case CYBER9520: |
| 116 | case CYBER9525DVD: |
| 117 | case CYBERBLADEE4: |
| 118 | case CYBERBLADEi7D: |
| 119 | case CYBERBLADEi1: |
| 120 | case CYBERBLADEi1D: |
| 121 | case CYBERBLADEAi1: |
| 122 | case CYBERBLADEAi1D: |
| 123 | case CYBERBLADEXPAi1: |
| 124 | return 1; |
| 125 | |
| 126 | case CYBER9320: |
| 127 | case TGUI9660: |
| 128 | case IMAGE975: |
| 129 | case IMAGE985: |
| 130 | case BLADE3D: |
| 131 | case CYBERBLADEi7: /* VIA MPV4 integrated version */ |
| 132 | |
| 133 | default: |
| 134 | /* case CYBERBLDAEXPm8: Strange */ |
| 135 | /* case CYBERBLDAEXPm16: Strange */ |
| 136 | return 0; |
| 137 | } |
| 138 | } |
| 139 | |
| 140 | #define CRT 0x3D0 //CRTC registers offset for color display |
| 141 | |
| 142 | #ifndef TRIDENT_MMIO |
| 143 | #define TRIDENT_MMIO 1 |
| 144 | #endif |
| 145 | |
| 146 | #if TRIDENT_MMIO |
| 147 | #define t_outb(val,reg) writeb(val,((struct tridentfb_par *)(fb_info.par))->io_virt + reg) |
| 148 | #define t_inb(reg) readb(((struct tridentfb_par*)(fb_info.par))->io_virt + reg) |
| 149 | #else |
| 150 | #define t_outb(val,reg) outb(val,reg) |
| 151 | #define t_inb(reg) inb(reg) |
| 152 | #endif |
| 153 | |
| 154 | |
| 155 | static struct accel_switch { |
| 156 | void (*init_accel)(int,int); |
| 157 | void (*wait_engine)(void); |
| 158 | void (*fill_rect)(__u32,__u32,__u32,__u32,__u32,__u32); |
| 159 | void (*copy_rect)(__u32,__u32,__u32,__u32,__u32,__u32); |
| 160 | } *acc; |
| 161 | |
| 162 | #define writemmr(r,v) writel(v, ((struct tridentfb_par *)fb_info.par)->io_virt + r) |
| 163 | #define readmmr(r) readl(((struct tridentfb_par *)fb_info.par)->io_virt + r) |
| 164 | |
| 165 | |
| 166 | |
| 167 | /* |
| 168 | * Blade specific acceleration. |
| 169 | */ |
| 170 | |
| 171 | #define point(x,y) ((y)<<16|(x)) |
| 172 | #define STA 0x2120 |
| 173 | #define CMD 0x2144 |
| 174 | #define ROP 0x2148 |
| 175 | #define CLR 0x2160 |
| 176 | #define SR1 0x2100 |
| 177 | #define SR2 0x2104 |
| 178 | #define DR1 0x2108 |
| 179 | #define DR2 0x210C |
| 180 | |
| 181 | #define ROP_S 0xCC |
| 182 | |
| 183 | static void blade_init_accel(int pitch,int bpp) |
| 184 | { |
| 185 | int v1 = (pitch>>3)<<20; |
| 186 | int tmp = 0,v2; |
| 187 | switch (bpp) { |
| 188 | case 8:tmp = 0;break; |
| 189 | case 15:tmp = 5;break; |
| 190 | case 16:tmp = 1;break; |
| 191 | case 24: |
| 192 | case 32:tmp = 2;break; |
| 193 | } |
| 194 | v2 = v1 | (tmp<<29); |
| 195 | writemmr(0x21C0,v2); |
| 196 | writemmr(0x21C4,v2); |
| 197 | writemmr(0x21B8,v2); |
| 198 | writemmr(0x21BC,v2); |
| 199 | writemmr(0x21D0,v1); |
| 200 | writemmr(0x21D4,v1); |
| 201 | writemmr(0x21C8,v1); |
| 202 | writemmr(0x21CC,v1); |
| 203 | writemmr(0x216C,0); |
| 204 | } |
| 205 | |
| 206 | static void blade_wait_engine(void) |
| 207 | { |
| 208 | while(readmmr(STA) & 0xFA800000); |
| 209 | } |
| 210 | |
| 211 | static void blade_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop) |
| 212 | { |
| 213 | writemmr(CLR,c); |
| 214 | writemmr(ROP,rop ? 0x66:ROP_S); |
| 215 | writemmr(CMD,0x20000000|1<<19|1<<4|2<<2); |
| 216 | |
| 217 | writemmr(DR1,point(x,y)); |
| 218 | writemmr(DR2,point(x+w-1,y+h-1)); |
| 219 | } |
| 220 | |
| 221 | static void blade_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h) |
| 222 | { |
| 223 | __u32 s1,s2,d1,d2; |
| 224 | int direction = 2; |
| 225 | s1 = point(x1,y1); |
| 226 | s2 = point(x1+w-1,y1+h-1); |
| 227 | d1 = point(x2,y2); |
| 228 | d2 = point(x2+w-1,y2+h-1); |
| 229 | |
| 230 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) |
| 231 | direction = 0; |
| 232 | |
| 233 | |
| 234 | writemmr(ROP,ROP_S); |
| 235 | writemmr(CMD,0xE0000000|1<<19|1<<4|1<<2|direction); |
| 236 | |
| 237 | writemmr(SR1,direction?s2:s1); |
| 238 | writemmr(SR2,direction?s1:s2); |
| 239 | writemmr(DR1,direction?d2:d1); |
| 240 | writemmr(DR2,direction?d1:d2); |
| 241 | } |
| 242 | |
| 243 | static struct accel_switch accel_blade = { |
| 244 | blade_init_accel, |
| 245 | blade_wait_engine, |
| 246 | blade_fill_rect, |
| 247 | blade_copy_rect, |
| 248 | }; |
| 249 | |
| 250 | |
| 251 | /* |
| 252 | * BladeXP specific acceleration functions |
| 253 | */ |
| 254 | |
| 255 | #define ROP_P 0xF0 |
| 256 | #define masked_point(x,y) ((y & 0xffff)<<16|(x & 0xffff)) |
| 257 | |
| 258 | static void xp_init_accel(int pitch,int bpp) |
| 259 | { |
| 260 | int tmp = 0,v1; |
| 261 | unsigned char x = 0; |
| 262 | |
| 263 | switch (bpp) { |
| 264 | case 8: x = 0; break; |
| 265 | case 16: x = 1; break; |
| 266 | case 24: x = 3; break; |
| 267 | case 32: x = 2; break; |
| 268 | } |
| 269 | |
| 270 | switch (pitch << (bpp >> 3)) { |
| 271 | case 8192: |
| 272 | case 512: x |= 0x00; break; |
| 273 | case 1024: x |= 0x04; break; |
| 274 | case 2048: x |= 0x08; break; |
| 275 | case 4096: x |= 0x0C; break; |
| 276 | } |
| 277 | |
| 278 | t_outb(x,0x2125); |
| 279 | |
| 280 | eng_oper = x | 0x40; |
| 281 | |
| 282 | switch (bpp) { |
| 283 | case 8: tmp = 18; break; |
| 284 | case 15: |
| 285 | case 16: tmp = 19; break; |
| 286 | case 24: |
| 287 | case 32: tmp = 20; break; |
| 288 | } |
| 289 | |
| 290 | v1 = pitch << tmp; |
| 291 | |
| 292 | writemmr(0x2154,v1); |
| 293 | writemmr(0x2150,v1); |
| 294 | t_outb(3,0x2126); |
| 295 | } |
| 296 | |
| 297 | static void xp_wait_engine(void) |
| 298 | { |
| 299 | int busy; |
| 300 | int count, timeout; |
| 301 | |
| 302 | count = 0; |
| 303 | timeout = 0; |
| 304 | for (;;) { |
| 305 | busy = t_inb(STA) & 0x80; |
| 306 | if (busy != 0x80) |
| 307 | return; |
| 308 | count++; |
| 309 | if (count == 10000000) { |
| 310 | /* Timeout */ |
| 311 | count = 9990000; |
| 312 | timeout++; |
| 313 | if (timeout == 8) { |
| 314 | /* Reset engine */ |
| 315 | t_outb(0x00, 0x2120); |
| 316 | return; |
| 317 | } |
| 318 | } |
| 319 | } |
| 320 | } |
| 321 | |
| 322 | static void xp_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop) |
| 323 | { |
| 324 | writemmr(0x2127,ROP_P); |
| 325 | writemmr(0x2158,c); |
| 326 | writemmr(0x2128,0x4000); |
| 327 | writemmr(0x2140,masked_point(h,w)); |
| 328 | writemmr(0x2138,masked_point(y,x)); |
| 329 | t_outb(0x01,0x2124); |
| 330 | t_outb(eng_oper,0x2125); |
| 331 | } |
| 332 | |
| 333 | static void xp_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h) |
| 334 | { |
| 335 | int direction; |
| 336 | __u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp; |
| 337 | |
| 338 | direction = 0x0004; |
| 339 | |
| 340 | if ((x1 < x2) && (y1 == y2)) { |
| 341 | direction |= 0x0200; |
| 342 | x1_tmp = x1 + w - 1; |
| 343 | x2_tmp = x2 + w - 1; |
| 344 | } else { |
| 345 | x1_tmp = x1; |
| 346 | x2_tmp = x2; |
| 347 | } |
| 348 | |
| 349 | if (y1 < y2) { |
| 350 | direction |= 0x0100; |
| 351 | y1_tmp = y1 + h - 1; |
| 352 | y2_tmp = y2 + h - 1; |
| 353 | } else { |
| 354 | y1_tmp = y1; |
| 355 | y2_tmp = y2; |
| 356 | } |
| 357 | |
| 358 | writemmr(0x2128,direction); |
| 359 | t_outb(ROP_S,0x2127); |
| 360 | writemmr(0x213C,masked_point(y1_tmp,x1_tmp)); |
| 361 | writemmr(0x2138,masked_point(y2_tmp,x2_tmp)); |
| 362 | writemmr(0x2140,masked_point(h,w)); |
| 363 | t_outb(0x01,0x2124); |
| 364 | } |
| 365 | |
| 366 | static struct accel_switch accel_xp = { |
| 367 | xp_init_accel, |
| 368 | xp_wait_engine, |
| 369 | xp_fill_rect, |
| 370 | xp_copy_rect, |
| 371 | }; |
| 372 | |
| 373 | |
| 374 | /* |
| 375 | * Image specific acceleration functions |
| 376 | */ |
| 377 | static void image_init_accel(int pitch,int bpp) |
| 378 | { |
| 379 | int tmp = 0; |
| 380 | switch (bpp) { |
| 381 | case 8:tmp = 0;break; |
| 382 | case 15:tmp = 5;break; |
| 383 | case 16:tmp = 1;break; |
| 384 | case 24: |
| 385 | case 32:tmp = 2;break; |
| 386 | } |
| 387 | writemmr(0x2120, 0xF0000000); |
| 388 | writemmr(0x2120, 0x40000000|tmp); |
| 389 | writemmr(0x2120, 0x80000000); |
| 390 | writemmr(0x2144, 0x00000000); |
| 391 | writemmr(0x2148, 0x00000000); |
| 392 | writemmr(0x2150, 0x00000000); |
| 393 | writemmr(0x2154, 0x00000000); |
| 394 | writemmr(0x2120, 0x60000000|(pitch<<16) |pitch); |
| 395 | writemmr(0x216C, 0x00000000); |
| 396 | writemmr(0x2170, 0x00000000); |
| 397 | writemmr(0x217C, 0x00000000); |
| 398 | writemmr(0x2120, 0x10000000); |
| 399 | writemmr(0x2130, (2047 << 16) | 2047); |
| 400 | } |
| 401 | |
| 402 | static void image_wait_engine(void) |
| 403 | { |
| 404 | while(readmmr(0x2164) & 0xF0000000); |
| 405 | } |
| 406 | |
| 407 | static void image_fill_rect(__u32 x, __u32 y, __u32 w, __u32 h, __u32 c, __u32 rop) |
| 408 | { |
| 409 | writemmr(0x2120,0x80000000); |
| 410 | writemmr(0x2120,0x90000000|ROP_S); |
| 411 | |
| 412 | writemmr(0x2144,c); |
| 413 | |
| 414 | writemmr(DR1,point(x,y)); |
| 415 | writemmr(DR2,point(x+w-1,y+h-1)); |
| 416 | |
| 417 | writemmr(0x2124,0x80000000|3<<22|1<<10|1<<9); |
| 418 | } |
| 419 | |
| 420 | static void image_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h) |
| 421 | { |
| 422 | __u32 s1,s2,d1,d2; |
| 423 | int direction = 2; |
| 424 | s1 = point(x1,y1); |
| 425 | s2 = point(x1+w-1,y1+h-1); |
| 426 | d1 = point(x2,y2); |
| 427 | d2 = point(x2+w-1,y2+h-1); |
| 428 | |
| 429 | if ((y1 > y2) || ((y1 == y2) && (x1 >x2))) |
| 430 | direction = 0; |
| 431 | |
| 432 | writemmr(0x2120,0x80000000); |
| 433 | writemmr(0x2120,0x90000000|ROP_S); |
| 434 | |
| 435 | writemmr(SR1,direction?s2:s1); |
| 436 | writemmr(SR2,direction?s1:s2); |
| 437 | writemmr(DR1,direction?d2:d1); |
| 438 | writemmr(DR2,direction?d1:d2); |
| 439 | writemmr(0x2124,0x80000000|1<<22|1<<10|1<<7|direction); |
| 440 | } |
| 441 | |
| 442 | |
| 443 | static struct accel_switch accel_image = { |
| 444 | image_init_accel, |
| 445 | image_wait_engine, |
| 446 | image_fill_rect, |
| 447 | image_copy_rect, |
| 448 | }; |
| 449 | |
| 450 | /* |
| 451 | * Accel functions called by the upper layers |
| 452 | */ |
| 453 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
| 454 | static void tridentfb_fillrect(struct fb_info * info, const struct fb_fillrect *fr) |
| 455 | { |
| 456 | int bpp = info->var.bits_per_pixel; |
Antonino A. Daplas | 8dad46c | 2005-08-01 23:46:44 +0800 | [diff] [blame] | 457 | int col = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | |
| 459 | switch (bpp) { |
| 460 | default: |
Antonino A. Daplas | 8dad46c | 2005-08-01 23:46:44 +0800 | [diff] [blame] | 461 | case 8: col |= fr->color; |
| 462 | col |= col << 8; |
| 463 | col |= col << 16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | break; |
| 465 | case 16: col = ((u32 *)(info->pseudo_palette))[fr->color]; |
Antonino A. Daplas | 8dad46c | 2005-08-01 23:46:44 +0800 | [diff] [blame] | 466 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | break; |
| 468 | case 32: col = ((u32 *)(info->pseudo_palette))[fr->color]; |
| 469 | break; |
| 470 | } |
| 471 | |
| 472 | acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop); |
| 473 | acc->wait_engine(); |
| 474 | } |
| 475 | static void tridentfb_copyarea(struct fb_info *info, const struct fb_copyarea *ca) |
| 476 | { |
| 477 | acc->copy_rect(ca->sx,ca->sy,ca->dx,ca->dy,ca->width,ca->height); |
| 478 | acc->wait_engine(); |
| 479 | } |
| 480 | #else /* !CONFIG_FB_TRIDENT_ACCEL */ |
| 481 | #define tridentfb_fillrect cfb_fillrect |
| 482 | #define tridentfb_copyarea cfb_copyarea |
| 483 | #endif /* CONFIG_FB_TRIDENT_ACCEL */ |
| 484 | |
| 485 | |
| 486 | /* |
| 487 | * Hardware access functions |
| 488 | */ |
| 489 | |
| 490 | static inline unsigned char read3X4(int reg) |
| 491 | { |
| 492 | struct tridentfb_par * par = (struct tridentfb_par *)fb_info.par; |
| 493 | writeb(reg, par->io_virt + CRT + 4); |
| 494 | return readb( par->io_virt + CRT + 5); |
| 495 | } |
| 496 | |
| 497 | static inline void write3X4(int reg, unsigned char val) |
| 498 | { |
| 499 | struct tridentfb_par * par = (struct tridentfb_par *)fb_info.par; |
| 500 | writeb(reg, par->io_virt + CRT + 4); |
| 501 | writeb(val, par->io_virt + CRT + 5); |
| 502 | } |
| 503 | |
| 504 | static inline unsigned char read3C4(int reg) |
| 505 | { |
| 506 | t_outb(reg, 0x3C4); |
| 507 | return t_inb(0x3C5); |
| 508 | } |
| 509 | |
| 510 | static inline void write3C4(int reg, unsigned char val) |
| 511 | { |
| 512 | t_outb(reg, 0x3C4); |
| 513 | t_outb(val, 0x3C5); |
| 514 | } |
| 515 | |
| 516 | static inline unsigned char read3CE(int reg) |
| 517 | { |
| 518 | t_outb(reg, 0x3CE); |
| 519 | return t_inb(0x3CF); |
| 520 | } |
| 521 | |
| 522 | static inline void writeAttr(int reg, unsigned char val) |
| 523 | { |
| 524 | readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A); //flip-flop to index |
| 525 | t_outb(reg, 0x3C0); |
| 526 | t_outb(val, 0x3C0); |
| 527 | } |
| 528 | |
| 529 | static inline void write3CE(int reg, unsigned char val) |
| 530 | { |
| 531 | t_outb(reg, 0x3CE); |
| 532 | t_outb(val, 0x3CF); |
| 533 | } |
| 534 | |
| 535 | static inline void enable_mmio(void) |
| 536 | { |
| 537 | /* Goto New Mode */ |
| 538 | outb(0x0B, 0x3C4); |
| 539 | inb(0x3C5); |
| 540 | |
| 541 | /* Unprotect registers */ |
| 542 | outb(NewMode1, 0x3C4); |
| 543 | outb(0x80, 0x3C5); |
| 544 | |
| 545 | /* Enable MMIO */ |
| 546 | outb(PCIReg, 0x3D4); |
| 547 | outb(inb(0x3D5) | 0x01, 0x3D5); |
| 548 | } |
| 549 | |
| 550 | |
| 551 | #define crtc_unlock() write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F) |
| 552 | |
| 553 | /* Return flat panel's maximum x resolution */ |
Randy Dunlap | 474ab45 | 2006-06-25 05:48:38 -0700 | [diff] [blame] | 554 | static int __devinit get_nativex(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 555 | { |
| 556 | int x,y,tmp; |
| 557 | |
| 558 | if (nativex) |
| 559 | return nativex; |
| 560 | |
| 561 | tmp = (read3CE(VertStretch) >> 4) & 3; |
| 562 | |
| 563 | switch (tmp) { |
| 564 | case 0: x = 1280; y = 1024; break; |
| 565 | case 2: x = 1024; y = 768; break; |
| 566 | case 3: x = 800; y = 600; break; |
| 567 | case 4: x = 1400; y = 1050; break; |
| 568 | case 1: |
| 569 | default:x = 640; y = 480; break; |
| 570 | } |
| 571 | |
| 572 | output("%dx%d flat panel found\n", x, y); |
| 573 | return x; |
| 574 | } |
| 575 | |
| 576 | /* Set pitch */ |
| 577 | static void set_lwidth(int width) |
| 578 | { |
| 579 | write3X4(Offset, width & 0xFF); |
| 580 | write3X4(AddColReg, (read3X4(AddColReg) & 0xCF) | ((width & 0x300) >>4)); |
| 581 | } |
| 582 | |
| 583 | /* For resolutions smaller than FP resolution stretch */ |
| 584 | static void screen_stretch(void) |
| 585 | { |
| 586 | if (chip_id != CYBERBLADEXPAi1) |
| 587 | write3CE(BiosReg,0); |
| 588 | else |
| 589 | write3CE(BiosReg,8); |
| 590 | write3CE(VertStretch,(read3CE(VertStretch) & 0x7C) | 1); |
| 591 | write3CE(HorStretch,(read3CE(HorStretch) & 0x7C) | 1); |
| 592 | } |
| 593 | |
| 594 | /* For resolutions smaller than FP resolution center */ |
| 595 | static void screen_center(void) |
| 596 | { |
| 597 | write3CE(VertStretch,(read3CE(VertStretch) & 0x7C) | 0x80); |
| 598 | write3CE(HorStretch,(read3CE(HorStretch) & 0x7C) | 0x80); |
| 599 | } |
| 600 | |
| 601 | /* Address of first shown pixel in display memory */ |
| 602 | static void set_screen_start(int base) |
| 603 | { |
| 604 | write3X4(StartAddrLow, base & 0xFF); |
| 605 | write3X4(StartAddrHigh, (base & 0xFF00) >> 8); |
| 606 | write3X4(CRTCModuleTest, (read3X4(CRTCModuleTest) & 0xDF) | ((base & 0x10000) >> 11)); |
| 607 | write3X4(CRTHiOrd, (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17)); |
| 608 | } |
| 609 | |
| 610 | /* Use 20.12 fixed-point for NTSC value and frequency calculation */ |
| 611 | #define calc_freq(n,m,k) ( ((unsigned long)0xE517 * (n+8) / ((m+2)*(1<<k))) >> 12 ) |
| 612 | |
| 613 | /* Set dotclock frequency */ |
| 614 | static void set_vclk(int freq) |
| 615 | { |
| 616 | int m,n,k; |
| 617 | int f,fi,d,di; |
| 618 | unsigned char lo=0,hi=0; |
| 619 | |
| 620 | d = 20; |
| 621 | for(k = 2;k>=0;k--) |
| 622 | for(m = 0;m<63;m++) |
| 623 | for(n = 0;n<128;n++) { |
| 624 | fi = calc_freq(n,m,k); |
| 625 | if ((di = abs(fi - freq)) < d) { |
| 626 | d = di; |
| 627 | f = fi; |
| 628 | lo = n; |
| 629 | hi = (k<<6) | m; |
| 630 | } |
| 631 | } |
| 632 | if (chip3D) { |
| 633 | write3C4(ClockHigh,hi); |
| 634 | write3C4(ClockLow,lo); |
| 635 | } else { |
| 636 | outb(lo,0x43C8); |
| 637 | outb(hi,0x43C9); |
| 638 | } |
| 639 | debug("VCLK = %X %X\n",hi,lo); |
| 640 | } |
| 641 | |
| 642 | /* Set number of lines for flat panels*/ |
| 643 | static void set_number_of_lines(int lines) |
| 644 | { |
| 645 | int tmp = read3CE(CyberEnhance) & 0x8F; |
| 646 | if (lines > 1024) |
| 647 | tmp |= 0x50; |
| 648 | else if (lines > 768) |
| 649 | tmp |= 0x30; |
| 650 | else if (lines > 600) |
| 651 | tmp |= 0x20; |
| 652 | else if (lines > 480) |
| 653 | tmp |= 0x10; |
| 654 | write3CE(CyberEnhance, tmp); |
| 655 | } |
| 656 | |
| 657 | /* |
| 658 | * If we see that FP is active we assume we have one. |
| 659 | * Otherwise we have a CRT display.User can override. |
| 660 | */ |
Randy Dunlap | 474ab45 | 2006-06-25 05:48:38 -0700 | [diff] [blame] | 661 | static unsigned int __devinit get_displaytype(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | { |
| 663 | if (fp) |
| 664 | return DISPLAY_FP; |
| 665 | if (crt || !chipcyber) |
| 666 | return DISPLAY_CRT; |
| 667 | return (read3CE(FPConfig) & 0x10)?DISPLAY_FP:DISPLAY_CRT; |
| 668 | } |
| 669 | |
| 670 | /* Try detecting the video memory size */ |
Randy Dunlap | 474ab45 | 2006-06-25 05:48:38 -0700 | [diff] [blame] | 671 | static unsigned int __devinit get_memsize(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | { |
| 673 | unsigned char tmp, tmp2; |
| 674 | unsigned int k; |
| 675 | |
| 676 | /* If memory size provided by user */ |
| 677 | if (memsize) |
| 678 | k = memsize * Kb; |
| 679 | else |
| 680 | switch (chip_id) { |
| 681 | case CYBER9525DVD: k = 2560 * Kb; break; |
| 682 | default: |
| 683 | tmp = read3X4(SPR) & 0x0F; |
| 684 | switch (tmp) { |
| 685 | |
| 686 | case 0x01: k = 512; break; |
| 687 | case 0x02: k = 6 * Mb; break; /* XP */ |
| 688 | case 0x03: k = 1 * Mb; break; |
| 689 | case 0x04: k = 8 * Mb; break; |
| 690 | case 0x06: k = 10 * Mb; break; /* XP */ |
| 691 | case 0x07: k = 2 * Mb; break; |
| 692 | case 0x08: k = 12 * Mb; break; /* XP */ |
| 693 | case 0x0A: k = 14 * Mb; break; /* XP */ |
| 694 | case 0x0C: k = 16 * Mb; break; /* XP */ |
| 695 | case 0x0E: /* XP */ |
| 696 | |
| 697 | tmp2 = read3C4(0xC1); |
| 698 | switch (tmp2) { |
| 699 | case 0x00: k = 20 * Mb; break; |
| 700 | case 0x01: k = 24 * Mb; break; |
| 701 | case 0x10: k = 28 * Mb; break; |
| 702 | case 0x11: k = 32 * Mb; break; |
| 703 | default: k = 1 * Mb; break; |
| 704 | } |
| 705 | break; |
| 706 | |
| 707 | case 0x0F: k = 4 * Mb; break; |
| 708 | default: k = 1 * Mb; |
| 709 | } |
| 710 | } |
| 711 | |
| 712 | k -= memdiff * Kb; |
| 713 | output("framebuffer size = %d Kb\n", k/Kb); |
| 714 | return k; |
| 715 | } |
| 716 | |
| 717 | /* See if we can handle the video mode described in var */ |
| 718 | static int tridentfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
| 719 | { |
| 720 | int bpp = var->bits_per_pixel; |
| 721 | debug("enter\n"); |
| 722 | |
| 723 | /* check color depth */ |
| 724 | if (bpp == 24 ) |
| 725 | bpp = var->bits_per_pixel = 32; |
| 726 | /* check whether resolution fits on panel and in memory*/ |
| 727 | if (flatpanel && nativex && var->xres > nativex) |
| 728 | return -EINVAL; |
| 729 | if (var->xres * var->yres_virtual * bpp/8 > info->fix.smem_len) |
| 730 | return -EINVAL; |
| 731 | |
| 732 | switch (bpp) { |
| 733 | case 8: |
| 734 | var->red.offset = 0; |
| 735 | var->green.offset = 0; |
| 736 | var->blue.offset = 0; |
| 737 | var->red.length = 6; |
| 738 | var->green.length = 6; |
| 739 | var->blue.length = 6; |
| 740 | break; |
| 741 | case 16: |
| 742 | var->red.offset = 11; |
| 743 | var->green.offset = 5; |
| 744 | var->blue.offset = 0; |
| 745 | var->red.length = 5; |
| 746 | var->green.length = 6; |
| 747 | var->blue.length = 5; |
| 748 | break; |
| 749 | case 32: |
| 750 | var->red.offset = 16; |
| 751 | var->green.offset = 8; |
| 752 | var->blue.offset = 0; |
| 753 | var->red.length = 8; |
| 754 | var->green.length = 8; |
| 755 | var->blue.length = 8; |
| 756 | break; |
| 757 | default: |
| 758 | return -EINVAL; |
| 759 | } |
| 760 | debug("exit\n"); |
| 761 | |
| 762 | return 0; |
| 763 | |
| 764 | } |
| 765 | /* Pan the display */ |
| 766 | static int tridentfb_pan_display(struct fb_var_screeninfo *var, |
| 767 | struct fb_info *info) |
| 768 | { |
| 769 | unsigned int offset; |
| 770 | |
| 771 | debug("enter\n"); |
| 772 | offset = (var->xoffset + (var->yoffset * var->xres)) |
| 773 | * var->bits_per_pixel/32; |
| 774 | info->var.xoffset = var->xoffset; |
| 775 | info->var.yoffset = var->yoffset; |
| 776 | set_screen_start(offset); |
| 777 | debug("exit\n"); |
| 778 | return 0; |
| 779 | } |
| 780 | |
| 781 | #define shadowmode_on() write3CE(CyberControl,read3CE(CyberControl) | 0x81) |
| 782 | #define shadowmode_off() write3CE(CyberControl,read3CE(CyberControl) & 0x7E) |
| 783 | |
| 784 | /* Set the hardware to the requested video mode */ |
| 785 | static int tridentfb_set_par(struct fb_info *info) |
| 786 | { |
| 787 | struct tridentfb_par * par = (struct tridentfb_par *)(info->par); |
| 788 | u32 htotal,hdispend,hsyncstart,hsyncend,hblankstart,hblankend, |
| 789 | vtotal,vdispend,vsyncstart,vsyncend,vblankstart,vblankend; |
| 790 | struct fb_var_screeninfo *var = &info->var; |
| 791 | int bpp = var->bits_per_pixel; |
| 792 | unsigned char tmp; |
| 793 | debug("enter\n"); |
| 794 | htotal = (var->xres + var->left_margin + var->right_margin + var->hsync_len)/8 - 10; |
| 795 | hdispend = var->xres/8 - 1; |
| 796 | hsyncstart = (var->xres + var->right_margin)/8; |
| 797 | hsyncend = var->hsync_len/8; |
| 798 | hblankstart = hdispend + 1; |
| 799 | hblankend = htotal + 5; |
| 800 | |
| 801 | vtotal = var->yres + var->upper_margin + var->lower_margin + var->vsync_len - 2; |
| 802 | vdispend = var->yres - 1; |
| 803 | vsyncstart = var->yres + var->lower_margin; |
| 804 | vsyncend = var->vsync_len; |
| 805 | vblankstart = var->yres; |
| 806 | vblankend = vtotal + 2; |
| 807 | |
| 808 | enable_mmio(); |
| 809 | crtc_unlock(); |
| 810 | write3CE(CyberControl,8); |
| 811 | |
| 812 | if (flatpanel && var->xres < nativex) { |
| 813 | /* |
| 814 | * on flat panels with native size larger |
| 815 | * than requested resolution decide whether |
| 816 | * we stretch or center |
| 817 | */ |
| 818 | t_outb(0xEB,0x3C2); |
| 819 | |
| 820 | shadowmode_on(); |
| 821 | |
| 822 | if (center) |
| 823 | screen_center(); |
| 824 | else if (stretch) |
| 825 | screen_stretch(); |
| 826 | |
| 827 | } else { |
| 828 | t_outb(0x2B,0x3C2); |
| 829 | write3CE(CyberControl,8); |
| 830 | } |
| 831 | |
| 832 | /* vertical timing values */ |
| 833 | write3X4(CRTVTotal, vtotal & 0xFF); |
| 834 | write3X4(CRTVDispEnd, vdispend & 0xFF); |
| 835 | write3X4(CRTVSyncStart, vsyncstart & 0xFF); |
| 836 | write3X4(CRTVSyncEnd, (vsyncend & 0x0F)); |
| 837 | write3X4(CRTVBlankStart, vblankstart & 0xFF); |
| 838 | write3X4(CRTVBlankEnd, 0/*p->vblankend & 0xFF*/); |
| 839 | |
| 840 | /* horizontal timing values */ |
| 841 | write3X4(CRTHTotal, htotal & 0xFF); |
| 842 | write3X4(CRTHDispEnd, hdispend & 0xFF); |
| 843 | write3X4(CRTHSyncStart, hsyncstart & 0xFF); |
| 844 | write3X4(CRTHSyncEnd, (hsyncend & 0x1F) | ((hblankend & 0x20)<<2)); |
| 845 | write3X4(CRTHBlankStart, hblankstart & 0xFF); |
| 846 | write3X4(CRTHBlankEnd, 0/*(p->hblankend & 0x1F)*/); |
| 847 | |
| 848 | /* higher bits of vertical timing values */ |
| 849 | tmp = 0x10; |
| 850 | if (vtotal & 0x100) tmp |= 0x01; |
| 851 | if (vdispend & 0x100) tmp |= 0x02; |
| 852 | if (vsyncstart & 0x100) tmp |= 0x04; |
| 853 | if (vblankstart & 0x100) tmp |= 0x08; |
| 854 | |
| 855 | if (vtotal & 0x200) tmp |= 0x20; |
| 856 | if (vdispend & 0x200) tmp |= 0x40; |
| 857 | if (vsyncstart & 0x200) tmp |= 0x80; |
| 858 | write3X4(CRTOverflow, tmp); |
| 859 | |
| 860 | tmp = read3X4(CRTHiOrd) | 0x08; //line compare bit 10 |
| 861 | if (vtotal & 0x400) tmp |= 0x80; |
| 862 | if (vblankstart & 0x400) tmp |= 0x40; |
| 863 | if (vsyncstart & 0x400) tmp |= 0x20; |
| 864 | if (vdispend & 0x400) tmp |= 0x10; |
| 865 | write3X4(CRTHiOrd, tmp); |
| 866 | |
| 867 | tmp = 0; |
| 868 | if (htotal & 0x800) tmp |= 0x800 >> 11; |
| 869 | if (hblankstart & 0x800) tmp |= 0x800 >> 7; |
| 870 | write3X4(HorizOverflow, tmp); |
| 871 | |
| 872 | tmp = 0x40; |
| 873 | if (vblankstart & 0x200) tmp |= 0x20; |
| 874 | //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; //double scan for 200 line modes |
| 875 | write3X4(CRTMaxScanLine, tmp); |
| 876 | |
| 877 | write3X4(CRTLineCompare,0xFF); |
| 878 | write3X4(CRTPRowScan,0); |
| 879 | write3X4(CRTModeControl,0xC3); |
| 880 | |
| 881 | write3X4(LinearAddReg,0x20); //enable linear addressing |
| 882 | |
| 883 | tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84:0x80; |
| 884 | write3X4(CRTCModuleTest,tmp); //enable access extended memory |
| 885 | |
| 886 | write3X4(GraphEngReg, 0x80); //enable GE for text acceleration |
| 887 | |
Antonino A. Daplas | 8dad46c | 2005-08-01 23:46:44 +0800 | [diff] [blame] | 888 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
| 889 | acc->init_accel(info->var.xres,bpp); |
| 890 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 891 | |
| 892 | switch (bpp) { |
| 893 | case 8: tmp = 0x00; break; |
| 894 | case 16: tmp = 0x05; break; |
| 895 | case 24: tmp = 0x29; break; |
| 896 | case 32: tmp = 0x09; |
| 897 | } |
| 898 | |
| 899 | write3X4(PixelBusReg, tmp); |
| 900 | |
| 901 | tmp = 0x10; |
| 902 | if (chipcyber) |
| 903 | tmp |= 0x20; |
| 904 | write3X4(DRAMControl, tmp); //both IO,linear enable |
| 905 | |
| 906 | write3X4(InterfaceSel, read3X4(InterfaceSel) | 0x40); |
Antonino A. Daplas | 8d894c4 | 2005-08-01 23:51:34 +0800 | [diff] [blame] | 907 | write3X4(Performance,0x92); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 908 | write3X4(PCIReg,0x07); //MMIO & PCI read and write burst enable |
| 909 | |
| 910 | /* convert from picoseconds to MHz */ |
| 911 | par->vclk = 1000000/info->var.pixclock; |
| 912 | if (bpp == 32) |
| 913 | par->vclk *=2; |
| 914 | set_vclk(par->vclk); |
| 915 | |
| 916 | write3C4(0,3); |
| 917 | write3C4(1,1); //set char clock 8 dots wide |
| 918 | write3C4(2,0x0F); //enable 4 maps because needed in chain4 mode |
| 919 | write3C4(3,0); |
| 920 | write3C4(4,0x0E); //memory mode enable bitmaps ?? |
| 921 | |
| 922 | write3CE(MiscExtFunc,(bpp==32)?0x1A:0x12); //divide clock by 2 if 32bpp |
| 923 | //chain4 mode display and CPU path |
| 924 | write3CE(0x5,0x40); //no CGA compat,allow 256 col |
| 925 | write3CE(0x6,0x05); //graphics mode |
| 926 | write3CE(0x7,0x0F); //planes? |
| 927 | |
| 928 | if (chip_id == CYBERBLADEXPAi1) { |
| 929 | /* This fixes snow-effect in 32 bpp */ |
| 930 | write3X4(CRTHSyncStart,0x84); |
| 931 | } |
| 932 | |
| 933 | writeAttr(0x10,0x41); //graphics mode and support 256 color modes |
| 934 | writeAttr(0x12,0x0F); //planes |
| 935 | writeAttr(0x13,0); //horizontal pel panning |
| 936 | |
| 937 | //colors |
| 938 | for(tmp = 0;tmp < 0x10;tmp++) |
| 939 | writeAttr(tmp,tmp); |
| 940 | readb(par->io_virt + CRT + 0x0A); //flip-flop to index |
| 941 | t_outb(0x20, 0x3C0); //enable attr |
| 942 | |
| 943 | switch (bpp) { |
| 944 | case 8: tmp = 0;break; //256 colors |
| 945 | case 15: tmp = 0x10;break; |
| 946 | case 16: tmp = 0x30;break; //hicolor |
| 947 | case 24: //truecolor |
| 948 | case 32: tmp = 0xD0;break; |
| 949 | } |
| 950 | |
| 951 | t_inb(0x3C8); |
| 952 | t_inb(0x3C6); |
| 953 | t_inb(0x3C6); |
| 954 | t_inb(0x3C6); |
| 955 | t_inb(0x3C6); |
| 956 | t_outb(tmp,0x3C6); |
| 957 | t_inb(0x3C8); |
| 958 | |
| 959 | if (flatpanel) |
| 960 | set_number_of_lines(info->var.yres); |
| 961 | set_lwidth(info->var.xres * bpp/(4*16)); |
| 962 | info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; |
| 963 | info->fix.line_length = info->var.xres * (bpp >> 3); |
| 964 | info->cmap.len = (bpp == 8) ? 256: 16; |
| 965 | debug("exit\n"); |
| 966 | return 0; |
| 967 | } |
| 968 | |
| 969 | /* Set one color register */ |
| 970 | static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, |
| 971 | unsigned blue, unsigned transp, |
| 972 | struct fb_info *info) |
| 973 | { |
| 974 | int bpp = info->var.bits_per_pixel; |
| 975 | |
| 976 | if (regno >= info->cmap.len) |
| 977 | return 1; |
| 978 | |
| 979 | |
| 980 | if (bpp==8) { |
| 981 | t_outb(0xFF,0x3C6); |
| 982 | t_outb(regno,0x3C8); |
| 983 | |
| 984 | t_outb(red>>10,0x3C9); |
| 985 | t_outb(green>>10,0x3C9); |
| 986 | t_outb(blue>>10,0x3C9); |
| 987 | |
Antonino A. Daplas | 8dad46c | 2005-08-01 23:46:44 +0800 | [diff] [blame] | 988 | } else if (bpp == 16) { /* RGB 565 */ |
| 989 | u32 col; |
| 990 | |
| 991 | col = (red & 0xF800) | ((green & 0xFC00) >> 5) | |
| 992 | ((blue & 0xF800) >> 11); |
| 993 | col |= col << 16; |
| 994 | ((u32 *)(info->pseudo_palette))[regno] = col; |
| 995 | } else if (bpp == 32) /* ARGB 8888 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 996 | ((u32*)info->pseudo_palette)[regno] = |
| 997 | ((transp & 0xFF00) <<16) | |
| 998 | ((red & 0xFF00) << 8) | |
| 999 | ((green & 0xFF00)) | |
| 1000 | ((blue & 0xFF00)>>8); |
| 1001 | |
| 1002 | // debug("exit\n"); |
| 1003 | return 0; |
| 1004 | } |
| 1005 | |
| 1006 | /* Try blanking the screen.For flat panels it does nothing */ |
| 1007 | static int tridentfb_blank(int blank_mode, struct fb_info *info) |
| 1008 | { |
| 1009 | unsigned char PMCont,DPMSCont; |
| 1010 | |
| 1011 | debug("enter\n"); |
| 1012 | if (flatpanel) |
| 1013 | return 0; |
| 1014 | t_outb(0x04,0x83C8); /* Read DPMS Control */ |
| 1015 | PMCont = t_inb(0x83C6) & 0xFC; |
| 1016 | DPMSCont = read3CE(PowerStatus) & 0xFC; |
| 1017 | switch (blank_mode) |
| 1018 | { |
| 1019 | case FB_BLANK_UNBLANK: |
| 1020 | /* Screen: On, HSync: On, VSync: On */ |
| 1021 | case FB_BLANK_NORMAL: |
| 1022 | /* Screen: Off, HSync: On, VSync: On */ |
| 1023 | PMCont |= 0x03; |
| 1024 | DPMSCont |= 0x00; |
| 1025 | break; |
| 1026 | case FB_BLANK_HSYNC_SUSPEND: |
| 1027 | /* Screen: Off, HSync: Off, VSync: On */ |
| 1028 | PMCont |= 0x02; |
| 1029 | DPMSCont |= 0x01; |
| 1030 | break; |
| 1031 | case FB_BLANK_VSYNC_SUSPEND: |
| 1032 | /* Screen: Off, HSync: On, VSync: Off */ |
| 1033 | PMCont |= 0x02; |
| 1034 | DPMSCont |= 0x02; |
| 1035 | break; |
| 1036 | case FB_BLANK_POWERDOWN: |
| 1037 | /* Screen: Off, HSync: Off, VSync: Off */ |
| 1038 | PMCont |= 0x00; |
| 1039 | DPMSCont |= 0x03; |
| 1040 | break; |
| 1041 | } |
| 1042 | |
| 1043 | write3CE(PowerStatus,DPMSCont); |
| 1044 | t_outb(4,0x83C8); |
| 1045 | t_outb(PMCont,0x83C6); |
| 1046 | |
| 1047 | debug("exit\n"); |
| 1048 | |
| 1049 | /* let fbcon do a softblank for us */ |
| 1050 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; |
| 1051 | } |
| 1052 | |
| 1053 | static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_device_id * id) |
| 1054 | { |
| 1055 | int err; |
| 1056 | unsigned char revision; |
| 1057 | |
| 1058 | err = pci_enable_device(dev); |
| 1059 | if (err) |
| 1060 | return err; |
| 1061 | |
| 1062 | chip_id = id->device; |
| 1063 | |
Knut Petersen | 9fa68ea | 2005-09-09 13:04:56 -0700 | [diff] [blame] | 1064 | if(chip_id == CYBERBLADEi1) |
| 1065 | output("*** Please do use cyblafb, Cyberblade/i1 support " |
| 1066 | "will soon be removed from tridentfb!\n"); |
| 1067 | |
| 1068 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1069 | /* If PCI id is 0x9660 then further detect chip type */ |
| 1070 | |
| 1071 | if (chip_id == TGUI9660) { |
| 1072 | outb(RevisionID,0x3C4); |
| 1073 | revision = inb(0x3C5); |
| 1074 | |
| 1075 | switch (revision) { |
| 1076 | case 0x22: |
| 1077 | case 0x23: chip_id = CYBER9397;break; |
| 1078 | case 0x2A: chip_id = CYBER9397DVD;break; |
| 1079 | case 0x30: |
| 1080 | case 0x33: |
| 1081 | case 0x34: |
| 1082 | case 0x35: |
| 1083 | case 0x38: |
| 1084 | case 0x3A: |
| 1085 | case 0xB3: chip_id = CYBER9385;break; |
| 1086 | case 0x40 ... 0x43: chip_id = CYBER9382;break; |
| 1087 | case 0x4A: chip_id = CYBER9388;break; |
| 1088 | default:break; |
| 1089 | } |
| 1090 | } |
| 1091 | |
| 1092 | chip3D = is3Dchip(chip_id); |
| 1093 | chipcyber = iscyber(chip_id); |
| 1094 | |
| 1095 | if (is_xp(chip_id)) { |
| 1096 | acc = &accel_xp; |
| 1097 | } else |
| 1098 | if (is_blade(chip_id)) { |
| 1099 | acc = &accel_blade; |
| 1100 | } else { |
| 1101 | acc = &accel_image; |
| 1102 | } |
| 1103 | |
| 1104 | /* acceleration is on by default for 3D chips */ |
| 1105 | defaultaccel = chip3D && !noaccel; |
| 1106 | |
| 1107 | fb_info.par = &default_par; |
| 1108 | |
| 1109 | /* setup MMIO region */ |
| 1110 | tridentfb_fix.mmio_start = pci_resource_start(dev,1); |
| 1111 | tridentfb_fix.mmio_len = chip3D ? 0x20000:0x10000; |
| 1112 | |
| 1113 | if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) { |
| 1114 | debug("request_region failed!\n"); |
| 1115 | return -1; |
| 1116 | } |
| 1117 | |
| 1118 | default_par.io_virt = ioremap_nocache(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
| 1119 | |
| 1120 | if (!default_par.io_virt) { |
| 1121 | release_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
| 1122 | debug("ioremap failed\n"); |
| 1123 | return -1; |
| 1124 | } |
| 1125 | |
| 1126 | enable_mmio(); |
| 1127 | |
| 1128 | /* setup framebuffer memory */ |
| 1129 | tridentfb_fix.smem_start = pci_resource_start(dev,0); |
| 1130 | tridentfb_fix.smem_len = get_memsize(); |
| 1131 | |
| 1132 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { |
| 1133 | debug("request_mem_region failed!\n"); |
| 1134 | return -1; |
| 1135 | } |
| 1136 | |
| 1137 | fb_info.screen_base = ioremap_nocache(tridentfb_fix.smem_start, |
| 1138 | tridentfb_fix.smem_len); |
| 1139 | |
| 1140 | if (!fb_info.screen_base) { |
| 1141 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
| 1142 | debug("ioremap failed\n"); |
| 1143 | return -1; |
| 1144 | } |
| 1145 | |
| 1146 | output("%s board found\n", pci_name(dev)); |
| 1147 | #if 0 |
| 1148 | output("Trident board found : mem = %X,io = %X, mem_v = %X, io_v = %X\n", |
| 1149 | tridentfb_fix.smem_start, tridentfb_fix.mmio_start, fb_info.screen_base, default_par.io_virt); |
| 1150 | #endif |
| 1151 | displaytype = get_displaytype(); |
| 1152 | |
| 1153 | if(flatpanel) |
| 1154 | nativex = get_nativex(); |
| 1155 | |
| 1156 | fb_info.fix = tridentfb_fix; |
| 1157 | fb_info.fbops = &tridentfb_ops; |
| 1158 | |
| 1159 | |
| 1160 | fb_info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
| 1161 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
| 1162 | fb_info.flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; |
| 1163 | #endif |
| 1164 | fb_info.pseudo_palette = pseudo_pal; |
| 1165 | |
| 1166 | if (!fb_find_mode(&default_var,&fb_info,mode,NULL,0,NULL,bpp)) |
| 1167 | return -EINVAL; |
| 1168 | fb_alloc_cmap(&fb_info.cmap,256,0); |
| 1169 | if (defaultaccel && acc) |
| 1170 | default_var.accel_flags |= FB_ACCELF_TEXT; |
| 1171 | else |
| 1172 | default_var.accel_flags &= ~FB_ACCELF_TEXT; |
| 1173 | default_var.activate |= FB_ACTIVATE_NOW; |
| 1174 | fb_info.var = default_var; |
| 1175 | fb_info.device = &dev->dev; |
| 1176 | if (register_framebuffer(&fb_info) < 0) { |
| 1177 | printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n"); |
| 1178 | return -EINVAL; |
| 1179 | } |
| 1180 | output("fb%d: %s frame buffer device %dx%d-%dbpp\n", |
| 1181 | fb_info.node, fb_info.fix.id,default_var.xres, |
| 1182 | default_var.yres,default_var.bits_per_pixel); |
| 1183 | return 0; |
| 1184 | } |
| 1185 | |
| 1186 | static void __devexit trident_pci_remove(struct pci_dev * dev) |
| 1187 | { |
| 1188 | struct tridentfb_par *par = (struct tridentfb_par*)fb_info.par; |
| 1189 | unregister_framebuffer(&fb_info); |
| 1190 | iounmap(par->io_virt); |
| 1191 | iounmap(fb_info.screen_base); |
| 1192 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
| 1193 | release_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
| 1194 | } |
| 1195 | |
| 1196 | /* List of boards that we are trying to support */ |
| 1197 | static struct pci_device_id trident_devices[] = { |
| 1198 | {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1199 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1200 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1201 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1202 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1203 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1204 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1205 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1206 | {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1207 | {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1208 | {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1209 | {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1210 | {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1211 | {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1212 | {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1213 | {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1214 | {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1215 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1216 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1217 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, |
| 1218 | {0,} |
| 1219 | }; |
| 1220 | |
| 1221 | MODULE_DEVICE_TABLE(pci,trident_devices); |
| 1222 | |
| 1223 | static struct pci_driver tridentfb_pci_driver = { |
| 1224 | .name = "tridentfb", |
| 1225 | .id_table = trident_devices, |
| 1226 | .probe = trident_pci_probe, |
| 1227 | .remove = __devexit_p(trident_pci_remove) |
| 1228 | }; |
| 1229 | |
| 1230 | /* |
| 1231 | * Parse user specified options (`video=trident:') |
| 1232 | * example: |
| 1233 | * video=trident:800x600,bpp=16,noaccel |
| 1234 | */ |
| 1235 | #ifndef MODULE |
| 1236 | static int tridentfb_setup(char *options) |
| 1237 | { |
| 1238 | char * opt; |
| 1239 | if (!options || !*options) |
| 1240 | return 0; |
| 1241 | while((opt = strsep(&options,",")) != NULL ) { |
| 1242 | if (!*opt) continue; |
| 1243 | if (!strncmp(opt,"noaccel",7)) |
| 1244 | noaccel = 1; |
| 1245 | else if (!strncmp(opt,"fp",2)) |
| 1246 | displaytype = DISPLAY_FP; |
| 1247 | else if (!strncmp(opt,"crt",3)) |
| 1248 | displaytype = DISPLAY_CRT; |
| 1249 | else if (!strncmp(opt,"bpp=",4)) |
| 1250 | bpp = simple_strtoul(opt+4,NULL,0); |
| 1251 | else if (!strncmp(opt,"center",6)) |
| 1252 | center = 1; |
| 1253 | else if (!strncmp(opt,"stretch",7)) |
| 1254 | stretch = 1; |
| 1255 | else if (!strncmp(opt,"memsize=",8)) |
| 1256 | memsize = simple_strtoul(opt+8,NULL,0); |
| 1257 | else if (!strncmp(opt,"memdiff=",8)) |
| 1258 | memdiff = simple_strtoul(opt+8,NULL,0); |
| 1259 | else if (!strncmp(opt,"nativex=",8)) |
| 1260 | nativex = simple_strtoul(opt+8,NULL,0); |
| 1261 | else |
| 1262 | mode = opt; |
| 1263 | } |
| 1264 | return 0; |
| 1265 | } |
| 1266 | #endif |
| 1267 | |
| 1268 | static int __init tridentfb_init(void) |
| 1269 | { |
| 1270 | #ifndef MODULE |
| 1271 | char *option = NULL; |
| 1272 | |
| 1273 | if (fb_get_options("tridentfb", &option)) |
| 1274 | return -ENODEV; |
| 1275 | tridentfb_setup(option); |
| 1276 | #endif |
| 1277 | output("Trident framebuffer %s initializing\n", VERSION); |
| 1278 | return pci_register_driver(&tridentfb_pci_driver); |
| 1279 | } |
| 1280 | |
| 1281 | static void __exit tridentfb_exit(void) |
| 1282 | { |
| 1283 | pci_unregister_driver(&tridentfb_pci_driver); |
| 1284 | } |
| 1285 | |
| 1286 | static struct fb_ops tridentfb_ops = { |
| 1287 | .owner = THIS_MODULE, |
| 1288 | .fb_setcolreg = tridentfb_setcolreg, |
| 1289 | .fb_pan_display = tridentfb_pan_display, |
| 1290 | .fb_blank = tridentfb_blank, |
| 1291 | .fb_check_var = tridentfb_check_var, |
| 1292 | .fb_set_par = tridentfb_set_par, |
| 1293 | .fb_fillrect = tridentfb_fillrect, |
| 1294 | .fb_copyarea= tridentfb_copyarea, |
| 1295 | .fb_imageblit = cfb_imageblit, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1296 | }; |
| 1297 | |
| 1298 | module_init(tridentfb_init); |
| 1299 | module_exit(tridentfb_exit); |
| 1300 | |
| 1301 | MODULE_AUTHOR("Jani Monoses <jani@iv.ro>"); |
| 1302 | MODULE_DESCRIPTION("Framebuffer driver for Trident cards"); |
| 1303 | MODULE_LICENSE("GPL"); |
| 1304 | |