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Jesse Barnes79e53942008-11-07 14:24:08 -08001/**************************************************************************
2
3Copyright © 2006 Dave Airlie
4
5All Rights Reserved.
6
7Permission is hereby granted, free of charge, to any person obtaining a
8copy of this software and associated documentation files (the
9"Software"), to deal in the Software without restriction, including
10without limitation the rights to use, copy, modify, merge, publish,
11distribute, sub license, and/or sell copies of the Software, and to
12permit persons to whom the Software is furnished to do so, subject to
13the following conditions:
14
15The above copyright notice and this permission notice (including the
16next paragraph) shall be included in all copies or substantial portions
17of the Software.
18
19THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
23ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27**************************************************************************/
28
29#include "dvo.h"
30
31#define SIL164_VID 0x0001
32#define SIL164_DID 0x0006
33
34#define SIL164_VID_LO 0x00
35#define SIL164_VID_HI 0x01
36#define SIL164_DID_LO 0x02
37#define SIL164_DID_HI 0x03
38#define SIL164_REV 0x04
39#define SIL164_RSVD 0x05
40#define SIL164_FREQ_LO 0x06
41#define SIL164_FREQ_HI 0x07
42
43#define SIL164_REG8 0x08
44#define SIL164_8_VEN (1<<5)
45#define SIL164_8_HEN (1<<4)
46#define SIL164_8_DSEL (1<<3)
47#define SIL164_8_BSEL (1<<2)
48#define SIL164_8_EDGE (1<<1)
49#define SIL164_8_PD (1<<0)
50
51#define SIL164_REG9 0x09
52#define SIL164_9_VLOW (1<<7)
53#define SIL164_9_MSEL_MASK (0x7<<4)
54#define SIL164_9_TSEL (1<<3)
55#define SIL164_9_RSEN (1<<2)
56#define SIL164_9_HTPLG (1<<1)
57#define SIL164_9_MDI (1<<0)
58
59#define SIL164_REGC 0x0c
60
Jesse Barnes79e53942008-11-07 14:24:08 -080061struct sil164_priv {
62 //I2CDevRec d;
63 bool quiet;
Jesse Barnes79e53942008-11-07 14:24:08 -080064};
65
66#define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
67
68static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
69{
70 struct sil164_priv *sil = dvo->dev_priv;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 struct i2c_adapter *adapter = dvo->i2c_bus;
Jesse Barnes79e53942008-11-07 14:24:08 -080072 u8 out_buf[2];
73 u8 in_buf[2];
74
75 struct i2c_msg msgs[] = {
76 {
Keith Packardf9c10a92009-05-30 12:16:25 -070077 .addr = dvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -080078 .flags = 0,
79 .len = 1,
80 .buf = out_buf,
81 },
82 {
Keith Packardf9c10a92009-05-30 12:16:25 -070083 .addr = dvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -080084 .flags = I2C_M_RD,
85 .len = 1,
86 .buf = in_buf,
87 }
88 };
89
90 out_buf[0] = addr;
91 out_buf[1] = 0;
92
Chris Wilsonf899fc62010-07-20 15:44:45 -070093 if (i2c_transfer(adapter, msgs, 2) == 2) {
Jesse Barnes79e53942008-11-07 14:24:08 -080094 *ch = in_buf[0];
95 return true;
Damien Lespiau6ed6bd82014-04-09 14:33:08 +010096 }
Jesse Barnes79e53942008-11-07 14:24:08 -080097
98 if (!sil->quiet) {
Zhao Yakuid0c3b042009-10-09 11:39:43 +080099 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
Chris Wilsonf899fc62010-07-20 15:44:45 -0700100 addr, adapter->name, dvo->slave_addr);
Jesse Barnes79e53942008-11-07 14:24:08 -0800101 }
102 return false;
103}
104
105static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
106{
Akshay Joshi0206e352011-08-16 15:34:10 -0400107 struct sil164_priv *sil = dvo->dev_priv;
Keith Packardf9c10a92009-05-30 12:16:25 -0700108 struct i2c_adapter *adapter = dvo->i2c_bus;
Jesse Barnes79e53942008-11-07 14:24:08 -0800109 uint8_t out_buf[2];
110 struct i2c_msg msg = {
Keith Packardf9c10a92009-05-30 12:16:25 -0700111 .addr = dvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800112 .flags = 0,
113 .len = 2,
114 .buf = out_buf,
115 };
116
117 out_buf[0] = addr;
118 out_buf[1] = ch;
119
Chris Wilsonf899fc62010-07-20 15:44:45 -0700120 if (i2c_transfer(adapter, &msg, 1) == 1)
Jesse Barnes79e53942008-11-07 14:24:08 -0800121 return true;
122
123 if (!sil->quiet) {
Zhao Yakuid0c3b042009-10-09 11:39:43 +0800124 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
Chris Wilsonf899fc62010-07-20 15:44:45 -0700125 addr, adapter->name, dvo->slave_addr);
Jesse Barnes79e53942008-11-07 14:24:08 -0800126 }
127
128 return false;
129}
130
131/* Silicon Image 164 driver for chip on i2c bus */
132static bool sil164_init(struct intel_dvo_device *dvo,
Keith Packardf9c10a92009-05-30 12:16:25 -0700133 struct i2c_adapter *adapter)
Jesse Barnes79e53942008-11-07 14:24:08 -0800134{
135 /* this will detect the SIL164 chip on the specified i2c bus */
136 struct sil164_priv *sil;
137 unsigned char ch;
138
139 sil = kzalloc(sizeof(struct sil164_priv), GFP_KERNEL);
140 if (sil == NULL)
141 return false;
142
Keith Packardf9c10a92009-05-30 12:16:25 -0700143 dvo->i2c_bus = adapter;
Jesse Barnes79e53942008-11-07 14:24:08 -0800144 dvo->dev_priv = sil;
145 sil->quiet = true;
146
147 if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
148 goto out;
149
150 if (ch != (SIL164_VID & 0xff)) {
Zhao Yakuid0c3b042009-10-09 11:39:43 +0800151 DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
Keith Packardf9c10a92009-05-30 12:16:25 -0700152 ch, adapter->name, dvo->slave_addr);
Jesse Barnes79e53942008-11-07 14:24:08 -0800153 goto out;
154 }
155
156 if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
157 goto out;
158
159 if (ch != (SIL164_DID & 0xff)) {
Zhao Yakuid0c3b042009-10-09 11:39:43 +0800160 DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
Keith Packardf9c10a92009-05-30 12:16:25 -0700161 ch, adapter->name, dvo->slave_addr);
Jesse Barnes79e53942008-11-07 14:24:08 -0800162 goto out;
163 }
164 sil->quiet = false;
165
Zhao Yakuid0c3b042009-10-09 11:39:43 +0800166 DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800167 return true;
168
169out:
170 kfree(sil);
171 return false;
172}
173
174static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
175{
176 uint8_t reg9;
177
178 sil164_readb(dvo, SIL164_REG9, &reg9);
179
180 if (reg9 & SIL164_9_HTPLG)
181 return connector_status_connected;
182 else
183 return connector_status_disconnected;
184}
185
186static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
187 struct drm_display_mode *mode)
188{
189 return MODE_OK;
190}
191
192static void sil164_mode_set(struct intel_dvo_device *dvo,
Ville Syrjälä7c5f93b2015-09-08 13:40:49 +0300193 const struct drm_display_mode *mode,
194 const struct drm_display_mode *adjusted_mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800195{
196 /* As long as the basics are set up, since we don't have clock
197 * dependencies in the mode setup, we can just leave the
198 * registers alone and everything will work fine.
199 */
200 /* recommended programming sequence from doc */
201 /*sil164_writeb(sil, 0x08, 0x30);
202 sil164_writeb(sil, 0x09, 0x00);
203 sil164_writeb(sil, 0x0a, 0x90);
204 sil164_writeb(sil, 0x0c, 0x89);
205 sil164_writeb(sil, 0x08, 0x31);*/
206 /* don't do much */
207 return;
208}
209
210/* set the SIL164 power state */
Daniel Vetterfac32742012-08-12 19:27:12 +0200211static void sil164_dpms(struct intel_dvo_device *dvo, bool enable)
Jesse Barnes79e53942008-11-07 14:24:08 -0800212{
213 int ret;
214 unsigned char ch;
215
216 ret = sil164_readb(dvo, SIL164_REG8, &ch);
217 if (ret == false)
218 return;
219
Daniel Vetterfac32742012-08-12 19:27:12 +0200220 if (enable)
Jesse Barnes79e53942008-11-07 14:24:08 -0800221 ch |= SIL164_8_PD;
222 else
223 ch &= ~SIL164_8_PD;
224
225 sil164_writeb(dvo, SIL164_REG8, ch);
226 return;
227}
228
Daniel Vetter732ce742012-07-02 15:09:45 +0200229static bool sil164_get_hw_state(struct intel_dvo_device *dvo)
230{
231 int ret;
232 unsigned char ch;
233
234 ret = sil164_readb(dvo, SIL164_REG8, &ch);
235 if (ret == false)
236 return false;
237
238 if (ch & SIL164_8_PD)
239 return true;
240 else
241 return false;
242}
243
Jesse Barnes79e53942008-11-07 14:24:08 -0800244static void sil164_dump_regs(struct intel_dvo_device *dvo)
245{
246 uint8_t val;
247
248 sil164_readb(dvo, SIL164_FREQ_LO, &val);
Lespiau, Damien29139e42014-03-24 15:53:12 +0000249 DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
Jesse Barnes79e53942008-11-07 14:24:08 -0800250 sil164_readb(dvo, SIL164_FREQ_HI, &val);
Lespiau, Damien29139e42014-03-24 15:53:12 +0000251 DRM_DEBUG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
Jesse Barnes79e53942008-11-07 14:24:08 -0800252 sil164_readb(dvo, SIL164_REG8, &val);
Lespiau, Damien29139e42014-03-24 15:53:12 +0000253 DRM_DEBUG_KMS("SIL164_REG8: 0x%02x\n", val);
Jesse Barnes79e53942008-11-07 14:24:08 -0800254 sil164_readb(dvo, SIL164_REG9, &val);
Lespiau, Damien29139e42014-03-24 15:53:12 +0000255 DRM_DEBUG_KMS("SIL164_REG9: 0x%02x\n", val);
Jesse Barnes79e53942008-11-07 14:24:08 -0800256 sil164_readb(dvo, SIL164_REGC, &val);
Lespiau, Damien29139e42014-03-24 15:53:12 +0000257 DRM_DEBUG_KMS("SIL164_REGC: 0x%02x\n", val);
Jesse Barnes79e53942008-11-07 14:24:08 -0800258}
259
Jesse Barnes79e53942008-11-07 14:24:08 -0800260static void sil164_destroy(struct intel_dvo_device *dvo)
261{
262 struct sil164_priv *sil = dvo->dev_priv;
263
264 if (sil) {
265 kfree(sil);
266 dvo->dev_priv = NULL;
267 }
268}
269
Julia Lawall0f555642015-12-08 21:55:27 +0100270const struct intel_dvo_dev_ops sil164_ops = {
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 .init = sil164_init,
272 .detect = sil164_detect,
273 .mode_valid = sil164_mode_valid,
274 .mode_set = sil164_mode_set,
275 .dpms = sil164_dpms,
Daniel Vetter732ce742012-07-02 15:09:45 +0200276 .get_hw_state = sil164_get_hw_state,
Jesse Barnes79e53942008-11-07 14:24:08 -0800277 .dump_regs = sil164_dump_regs,
Jesse Barnes79e53942008-11-07 14:24:08 -0800278 .destroy = sil164_destroy,
279};