Peter De Schrijver | 22b8b85 | 2012-01-26 18:22:03 +0200 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-tegra/cpuidle.c |
| 3 | * |
| 4 | * CPU idle driver for Tegra CPUs |
| 5 | * |
| 6 | * Copyright (c) 2010-2012, NVIDIA Corporation. |
| 7 | * Copyright (c) 2011 Google, Inc. |
| 8 | * Author: Colin Cross <ccross@android.com> |
| 9 | * Gary King <gking@nvidia.com> |
| 10 | * |
| 11 | * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com> |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License as published by |
| 15 | * the Free Software Foundation; either version 2 of the License, or |
| 16 | * (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 19 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 20 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 21 | * more details. |
| 22 | */ |
| 23 | |
| 24 | #include <linux/kernel.h> |
| 25 | #include <linux/module.h> |
Peter De Schrijver | 22b8b85 | 2012-01-26 18:22:03 +0200 | [diff] [blame] | 26 | |
Joseph Lo | 0b25e25 | 2012-10-31 17:41:15 +0800 | [diff] [blame] | 27 | #include "fuse.h" |
| 28 | #include "cpuidle.h" |
Peter De Schrijver | 22b8b85 | 2012-01-26 18:22:03 +0200 | [diff] [blame] | 29 | |
Joseph Lo | e22dc2b | 2013-06-04 18:47:32 +0800 | [diff] [blame] | 30 | void __init tegra_cpuidle_init(void) |
Peter De Schrijver | 22b8b85 | 2012-01-26 18:22:03 +0200 | [diff] [blame] | 31 | { |
Joseph Lo | 0b25e25 | 2012-10-31 17:41:15 +0800 | [diff] [blame] | 32 | switch (tegra_chip_id) { |
| 33 | case TEGRA20: |
Joseph Lo | b046a65 | 2013-06-04 18:47:34 +0800 | [diff] [blame] | 34 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) |
| 35 | tegra20_cpuidle_init(); |
Joseph Lo | 0b25e25 | 2012-10-31 17:41:15 +0800 | [diff] [blame] | 36 | break; |
| 37 | case TEGRA30: |
Joseph Lo | b046a65 | 2013-06-04 18:47:34 +0800 | [diff] [blame] | 38 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) |
| 39 | tegra30_cpuidle_init(); |
Joseph Lo | 0b25e25 | 2012-10-31 17:41:15 +0800 | [diff] [blame] | 40 | break; |
Joseph Lo | 51dc525 | 2013-01-21 17:49:06 +0800 | [diff] [blame] | 41 | case TEGRA114: |
Joseph Lo | 24036fd | 2013-10-11 17:57:32 +0800 | [diff] [blame^] | 42 | case TEGRA124: |
| 43 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || |
| 44 | IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)) |
Joseph Lo | b046a65 | 2013-06-04 18:47:34 +0800 | [diff] [blame] | 45 | tegra114_cpuidle_init(); |
Joseph Lo | 0b25e25 | 2012-10-31 17:41:15 +0800 | [diff] [blame] | 46 | break; |
Peter De Schrijver | 22b8b85 | 2012-01-26 18:22:03 +0200 | [diff] [blame] | 47 | } |
Peter De Schrijver | 22b8b85 | 2012-01-26 18:22:03 +0200 | [diff] [blame] | 48 | } |
Stephen Warren | b4f1737 | 2013-05-06 14:19:19 -0600 | [diff] [blame] | 49 | |
| 50 | void tegra_cpuidle_pcie_irqs_in_use(void) |
| 51 | { |
| 52 | switch (tegra_chip_id) { |
| 53 | case TEGRA20: |
| 54 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) |
| 55 | tegra20_cpuidle_pcie_irqs_in_use(); |
| 56 | break; |
| 57 | } |
| 58 | } |