Krzysztof Kozlowski | 3a7c01d | 2015-05-25 21:13:17 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Hardkernel Odroid XU3 board device tree source |
| 3 | * |
| 4 | * Copyright (c) 2014 Collabora Ltd. |
| 5 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 6 | * http://www.samsung.com |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <dt-bindings/clock/samsung,s2mps11.h> |
| 14 | #include <dt-bindings/interrupt-controller/irq.h> |
| 15 | #include <dt-bindings/gpio/gpio.h> |
| 16 | #include <dt-bindings/sound/samsung-i2s.h> |
| 17 | #include "exynos5800.dtsi" |
Chanho Park | df09df6f | 2015-07-30 23:11:00 +0900 | [diff] [blame] | 18 | #include "exynos5422-cpus.dtsi" |
Anand Moon | cc20fc4 | 2015-06-15 12:23:23 +0930 | [diff] [blame] | 19 | #include "exynos5422-cpu-thermal.dtsi" |
Krzysztof Kozlowski | 3a7c01d | 2015-05-25 21:13:17 +0900 | [diff] [blame] | 20 | |
| 21 | / { |
| 22 | memory { |
| 23 | reg = <0x40000000 0x7EA00000>; |
| 24 | }; |
| 25 | |
| 26 | chosen { |
| 27 | linux,stdout-path = &serial_2; |
| 28 | }; |
| 29 | |
| 30 | firmware@02073000 { |
| 31 | compatible = "samsung,secure-firmware"; |
| 32 | reg = <0x02073000 0x1000>; |
| 33 | }; |
| 34 | |
| 35 | fixed-rate-clocks { |
| 36 | oscclk { |
| 37 | compatible = "samsung,exynos5420-oscclk"; |
| 38 | clock-frequency = <24000000>; |
| 39 | }; |
| 40 | }; |
| 41 | |
| 42 | emmc_pwrseq: pwrseq { |
| 43 | pinctrl-0 = <&emmc_nrst_pin>; |
| 44 | pinctrl-names = "default"; |
| 45 | compatible = "mmc-pwrseq-emmc"; |
| 46 | reset-gpios = <&gpd1 0 1>; |
| 47 | }; |
| 48 | |
| 49 | pwmleds { |
| 50 | compatible = "pwm-leds"; |
| 51 | |
| 52 | greenled { |
| 53 | label = "green:mmc0"; |
| 54 | pwms = <&pwm 1 2000000 0>; |
| 55 | pwm-names = "pwm1"; |
| 56 | /* |
| 57 | * Green LED is much brighter than the others |
| 58 | * so limit its max brightness |
| 59 | */ |
| 60 | max_brightness = <127>; |
| 61 | linux,default-trigger = "mmc0"; |
| 62 | }; |
| 63 | |
| 64 | blueled { |
| 65 | label = "blue:heartbeat"; |
| 66 | pwms = <&pwm 2 2000000 0>; |
| 67 | pwm-names = "pwm2"; |
| 68 | max_brightness = <255>; |
| 69 | linux,default-trigger = "heartbeat"; |
| 70 | }; |
| 71 | }; |
| 72 | |
| 73 | gpioleds { |
| 74 | compatible = "gpio-leds"; |
| 75 | redled { |
| 76 | label = "red:microSD"; |
| 77 | gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; |
| 78 | default-state = "off"; |
| 79 | linux,default-trigger = "mmc1"; |
| 80 | }; |
| 81 | }; |
| 82 | |
| 83 | sound: sound { |
| 84 | compatible = "simple-audio-card"; |
| 85 | |
| 86 | simple-audio-card,name = "Odroid-XU3"; |
| 87 | simple-audio-card,widgets = |
| 88 | "Headphone", "Headphone Jack", |
| 89 | "Speakers", "Speakers"; |
| 90 | simple-audio-card,routing = |
| 91 | "Headphone Jack", "HPL", |
| 92 | "Headphone Jack", "HPR", |
| 93 | "Headphone Jack", "MICBIAS", |
| 94 | "IN1", "Headphone Jack", |
| 95 | "Speakers", "SPKL", |
| 96 | "Speakers", "SPKR"; |
| 97 | |
| 98 | simple-audio-card,format = "i2s"; |
| 99 | simple-audio-card,bitclock-master = <&link0_codec>; |
| 100 | simple-audio-card,frame-master = <&link0_codec>; |
| 101 | |
| 102 | simple-audio-card,cpu { |
| 103 | sound-dai = <&i2s0 0>; |
| 104 | system-clock-frequency = <19200000>; |
| 105 | }; |
| 106 | |
| 107 | link0_codec: simple-audio-card,codec { |
| 108 | sound-dai = <&max98090>; |
| 109 | clocks = <&i2s0 CLK_I2S_CDCLK>; |
| 110 | }; |
| 111 | }; |
Anand Moon | b685d54 | 2015-06-15 12:23:20 +0930 | [diff] [blame] | 112 | |
| 113 | fan0: pwm-fan { |
| 114 | compatible = "pwm-fan"; |
| 115 | pwms = <&pwm 0 20972 0>; |
| 116 | cooling-min-state = <0>; |
| 117 | cooling-max-state = <3>; |
| 118 | #cooling-cells = <2>; |
| 119 | cooling-levels = <0 130 170 230>; |
| 120 | }; |
Krzysztof Kozlowski | 3a7c01d | 2015-05-25 21:13:17 +0900 | [diff] [blame] | 121 | }; |
| 122 | |
| 123 | &clock_audss { |
| 124 | assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, |
| 125 | <&clock_audss EXYNOS_MOUT_I2S>, |
| 126 | <&clock_audss EXYNOS_DOUT_AUD_BUS>; |
| 127 | assigned-clock-parents = <&clock CLK_FIN_PLL>, |
| 128 | <&clock_audss EXYNOS_MOUT_AUDSS>; |
| 129 | assigned-clock-rates = <0>, |
| 130 | <0>, |
| 131 | <19200000>; |
| 132 | }; |
| 133 | |
| 134 | &fimd { |
| 135 | status = "okay"; |
| 136 | }; |
| 137 | |
| 138 | |
| 139 | &hdmi { |
| 140 | status = "okay"; |
| 141 | hpd-gpio = <&gpx3 7 0>; |
| 142 | pinctrl-names = "default"; |
| 143 | pinctrl-0 = <&hdmi_hpd_irq>; |
| 144 | |
| 145 | vdd_osc-supply = <&ldo7_reg>; |
| 146 | vdd_pll-supply = <&ldo6_reg>; |
| 147 | vdd-supply = <&ldo6_reg>; |
| 148 | }; |
| 149 | |
| 150 | &hsi2c_4 { |
| 151 | status = "okay"; |
| 152 | |
| 153 | s2mps11_pmic@66 { |
| 154 | compatible = "samsung,s2mps11-pmic"; |
| 155 | reg = <0x66>; |
| 156 | s2mps11,buck2-ramp-delay = <12>; |
| 157 | s2mps11,buck34-ramp-delay = <12>; |
| 158 | s2mps11,buck16-ramp-delay = <12>; |
| 159 | s2mps11,buck6-ramp-enable = <1>; |
| 160 | s2mps11,buck2-ramp-enable = <1>; |
| 161 | s2mps11,buck3-ramp-enable = <1>; |
| 162 | s2mps11,buck4-ramp-enable = <1>; |
| 163 | |
| 164 | interrupt-parent = <&gpx0>; |
| 165 | interrupts = <4 IRQ_TYPE_EDGE_FALLING>; |
| 166 | pinctrl-names = "default"; |
| 167 | pinctrl-0 = <&s2mps11_irq>; |
| 168 | |
| 169 | s2mps11_osc: clocks { |
| 170 | #clock-cells = <1>; |
| 171 | clock-output-names = "s2mps11_ap", |
| 172 | "s2mps11_cp", "s2mps11_bt"; |
| 173 | }; |
| 174 | |
| 175 | regulators { |
| 176 | ldo1_reg: LDO1 { |
| 177 | regulator-name = "vdd_ldo1"; |
| 178 | regulator-min-microvolt = <1000000>; |
| 179 | regulator-max-microvolt = <1000000>; |
| 180 | regulator-always-on; |
| 181 | }; |
| 182 | |
| 183 | ldo3_reg: LDO3 { |
| 184 | regulator-name = "vdd_ldo3"; |
| 185 | regulator-min-microvolt = <1800000>; |
| 186 | regulator-max-microvolt = <1800000>; |
| 187 | regulator-always-on; |
| 188 | }; |
| 189 | |
| 190 | ldo5_reg: LDO5 { |
| 191 | regulator-name = "vdd_ldo5"; |
| 192 | regulator-min-microvolt = <1800000>; |
| 193 | regulator-max-microvolt = <1800000>; |
| 194 | regulator-always-on; |
| 195 | }; |
| 196 | |
| 197 | ldo6_reg: LDO6 { |
| 198 | regulator-name = "vdd_ldo6"; |
| 199 | regulator-min-microvolt = <1000000>; |
| 200 | regulator-max-microvolt = <1000000>; |
| 201 | regulator-always-on; |
| 202 | }; |
| 203 | |
| 204 | ldo7_reg: LDO7 { |
| 205 | regulator-name = "vdd_ldo7"; |
| 206 | regulator-min-microvolt = <1800000>; |
| 207 | regulator-max-microvolt = <1800000>; |
| 208 | regulator-always-on; |
| 209 | }; |
| 210 | |
| 211 | ldo8_reg: LDO8 { |
| 212 | regulator-name = "vdd_ldo8"; |
| 213 | regulator-min-microvolt = <1800000>; |
| 214 | regulator-max-microvolt = <1800000>; |
| 215 | regulator-always-on; |
| 216 | }; |
| 217 | |
| 218 | ldo9_reg: LDO9 { |
| 219 | regulator-name = "vdd_ldo9"; |
| 220 | regulator-min-microvolt = <3000000>; |
| 221 | regulator-max-microvolt = <3000000>; |
| 222 | regulator-always-on; |
| 223 | }; |
| 224 | |
| 225 | ldo10_reg: LDO10 { |
| 226 | regulator-name = "vdd_ldo10"; |
| 227 | regulator-min-microvolt = <1800000>; |
| 228 | regulator-max-microvolt = <1800000>; |
| 229 | regulator-always-on; |
| 230 | }; |
| 231 | |
| 232 | ldo11_reg: LDO11 { |
| 233 | regulator-name = "vdd_ldo11"; |
| 234 | regulator-min-microvolt = <1000000>; |
| 235 | regulator-max-microvolt = <1000000>; |
| 236 | regulator-always-on; |
| 237 | }; |
| 238 | |
| 239 | ldo12_reg: LDO12 { |
| 240 | regulator-name = "vdd_ldo12"; |
| 241 | regulator-min-microvolt = <1800000>; |
| 242 | regulator-max-microvolt = <1800000>; |
| 243 | regulator-always-on; |
| 244 | }; |
| 245 | |
| 246 | ldo13_reg: LDO13 { |
| 247 | regulator-name = "vdd_ldo13"; |
| 248 | regulator-min-microvolt = <2800000>; |
| 249 | regulator-max-microvolt = <2800000>; |
| 250 | regulator-always-on; |
| 251 | }; |
| 252 | |
| 253 | ldo15_reg: LDO15 { |
| 254 | regulator-name = "vdd_ldo15"; |
| 255 | regulator-min-microvolt = <3100000>; |
| 256 | regulator-max-microvolt = <3100000>; |
| 257 | regulator-always-on; |
| 258 | }; |
| 259 | |
| 260 | ldo16_reg: LDO16 { |
| 261 | regulator-name = "vdd_ldo16"; |
| 262 | regulator-min-microvolt = <2200000>; |
| 263 | regulator-max-microvolt = <2200000>; |
| 264 | regulator-always-on; |
| 265 | }; |
| 266 | |
| 267 | ldo17_reg: LDO17 { |
| 268 | regulator-name = "tsp_avdd"; |
| 269 | regulator-min-microvolt = <3300000>; |
| 270 | regulator-max-microvolt = <3300000>; |
| 271 | regulator-always-on; |
| 272 | }; |
| 273 | |
| 274 | ldo19_reg: LDO19 { |
| 275 | regulator-name = "vdd_sd"; |
| 276 | regulator-min-microvolt = <2800000>; |
| 277 | regulator-max-microvolt = <2800000>; |
| 278 | regulator-always-on; |
| 279 | }; |
| 280 | |
| 281 | ldo24_reg: LDO24 { |
| 282 | regulator-name = "tsp_io"; |
| 283 | regulator-min-microvolt = <2800000>; |
| 284 | regulator-max-microvolt = <2800000>; |
| 285 | regulator-always-on; |
| 286 | }; |
| 287 | |
| 288 | ldo26_reg: LDO26 { |
| 289 | regulator-name = "vdd_ldo26"; |
| 290 | regulator-min-microvolt = <3000000>; |
| 291 | regulator-max-microvolt = <3000000>; |
| 292 | regulator-always-on; |
| 293 | }; |
| 294 | |
| 295 | buck1_reg: BUCK1 { |
| 296 | regulator-name = "vdd_mif"; |
| 297 | regulator-min-microvolt = <800000>; |
| 298 | regulator-max-microvolt = <1300000>; |
| 299 | regulator-always-on; |
| 300 | regulator-boot-on; |
| 301 | }; |
| 302 | |
| 303 | buck2_reg: BUCK2 { |
| 304 | regulator-name = "vdd_arm"; |
| 305 | regulator-min-microvolt = <800000>; |
| 306 | regulator-max-microvolt = <1500000>; |
| 307 | regulator-always-on; |
| 308 | regulator-boot-on; |
| 309 | }; |
| 310 | |
| 311 | buck3_reg: BUCK3 { |
| 312 | regulator-name = "vdd_int"; |
| 313 | regulator-min-microvolt = <800000>; |
| 314 | regulator-max-microvolt = <1400000>; |
| 315 | regulator-always-on; |
| 316 | regulator-boot-on; |
| 317 | }; |
| 318 | |
| 319 | buck4_reg: BUCK4 { |
| 320 | regulator-name = "vdd_g3d"; |
| 321 | regulator-min-microvolt = <800000>; |
| 322 | regulator-max-microvolt = <1400000>; |
| 323 | regulator-always-on; |
| 324 | regulator-boot-on; |
| 325 | }; |
| 326 | |
| 327 | buck5_reg: BUCK5 { |
| 328 | regulator-name = "vdd_mem"; |
| 329 | regulator-min-microvolt = <800000>; |
| 330 | regulator-max-microvolt = <1400000>; |
| 331 | regulator-always-on; |
| 332 | regulator-boot-on; |
| 333 | }; |
| 334 | |
| 335 | buck6_reg: BUCK6 { |
| 336 | regulator-name = "vdd_kfc"; |
| 337 | regulator-min-microvolt = <800000>; |
| 338 | regulator-max-microvolt = <1500000>; |
| 339 | regulator-always-on; |
| 340 | regulator-boot-on; |
| 341 | }; |
| 342 | |
| 343 | buck7_reg: BUCK7 { |
| 344 | regulator-name = "vdd_1.0v_ldo"; |
| 345 | regulator-min-microvolt = <800000>; |
| 346 | regulator-max-microvolt = <1500000>; |
| 347 | regulator-always-on; |
| 348 | regulator-boot-on; |
| 349 | }; |
| 350 | |
| 351 | buck8_reg: BUCK8 { |
| 352 | regulator-name = "vdd_1.8v_ldo"; |
| 353 | regulator-min-microvolt = <800000>; |
| 354 | regulator-max-microvolt = <1500000>; |
| 355 | regulator-always-on; |
| 356 | regulator-boot-on; |
| 357 | }; |
| 358 | |
| 359 | buck9_reg: BUCK9 { |
| 360 | regulator-name = "vdd_2.8v_ldo"; |
| 361 | regulator-min-microvolt = <3000000>; |
| 362 | regulator-max-microvolt = <3750000>; |
| 363 | regulator-always-on; |
| 364 | regulator-boot-on; |
| 365 | }; |
| 366 | |
| 367 | buck10_reg: BUCK10 { |
| 368 | regulator-name = "vdd_vmem"; |
| 369 | regulator-min-microvolt = <2850000>; |
| 370 | regulator-max-microvolt = <2850000>; |
| 371 | regulator-always-on; |
| 372 | regulator-boot-on; |
| 373 | }; |
| 374 | }; |
| 375 | }; |
| 376 | }; |
| 377 | |
| 378 | &hsi2c_5 { |
| 379 | status = "okay"; |
| 380 | max98090: max98090@10 { |
| 381 | compatible = "maxim,max98090"; |
| 382 | reg = <0x10>; |
| 383 | interrupt-parent = <&gpx3>; |
| 384 | interrupts = <2 0>; |
| 385 | clocks = <&i2s0 CLK_I2S_CDCLK>; |
| 386 | clock-names = "mclk"; |
| 387 | #sound-dai-cells = <0>; |
| 388 | }; |
| 389 | }; |
| 390 | |
| 391 | &i2c_2 { |
| 392 | samsung,i2c-sda-delay = <100>; |
| 393 | samsung,i2c-max-bus-freq = <66000>; |
| 394 | status = "okay"; |
| 395 | |
| 396 | hdmiddc@50 { |
| 397 | compatible = "samsung,exynos4210-hdmiddc"; |
| 398 | reg = <0x50>; |
| 399 | }; |
| 400 | }; |
| 401 | |
| 402 | &i2s0 { |
| 403 | status = "okay"; |
| 404 | }; |
| 405 | |
| 406 | &mfc { |
| 407 | samsung,mfc-r = <0x43000000 0x800000>; |
| 408 | samsung,mfc-l = <0x51000000 0x800000>; |
| 409 | }; |
| 410 | |
| 411 | &mmc_0 { |
| 412 | status = "okay"; |
| 413 | mmc-pwrseq = <&emmc_pwrseq>; |
| 414 | cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>; |
| 415 | card-detect-delay = <200>; |
| 416 | samsung,dw-mshc-ciu-div = <3>; |
| 417 | samsung,dw-mshc-sdr-timing = <0 4>; |
| 418 | samsung,dw-mshc-ddr-timing = <0 2>; |
| 419 | samsung,dw-mshc-hs400-timing = <0 2>; |
| 420 | samsung,read-strobe-delay = <90>; |
| 421 | pinctrl-names = "default"; |
| 422 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>; |
| 423 | bus-width = <8>; |
| 424 | cap-mmc-highspeed; |
| 425 | mmc-hs200-1_8v; |
| 426 | mmc-hs400-1_8v; |
| 427 | }; |
| 428 | |
| 429 | &mmc_2 { |
| 430 | status = "okay"; |
| 431 | card-detect-delay = <200>; |
| 432 | samsung,dw-mshc-ciu-div = <3>; |
| 433 | samsung,dw-mshc-sdr-timing = <0 4>; |
| 434 | samsung,dw-mshc-ddr-timing = <0 2>; |
| 435 | pinctrl-names = "default"; |
| 436 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
| 437 | bus-width = <4>; |
| 438 | cap-sd-highspeed; |
| 439 | }; |
| 440 | |
| 441 | &pinctrl_0 { |
| 442 | hdmi_hpd_irq: hdmi-hpd-irq { |
| 443 | samsung,pins = "gpx3-7"; |
| 444 | samsung,pin-function = <0>; |
| 445 | samsung,pin-pud = <1>; |
| 446 | samsung,pin-drv = <0>; |
| 447 | }; |
| 448 | |
| 449 | s2mps11_irq: s2mps11-irq { |
| 450 | samsung,pins = "gpx0-4"; |
| 451 | samsung,pin-function = <0xf>; |
| 452 | samsung,pin-pud = <0>; |
| 453 | samsung,pin-drv = <0>; |
| 454 | }; |
| 455 | }; |
| 456 | |
| 457 | &pinctrl_1 { |
| 458 | emmc_nrst_pin: emmc-nrst { |
| 459 | samsung,pins = "gpd1-0"; |
| 460 | samsung,pin-function = <0>; |
| 461 | samsung,pin-pud = <0>; |
| 462 | samsung,pin-drv = <0>; |
| 463 | }; |
| 464 | }; |
| 465 | |
| 466 | &pwm { |
| 467 | /* |
| 468 | * PWM 0 -- fan |
| 469 | * PWM 1 -- Green LED |
| 470 | * PWM 2 -- Blue LED |
| 471 | * PWM 3 -- on MIPI connector for backlight |
| 472 | */ |
| 473 | pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>; |
| 474 | pinctrl-names = "default"; |
Anand Moon | b685d54 | 2015-06-15 12:23:20 +0930 | [diff] [blame] | 475 | samsung,pwm-outputs = <0>; |
Krzysztof Kozlowski | 3a7c01d | 2015-05-25 21:13:17 +0900 | [diff] [blame] | 476 | status = "okay"; |
| 477 | }; |
| 478 | |
Anand Moon | 8e946a0 | 2015-06-15 12:23:21 +0930 | [diff] [blame] | 479 | &tmu_cpu0 { |
| 480 | vtmu-supply = <&ldo7_reg>; |
| 481 | status = "okay"; |
| 482 | }; |
| 483 | |
| 484 | &tmu_cpu1 { |
| 485 | vtmu-supply = <&ldo7_reg>; |
| 486 | status = "okay"; |
| 487 | }; |
| 488 | |
| 489 | &tmu_cpu2 { |
| 490 | vtmu-supply = <&ldo7_reg>; |
| 491 | status = "okay"; |
| 492 | }; |
| 493 | |
| 494 | &tmu_cpu3 { |
| 495 | vtmu-supply = <&ldo7_reg>; |
| 496 | status = "okay"; |
| 497 | }; |
| 498 | |
| 499 | &tmu_gpu { |
| 500 | vtmu-supply = <&ldo7_reg>; |
| 501 | status = "okay"; |
| 502 | }; |
| 503 | |
Krzysztof Kozlowski | 3a7c01d | 2015-05-25 21:13:17 +0900 | [diff] [blame] | 504 | &rtc { |
| 505 | status = "okay"; |
| 506 | clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; |
| 507 | clock-names = "rtc", "rtc_src"; |
| 508 | }; |
| 509 | |
| 510 | &usbdrd_dwc3_0 { |
| 511 | dr_mode = "host"; |
| 512 | }; |
| 513 | |
| 514 | &usbdrd_dwc3_1 { |
| 515 | dr_mode = "otg"; |
| 516 | }; |
Anand Moon | dc929d4 | 2015-06-07 21:23:47 +0930 | [diff] [blame] | 517 | |
| 518 | &usbdrd3_0 { |
| 519 | vdd33-supply = <&ldo9_reg>; |
| 520 | vdd10-supply = <&ldo11_reg>; |
| 521 | }; |
| 522 | |
| 523 | &usbdrd3_1 { |
| 524 | vdd33-supply = <&ldo9_reg>; |
| 525 | vdd10-supply = <&ldo11_reg>; |
| 526 | }; |