blob: f8e6fe60adb33428291086c965f4ce389c0de1a7 [file] [log] [blame]
Ghanim Fodi2c8ba072017-01-12 15:14:15 +02001/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
Amir Levy9659e592016-10-27 18:08:27 +03002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef _IPA3_I_H_
14#define _IPA3_I_H_
15
16#include <linux/bitops.h>
17#include <linux/cdev.h>
18#include <linux/export.h>
19#include <linux/idr.h>
20#include <linux/list.h>
21#include <linux/mutex.h>
22#include <linux/skbuff.h>
23#include <linux/slab.h>
24#include <linux/ipa.h>
25#include <linux/ipa_usb.h>
Amir Levy9659e592016-10-27 18:08:27 +030026#include <asm/dma-iommu.h>
27#include <linux/iommu.h>
28#include <linux/platform_device.h>
29#include <linux/firmware.h>
30#include "ipa_hw_defs.h"
31#include "ipa_qmi_service.h"
32#include "../ipa_api.h"
33#include "ipahal/ipahal_reg.h"
34#include "ipahal/ipahal.h"
35#include "ipahal/ipahal_fltrt.h"
36#include "../ipa_common_i.h"
37#include "ipa_uc_offload_i.h"
38
39#define DRV_NAME "ipa"
40#define NAT_DEV_NAME "ipaNatTable"
41#define IPA_COOKIE 0x57831603
Mohammed Javid93e94ce2017-06-15 15:39:04 +053042#define IPA_RT_RULE_COOKIE 0x57831604
43#define IPA_RT_TBL_COOKIE 0x57831605
44#define IPA_FLT_COOKIE 0x57831606
45#define IPA_HDR_COOKIE 0x57831607
46#define IPA_PROC_HDR_COOKIE 0x57831608
47
Amir Levy9659e592016-10-27 18:08:27 +030048#define MTU_BYTE 1500
49
Skylar Chang652ee8e2017-02-10 11:40:30 -080050#define IPA_EP_NOT_ALLOCATED (-1)
Amir Levy9659e592016-10-27 18:08:27 +030051#define IPA3_MAX_NUM_PIPES 31
Amir Levy9659e592016-10-27 18:08:27 +030052#define IPA_SYS_DESC_FIFO_SZ 0x800
53#define IPA_SYS_TX_DATA_DESC_FIFO_SZ 0x1000
Skylar Changd407e592017-03-30 11:25:30 -070054#define IPA_COMMON_EVENT_RING_SIZE 0x7C00
Amir Levy9659e592016-10-27 18:08:27 +030055#define IPA_LAN_RX_HEADER_LENGTH (2)
56#define IPA_QMAP_HEADER_LENGTH (4)
57#define IPA_DL_CHECKSUM_LENGTH (8)
58#define IPA_NUM_DESC_PER_SW_TX (3)
59#define IPA_GENERIC_RX_POOL_SZ 192
60#define IPA_UC_FINISH_MAX 6
61#define IPA_UC_WAIT_MIN_SLEEP 1000
62#define IPA_UC_WAII_MAX_SLEEP 1200
Sunil Paidimarri226cf032016-10-14 13:33:08 -070063/*
64 * The transport descriptor size was changed to GSI_CHAN_RE_SIZE_16B, but
65 * IPA users still use sps_iovec size as FIFO element size.
66 */
67#define IPA_FIFO_ELEMENT_SIZE 8
Amir Levy9659e592016-10-27 18:08:27 +030068
69#define IPA_MAX_STATUS_STAT_NUM 30
70
71#define IPA_IPC_LOG_PAGES 50
72
73#define IPADBG(fmt, args...) \
74 do { \
75 pr_debug(DRV_NAME " %s:%d " fmt, __func__, __LINE__, ## args);\
76 if (ipa3_ctx) { \
77 IPA_IPC_LOGGING(ipa3_ctx->logbuf, \
78 DRV_NAME " %s:%d " fmt, ## args); \
79 IPA_IPC_LOGGING(ipa3_ctx->logbuf_low, \
80 DRV_NAME " %s:%d " fmt, ## args); \
81 } \
82 } while (0)
83
84#define IPADBG_LOW(fmt, args...) \
85 do { \
86 pr_debug(DRV_NAME " %s:%d " fmt, __func__, __LINE__, ## args);\
87 if (ipa3_ctx) \
88 IPA_IPC_LOGGING(ipa3_ctx->logbuf_low, \
89 DRV_NAME " %s:%d " fmt, ## args); \
90 } while (0)
91
92#define IPAERR(fmt, args...) \
93 do { \
94 pr_err(DRV_NAME " %s:%d " fmt, __func__, __LINE__, ## args);\
95 if (ipa3_ctx) { \
96 IPA_IPC_LOGGING(ipa3_ctx->logbuf, \
97 DRV_NAME " %s:%d " fmt, ## args); \
98 IPA_IPC_LOGGING(ipa3_ctx->logbuf_low, \
99 DRV_NAME " %s:%d " fmt, ## args); \
100 } \
101 } while (0)
102
103#define WLAN_AMPDU_TX_EP 15
104#define WLAN_PROD_TX_EP 19
105#define WLAN1_CONS_RX_EP 14
106#define WLAN2_CONS_RX_EP 16
107#define WLAN3_CONS_RX_EP 17
108#define WLAN4_CONS_RX_EP 18
109
110#define IPA_RAM_NAT_OFST 0
111#define IPA_RAM_NAT_SIZE 0
112#define IPA_MEM_CANARY_VAL 0xdeadbeef
113
114#define IPA_STATS
115
116#ifdef IPA_STATS
117#define IPA_STATS_INC_CNT(val) (++val)
118#define IPA_STATS_DEC_CNT(val) (--val)
119#define IPA_STATS_EXCP_CNT(__excp, __base) do { \
120 if (__excp < 0 || __excp >= IPAHAL_PKT_STATUS_EXCEPTION_MAX) \
121 break; \
122 ++__base[__excp]; \
123 } while (0)
124#else
125#define IPA_STATS_INC_CNT(x) do { } while (0)
126#define IPA_STATS_DEC_CNT(x)
127#define IPA_STATS_EXCP_CNT(__excp, __base) do { } while (0)
128#endif
129
130#define IPA_HDR_BIN0 0
131#define IPA_HDR_BIN1 1
132#define IPA_HDR_BIN2 2
133#define IPA_HDR_BIN3 3
134#define IPA_HDR_BIN4 4
135#define IPA_HDR_BIN_MAX 5
136
137#define IPA_HDR_PROC_CTX_BIN0 0
138#define IPA_HDR_PROC_CTX_BIN1 1
139#define IPA_HDR_PROC_CTX_BIN_MAX 2
140
Amir Levy9659e592016-10-27 18:08:27 +0300141#define IPA_RX_POOL_CEIL 32
142#define IPA_RX_SKB_SIZE 1792
143
144#define IPA_A5_MUX_HDR_NAME "ipa_excp_hdr"
145#define IPA_LAN_RX_HDR_NAME "ipa_lan_hdr"
146#define IPA_INVALID_L4_PROTOCOL 0xFF
147
Amir Levy9659e592016-10-27 18:08:27 +0300148#define IPA_HDR_PROC_CTX_TABLE_ALIGNMENT_BYTE 8
149#define IPA_HDR_PROC_CTX_TABLE_ALIGNMENT(start_ofst) \
150 (((start_ofst) + IPA_HDR_PROC_CTX_TABLE_ALIGNMENT_BYTE - 1) & \
151 ~(IPA_HDR_PROC_CTX_TABLE_ALIGNMENT_BYTE - 1))
152
153#define MAX_RESOURCE_TO_CLIENTS (IPA_CLIENT_MAX)
154#define IPA_MEM_PART(x_) (ipa3_ctx->ctrl->mem_partition.x_)
155
156#define IPA_GSI_CHANNEL_STOP_MAX_RETRY 10
157#define IPA_GSI_CHANNEL_STOP_PKT_SIZE 1
158
159#define IPA_GSI_CHANNEL_EMPTY_MAX_RETRY 15
160#define IPA_GSI_CHANNEL_EMPTY_SLEEP_MIN_USEC (1000)
161#define IPA_GSI_CHANNEL_EMPTY_SLEEP_MAX_USEC (2000)
162
163#define IPA_SLEEP_CLK_RATE_KHZ (32)
164
165#define IPA3_ACTIVE_CLIENTS_LOG_BUFFER_SIZE_LINES 120
166#define IPA3_ACTIVE_CLIENTS_LOG_LINE_LEN 96
167#define IPA3_ACTIVE_CLIENTS_LOG_HASHTABLE_SIZE 50
168#define IPA3_ACTIVE_CLIENTS_LOG_NAME_LEN 40
169
170struct ipa3_active_client_htable_entry {
171 struct hlist_node list;
172 char id_string[IPA3_ACTIVE_CLIENTS_LOG_NAME_LEN];
173 int count;
174 enum ipa_active_client_log_type type;
175};
176
177struct ipa3_active_clients_log_ctx {
178 char *log_buffer[IPA3_ACTIVE_CLIENTS_LOG_BUFFER_SIZE_LINES];
179 int log_head;
180 int log_tail;
181 bool log_rdy;
182 struct hlist_head htable[IPA3_ACTIVE_CLIENTS_LOG_HASHTABLE_SIZE];
183};
184
185struct ipa3_client_names {
186 enum ipa_client_type names[MAX_RESOURCE_TO_CLIENTS];
187 int length;
188};
189
190struct ipa_smmu_cb_ctx {
191 bool valid;
192 struct device *dev;
193 struct dma_iommu_mapping *mapping;
194 struct iommu_domain *iommu;
195 unsigned long next_addr;
196 u32 va_start;
197 u32 va_size;
198 u32 va_end;
199};
200
201/**
202 * struct ipa3_flt_entry - IPA filtering table entry
203 * @link: entry's link in global filtering enrties list
204 * @rule: filter rule
205 * @cookie: cookie used for validity check
206 * @tbl: filter table
207 * @rt_tbl: routing table
208 * @hw_len: entry's size
209 * @id: rule handle - globally unique
210 * @prio: rule 10bit priority which defines the order of the rule
211 * among other rules at the same integrated table
212 * @rule_id: rule 10bit ID to be returned in packet status
213 */
214struct ipa3_flt_entry {
215 struct list_head link;
Amir Levy9659e592016-10-27 18:08:27 +0300216 u32 cookie;
Mohammed Javid93e94ce2017-06-15 15:39:04 +0530217 struct ipa_flt_rule rule;
Amir Levy9659e592016-10-27 18:08:27 +0300218 struct ipa3_flt_tbl *tbl;
219 struct ipa3_rt_tbl *rt_tbl;
220 u32 hw_len;
221 int id;
222 u16 prio;
223 u16 rule_id;
224};
225
226/**
227 * struct ipa3_rt_tbl - IPA routing table
228 * @link: table's link in global routing tables list
229 * @head_rt_rule_list: head of routing rules list
230 * @name: routing table name
231 * @idx: routing table index
232 * @rule_cnt: number of rules in routing table
233 * @ref_cnt: reference counter of routing table
234 * @set: collection of routing tables
235 * @cookie: cookie used for validity check
236 * @in_sys: flag indicating if the table is located in system memory
237 * @sz: the size of the routing table
238 * @curr_mem: current routing tables block in sys memory
239 * @prev_mem: previous routing table block in sys memory
240 * @id: routing table id
241 * @rule_ids: idr structure that holds the rule_id for each rule
242 */
243struct ipa3_rt_tbl {
244 struct list_head link;
Mohammed Javid93e94ce2017-06-15 15:39:04 +0530245 u32 cookie;
Amir Levy9659e592016-10-27 18:08:27 +0300246 struct list_head head_rt_rule_list;
247 char name[IPA_RESOURCE_NAME_MAX];
248 u32 idx;
249 u32 rule_cnt;
250 u32 ref_cnt;
251 struct ipa3_rt_tbl_set *set;
Amir Levy9659e592016-10-27 18:08:27 +0300252 bool in_sys[IPA_RULE_TYPE_MAX];
253 u32 sz[IPA_RULE_TYPE_MAX];
254 struct ipa_mem_buffer curr_mem[IPA_RULE_TYPE_MAX];
255 struct ipa_mem_buffer prev_mem[IPA_RULE_TYPE_MAX];
256 int id;
257 struct idr rule_ids;
258};
259
260/**
261 * struct ipa3_hdr_entry - IPA header table entry
262 * @link: entry's link in global header table entries list
263 * @hdr: the header
264 * @hdr_len: header length
265 * @name: name of header table entry
266 * @type: l2 header type
267 * @is_partial: flag indicating if header table entry is partial
268 * @is_hdr_proc_ctx: false - hdr entry resides in hdr table,
269 * true - hdr entry resides in DDR and pointed to by proc ctx
270 * @phys_base: physical address of entry in DDR when is_hdr_proc_ctx is true,
271 * else 0
272 * @proc_ctx: processing context header
273 * @offset_entry: entry's offset
274 * @cookie: cookie used for validity check
275 * @ref_cnt: reference counter of routing table
276 * @id: header entry id
277 * @is_eth2_ofst_valid: is eth2_ofst field valid?
278 * @eth2_ofst: offset to start of Ethernet-II/802.3 header
Ghanim Fodi2c8ba072017-01-12 15:14:15 +0200279 * @user_deleted: is the header deleted by the user?
Amir Levy9659e592016-10-27 18:08:27 +0300280 */
281struct ipa3_hdr_entry {
282 struct list_head link;
Mohammed Javid93e94ce2017-06-15 15:39:04 +0530283 u32 cookie;
Amir Levy9659e592016-10-27 18:08:27 +0300284 u8 hdr[IPA_HDR_MAX_SIZE];
285 u32 hdr_len;
286 char name[IPA_RESOURCE_NAME_MAX];
287 enum ipa_hdr_l2_type type;
288 u8 is_partial;
289 bool is_hdr_proc_ctx;
290 dma_addr_t phys_base;
291 struct ipa3_hdr_proc_ctx_entry *proc_ctx;
292 struct ipa_hdr_offset_entry *offset_entry;
Amir Levy9659e592016-10-27 18:08:27 +0300293 u32 ref_cnt;
294 int id;
295 u8 is_eth2_ofst_valid;
296 u16 eth2_ofst;
Ghanim Fodi2c8ba072017-01-12 15:14:15 +0200297 bool user_deleted;
Amir Levy9659e592016-10-27 18:08:27 +0300298};
299
300/**
301 * struct ipa3_hdr_tbl - IPA header table
302 * @head_hdr_entry_list: header entries list
303 * @head_offset_list: header offset list
304 * @head_free_offset_list: header free offset list
305 * @hdr_cnt: number of headers
306 * @end: the last header index
307 */
308struct ipa3_hdr_tbl {
309 struct list_head head_hdr_entry_list;
310 struct list_head head_offset_list[IPA_HDR_BIN_MAX];
311 struct list_head head_free_offset_list[IPA_HDR_BIN_MAX];
312 u32 hdr_cnt;
313 u32 end;
314};
315
316/**
317 * struct ipa3_hdr_offset_entry - IPA header offset entry
318 * @link: entry's link in global processing context header offset entries list
319 * @offset: the offset
320 * @bin: bin
321 */
322struct ipa3_hdr_proc_ctx_offset_entry {
323 struct list_head link;
324 u32 offset;
325 u32 bin;
326};
327
328/**
329 * struct ipa3_hdr_proc_ctx_entry - IPA processing context header table entry
330 * @link: entry's link in global header table entries list
Skylar Chang7fa22712017-04-03 18:29:21 -0700331 * @type: header processing context type
332 * @l2tp_params: L2TP parameters
Amir Levy9659e592016-10-27 18:08:27 +0300333 * @offset_entry: entry's offset
334 * @hdr: the header
335 * @cookie: cookie used for validity check
336 * @ref_cnt: reference counter of routing table
337 * @id: processing context header entry id
Ghanim Fodi2c8ba072017-01-12 15:14:15 +0200338 * @user_deleted: is the hdr processing context deleted by the user?
Amir Levy9659e592016-10-27 18:08:27 +0300339 */
340struct ipa3_hdr_proc_ctx_entry {
341 struct list_head link;
Mohammed Javid93e94ce2017-06-15 15:39:04 +0530342 u32 cookie;
Amir Levy9659e592016-10-27 18:08:27 +0300343 enum ipa_hdr_proc_type type;
Skylar Chang7fa22712017-04-03 18:29:21 -0700344 union ipa_l2tp_hdr_proc_ctx_params l2tp_params;
Amir Levy9659e592016-10-27 18:08:27 +0300345 struct ipa3_hdr_proc_ctx_offset_entry *offset_entry;
346 struct ipa3_hdr_entry *hdr;
Amir Levy9659e592016-10-27 18:08:27 +0300347 u32 ref_cnt;
348 int id;
Ghanim Fodi2c8ba072017-01-12 15:14:15 +0200349 bool user_deleted;
Amir Levy9659e592016-10-27 18:08:27 +0300350};
351
352/**
353 * struct ipa3_hdr_proc_ctx_tbl - IPA processing context header table
354 * @head_proc_ctx_entry_list: header entries list
355 * @head_offset_list: header offset list
356 * @head_free_offset_list: header free offset list
357 * @proc_ctx_cnt: number of processing context headers
358 * @end: the last processing context header index
359 * @start_offset: offset in words of processing context header table
360 */
361struct ipa3_hdr_proc_ctx_tbl {
362 struct list_head head_proc_ctx_entry_list;
363 struct list_head head_offset_list[IPA_HDR_PROC_CTX_BIN_MAX];
364 struct list_head head_free_offset_list[IPA_HDR_PROC_CTX_BIN_MAX];
365 u32 proc_ctx_cnt;
366 u32 end;
367 u32 start_offset;
368};
369
370/**
371 * struct ipa3_flt_tbl - IPA filter table
372 * @head_flt_rule_list: filter rules list
373 * @rule_cnt: number of filter rules
374 * @in_sys: flag indicating if filter table is located in system memory
375 * @sz: the size of the filter tables
376 * @end: the last header index
377 * @curr_mem: current filter tables block in sys memory
378 * @prev_mem: previous filter table block in sys memory
379 * @rule_ids: idr structure that holds the rule_id for each rule
380 */
381struct ipa3_flt_tbl {
382 struct list_head head_flt_rule_list;
383 u32 rule_cnt;
384 bool in_sys[IPA_RULE_TYPE_MAX];
385 u32 sz[IPA_RULE_TYPE_MAX];
386 struct ipa_mem_buffer curr_mem[IPA_RULE_TYPE_MAX];
387 struct ipa_mem_buffer prev_mem[IPA_RULE_TYPE_MAX];
388 bool sticky_rear;
389 struct idr rule_ids;
390};
391
392/**
393 * struct ipa3_rt_entry - IPA routing table entry
394 * @link: entry's link in global routing table entries list
395 * @rule: routing rule
396 * @cookie: cookie used for validity check
397 * @tbl: routing table
398 * @hdr: header table
399 * @proc_ctx: processing context table
400 * @hw_len: the length of the table
401 * @id: rule handle - globaly unique
402 * @prio: rule 10bit priority which defines the order of the rule
403 * among other rules at the integrated same table
404 * @rule_id: rule 10bit ID to be returned in packet status
405 */
406struct ipa3_rt_entry {
407 struct list_head link;
Amir Levy9659e592016-10-27 18:08:27 +0300408 u32 cookie;
Mohammed Javid93e94ce2017-06-15 15:39:04 +0530409 struct ipa_rt_rule rule;
Amir Levy9659e592016-10-27 18:08:27 +0300410 struct ipa3_rt_tbl *tbl;
411 struct ipa3_hdr_entry *hdr;
412 struct ipa3_hdr_proc_ctx_entry *proc_ctx;
413 u32 hw_len;
414 int id;
415 u16 prio;
416 u16 rule_id;
417};
418
419/**
420 * struct ipa3_rt_tbl_set - collection of routing tables
421 * @head_rt_tbl_list: collection of routing tables
422 * @tbl_cnt: number of routing tables
423 */
424struct ipa3_rt_tbl_set {
425 struct list_head head_rt_tbl_list;
426 u32 tbl_cnt;
427};
428
429/**
430 * struct ipa3_wlan_stats - Wlan stats for each wlan endpoint
431 * @rx_pkts_rcvd: Packets sent by wlan driver
432 * @rx_pkts_status_rcvd: Status packets received from ipa hw
433 * @rx_hd_processed: Data Descriptors processed by IPA Driver
434 * @rx_hd_reply: Data Descriptors recycled by wlan driver
435 * @rx_hd_rcvd: Data Descriptors sent by wlan driver
436 * @rx_pkt_leak: Packet count that are not recycled
437 * @rx_dp_fail: Packets failed to transfer to IPA HW
438 * @tx_pkts_rcvd: SKB Buffers received from ipa hw
439 * @tx_pkts_sent: SKB Buffers sent to wlan driver
440 * @tx_pkts_dropped: Dropped packets count
441 */
442struct ipa3_wlan_stats {
443 u32 rx_pkts_rcvd;
444 u32 rx_pkts_status_rcvd;
445 u32 rx_hd_processed;
446 u32 rx_hd_reply;
447 u32 rx_hd_rcvd;
448 u32 rx_pkt_leak;
449 u32 rx_dp_fail;
450 u32 tx_pkts_rcvd;
451 u32 tx_pkts_sent;
452 u32 tx_pkts_dropped;
453};
454
455/**
456 * struct ipa3_wlan_comm_memb - Wlan comm members
457 * @wlan_spinlock: protects wlan comm buff list and its size
458 * @ipa_tx_mul_spinlock: protects tx dp mul transfer
459 * @wlan_comm_total_cnt: wlan common skb buffers allocated count
460 * @wlan_comm_free_cnt: wlan common skb buffer free count
461 * @total_tx_pkts_freed: Recycled Buffer count
462 * @wlan_comm_desc_list: wlan common skb buffer list
463 */
464struct ipa3_wlan_comm_memb {
465 spinlock_t wlan_spinlock;
466 spinlock_t ipa_tx_mul_spinlock;
467 u32 wlan_comm_total_cnt;
468 u32 wlan_comm_free_cnt;
469 u32 total_tx_pkts_freed;
470 struct list_head wlan_comm_desc_list;
471 atomic_t active_clnt_cnt;
472};
473
474struct ipa_gsi_ep_mem_info {
475 u16 evt_ring_len;
476 u64 evt_ring_base_addr;
477 void *evt_ring_base_vaddr;
478 u16 chan_ring_len;
479 u64 chan_ring_base_addr;
480 void *chan_ring_base_vaddr;
481};
482
483struct ipa3_status_stats {
484 struct ipahal_pkt_status status[IPA_MAX_STATUS_STAT_NUM];
Gidon Studinski3021a6f2016-11-10 12:48:48 +0200485 unsigned int curr;
Amir Levy9659e592016-10-27 18:08:27 +0300486};
487
488/**
489 * struct ipa3_ep_context - IPA end point context
490 * @valid: flag indicating id EP context is valid
491 * @client: EP client type
Amir Levy9659e592016-10-27 18:08:27 +0300492 * @gsi_chan_hdl: EP's GSI channel handle
493 * @gsi_evt_ring_hdl: EP's GSI channel event ring handle
494 * @gsi_mem_info: EP's GSI channel rings info
495 * @chan_scratch: EP's GSI channel scratch info
496 * @cfg: EP cionfiguration
497 * @dst_pipe_index: destination pipe index
498 * @rt_tbl_idx: routing table index
Amir Levy9659e592016-10-27 18:08:27 +0300499 * @priv: user provided information which will forwarded once the user is
500 * notified for new data avail
501 * @client_notify: user provided CB for EP events notification, the event is
502 * data revived.
Amir Levy9659e592016-10-27 18:08:27 +0300503 * @skip_ep_cfg: boolean field that determines if EP should be configured
504 * by IPA driver
505 * @keep_ipa_awake: when true, IPA will not be clock gated
506 * @disconnect_in_progress: Indicates client disconnect in progress.
507 * @qmi_request_sent: Indicates whether QMI request to enable clear data path
508 * request is sent or not.
509 * @napi_enabled: when true, IPA call client callback to start polling
510 */
511struct ipa3_ep_context {
512 int valid;
513 enum ipa_client_type client;
Amir Levy9659e592016-10-27 18:08:27 +0300514 unsigned long gsi_chan_hdl;
515 unsigned long gsi_evt_ring_hdl;
516 struct ipa_gsi_ep_mem_info gsi_mem_info;
517 union __packed gsi_channel_scratch chan_scratch;
518 bool bytes_xfered_valid;
519 u16 bytes_xfered;
520 dma_addr_t phys_base;
521 struct ipa_ep_cfg cfg;
522 struct ipa_ep_cfg_holb holb;
523 struct ipahal_reg_ep_cfg_status status;
524 u32 dst_pipe_index;
525 u32 rt_tbl_idx;
Amir Levy9659e592016-10-27 18:08:27 +0300526 void *priv;
527 void (*client_notify)(void *priv, enum ipa_dp_evt_type evt,
528 unsigned long data);
Amir Levy9659e592016-10-27 18:08:27 +0300529 atomic_t avail_fifo_desc;
530 u32 dflt_flt4_rule_hdl;
531 u32 dflt_flt6_rule_hdl;
532 bool skip_ep_cfg;
533 bool keep_ipa_awake;
534 struct ipa3_wlan_stats wstats;
535 u32 uc_offload_state;
536 bool disconnect_in_progress;
537 u32 qmi_request_sent;
538 bool napi_enabled;
Amir Levy9659e592016-10-27 18:08:27 +0300539 u32 eot_in_poll_err;
540
541 /* sys MUST be the last element of this struct */
542 struct ipa3_sys_context *sys;
543};
544
545/**
546 * ipa_usb_xdci_chan_params - xDCI channel related properties
547 *
548 * @ipa_ep_cfg: IPA EP configuration
549 * @client: type of "client"
550 * @priv: callback cookie
551 * @notify: callback
552 * priv - callback cookie evt - type of event data - data relevant
553 * to event. May not be valid. See event_type enum for valid
554 * cases.
555 * @skip_ep_cfg: boolean field that determines if EP should be
556 * configured by IPA driver
557 * @keep_ipa_awake: when true, IPA will not be clock gated
558 * @evt_ring_params: parameters for the channel's event ring
559 * @evt_scratch: parameters for the channel's event ring scratch
560 * @chan_params: parameters for the channel
561 * @chan_scratch: parameters for the channel's scratch
562 *
563 */
564struct ipa_request_gsi_channel_params {
565 struct ipa_ep_cfg ipa_ep_cfg;
566 enum ipa_client_type client;
567 void *priv;
568 ipa_notify_cb notify;
569 bool skip_ep_cfg;
570 bool keep_ipa_awake;
571 struct gsi_evt_ring_props evt_ring_params;
572 union __packed gsi_evt_scratch evt_scratch;
573 struct gsi_chan_props chan_params;
574 union __packed gsi_channel_scratch chan_scratch;
575};
576
577enum ipa3_sys_pipe_policy {
578 IPA_POLICY_INTR_MODE,
579 IPA_POLICY_NOINTR_MODE,
580 IPA_POLICY_INTR_POLL_MODE,
581};
582
583struct ipa3_repl_ctx {
584 struct ipa3_rx_pkt_wrapper **cache;
585 atomic_t head_idx;
586 atomic_t tail_idx;
587 u32 capacity;
588};
589
590/**
Amir Levya59ed3f2017-03-05 17:30:55 +0200591 * struct ipa3_sys_context - IPA GPI pipes context
Amir Levy9659e592016-10-27 18:08:27 +0300592 * @head_desc_list: header descriptors list
593 * @len: the size of the above list
594 * @spinlock: protects the list and its size
Amir Levy9659e592016-10-27 18:08:27 +0300595 * @ep: IPA EP context
596 *
Amir Levya59ed3f2017-03-05 17:30:55 +0200597 * IPA context specific to the GPI pipes a.k.a LAN IN/OUT and WAN
Amir Levy9659e592016-10-27 18:08:27 +0300598 */
599struct ipa3_sys_context {
600 u32 len;
Skylar Changd407e592017-03-30 11:25:30 -0700601 u32 len_pending_xfer;
Amir Levy9659e592016-10-27 18:08:27 +0300602 atomic_t curr_polling_state;
603 struct delayed_work switch_to_intr_work;
604 enum ipa3_sys_pipe_policy policy;
Skylar Changd407e592017-03-30 11:25:30 -0700605 bool use_comm_evt_ring;
Amir Levy9659e592016-10-27 18:08:27 +0300606 int (*pyld_hdlr)(struct sk_buff *skb, struct ipa3_sys_context *sys);
607 struct sk_buff * (*get_skb)(unsigned int len, gfp_t flags);
608 void (*free_skb)(struct sk_buff *skb);
609 void (*free_rx_wrapper)(struct ipa3_rx_pkt_wrapper *rk_pkt);
610 u32 rx_buff_sz;
611 u32 rx_pool_sz;
612 struct sk_buff *prev_skb;
613 unsigned int len_rem;
614 unsigned int len_pad;
615 unsigned int len_partial;
616 bool drop_packet;
617 struct work_struct work;
Amir Levy9659e592016-10-27 18:08:27 +0300618 struct delayed_work replenish_rx_work;
619 struct work_struct repl_work;
620 void (*repl_hdlr)(struct ipa3_sys_context *sys);
621 struct ipa3_repl_ctx repl;
622
623 /* ordering is important - mutable fields go above */
624 struct ipa3_ep_context *ep;
625 struct list_head head_desc_list;
626 struct list_head rcycl_list;
627 spinlock_t spinlock;
Skylar Changd407e592017-03-30 11:25:30 -0700628 struct hrtimer db_timer;
Amir Levy9659e592016-10-27 18:08:27 +0300629 struct workqueue_struct *wq;
630 struct workqueue_struct *repl_wq;
631 struct ipa3_status_stats *status_stat;
632 /* ordering is important - other immutable fields go below */
633};
634
635/**
636 * enum ipa3_desc_type - IPA decriptors type
637 *
638 * IPA decriptors type, IPA supports DD and ICD but no CD
639 */
640enum ipa3_desc_type {
641 IPA_DATA_DESC,
642 IPA_DATA_DESC_SKB,
643 IPA_DATA_DESC_SKB_PAGED,
644 IPA_IMM_CMD_DESC,
645};
646
647/**
648 * struct ipa3_tx_pkt_wrapper - IPA Tx packet wrapper
649 * @type: specify if this packet is for the skb or immediate command
650 * @mem: memory buffer used by this Tx packet
651 * @work: work struct for current Tx packet
652 * @link: linked to the wrappers on that pipe
653 * @callback: IPA client provided callback
654 * @user1: cookie1 for above callback
655 * @user2: cookie2 for above callback
656 * @sys: corresponding IPA sys context
Amir Levy9659e592016-10-27 18:08:27 +0300657 * @cnt: 1 for single transfers,
658 * >1 and <0xFFFF for first of a "multiple" transfer,
659 * 0xFFFF for last desc, 0 for rest of "multiple' transfer
660 * @bounce: va of bounce buffer
661 * @unmap_dma: in case this is true, the buffer will not be dma unmapped
662 *
663 * This struct can wrap both data packet and immediate command packet.
664 */
665struct ipa3_tx_pkt_wrapper {
666 enum ipa3_desc_type type;
667 struct ipa_mem_buffer mem;
668 struct work_struct work;
669 struct list_head link;
670 void (*callback)(void *user1, int user2);
671 void *user1;
672 int user2;
673 struct ipa3_sys_context *sys;
Amir Levy9659e592016-10-27 18:08:27 +0300674 u32 cnt;
675 void *bounce;
676 bool no_unmap_dma;
677};
678
679/**
680 * struct ipa3_dma_xfer_wrapper - IPADMA transfer descr wrapper
681 * @phys_addr_src: physical address of the source data to copy
682 * @phys_addr_dest: physical address to store the copied data
683 * @len: len in bytes to copy
684 * @link: linked to the wrappers list on the proper(sync/async) cons pipe
685 * @xfer_done: completion object for sync_memcpy completion
686 * @callback: IPADMA client provided completion callback
687 * @user1: cookie1 for above callback
688 *
689 * This struct can wrap both sync and async memcpy transfers descriptors.
690 */
691struct ipa3_dma_xfer_wrapper {
692 u64 phys_addr_src;
693 u64 phys_addr_dest;
694 u16 len;
695 struct list_head link;
696 struct completion xfer_done;
697 void (*callback)(void *user1);
698 void *user1;
699};
700
701/**
702 * struct ipa3_desc - IPA descriptor
703 * @type: skb or immediate command or plain old data
704 * @pyld: points to skb
705 * @frag: points to paged fragment
706 * or kmalloc'ed immediate command parameters/plain old data
707 * @dma_address: dma mapped address of pyld
708 * @dma_address_valid: valid field for dma_address
Michael Adisumartab5d170f2017-05-17 14:34:11 -0700709 * @is_tag_status: flag for IP_PACKET_TAG_STATUS imd cmd
Amir Levy9659e592016-10-27 18:08:27 +0300710 * @len: length of the pyld
711 * @opcode: for immediate commands
712 * @callback: IPA client provided completion callback
713 * @user1: cookie1 for above callback
714 * @user2: cookie2 for above callback
715 * @xfer_done: completion object for sync completion
Skylar Changd407e592017-03-30 11:25:30 -0700716 * @skip_db_ring: specifies whether GSI doorbell should not be rang
Amir Levy9659e592016-10-27 18:08:27 +0300717 */
718struct ipa3_desc {
719 enum ipa3_desc_type type;
720 void *pyld;
721 skb_frag_t *frag;
722 dma_addr_t dma_address;
723 bool dma_address_valid;
Michael Adisumartab5d170f2017-05-17 14:34:11 -0700724 bool is_tag_status;
Amir Levy9659e592016-10-27 18:08:27 +0300725 u16 len;
726 u16 opcode;
727 void (*callback)(void *user1, int user2);
728 void *user1;
729 int user2;
730 struct completion xfer_done;
Skylar Changd407e592017-03-30 11:25:30 -0700731 bool skip_db_ring;
Amir Levy9659e592016-10-27 18:08:27 +0300732};
733
734/**
735 * struct ipa3_rx_pkt_wrapper - IPA Rx packet wrapper
736 * @skb: skb
737 * @dma_address: DMA address of this Rx packet
738 * @link: linked to the Rx packets on that pipe
739 * @len: how many bytes are copied into skb's flat buffer
740 */
741struct ipa3_rx_pkt_wrapper {
742 struct list_head link;
743 struct ipa_rx_data data;
744 u32 len;
745 struct work_struct work;
746 struct ipa3_sys_context *sys;
747};
748
749/**
Amir Levy05fccd02017-06-13 16:25:45 +0300750* struct ipa_pdn_entry - IPA PDN config table entry
751* @public_ip: the PDN's public ip
752* @src_metadata: the PDN's metadata to be replaced for source NAT
753* @dst_metadata: the PDN's metadata to be replaced for destination NAT
754* @resrvd: reserved field
755*/
756struct ipa_pdn_entry {
757 u32 public_ip;
758 u32 src_metadata;
759 u32 dst_metadata;
760 u32 resrvd;
761};
762/**
Amir Levy9659e592016-10-27 18:08:27 +0300763 * struct ipa3_nat_mem - IPA NAT memory description
764 * @class: pointer to the struct class
765 * @dev: the dev_t of the device
766 * @cdev: cdev of the device
767 * @dev_num: device number
768 * @vaddr: virtual address
769 * @dma_handle: DMA handle
770 * @size: NAT memory size
771 * @is_mapped: flag indicating if NAT memory is mapped
772 * @is_sys_mem: flag indicating if NAT memory is sys memory
773 * @is_dev_init: flag indicating if NAT device is initialized
774 * @lock: NAT memory mutex
775 * @nat_base_address: nat table virutal address
776 * @ipv4_rules_addr: base nat table address
777 * @ipv4_expansion_rules_addr: expansion table address
778 * @index_table_addr: index table address
779 * @index_table_expansion_addr: index expansion table address
780 * @size_base_tables: base table size
781 * @size_expansion_tables: expansion table size
782 * @public_ip_addr: ip address of nat table
Amir Levy05fccd02017-06-13 16:25:45 +0300783 * @pdn_mem: pdn config table SW cache memory structure
Amir Levy9659e592016-10-27 18:08:27 +0300784 */
785struct ipa3_nat_mem {
786 struct class *class;
787 struct device *dev;
788 struct cdev cdev;
789 dev_t dev_num;
790 void *vaddr;
791 dma_addr_t dma_handle;
792 size_t size;
793 bool is_mapped;
794 bool is_sys_mem;
795 bool is_dev_init;
796 bool is_dev;
797 struct mutex lock;
798 void *nat_base_address;
799 char *ipv4_rules_addr;
800 char *ipv4_expansion_rules_addr;
801 char *index_table_addr;
802 char *index_table_expansion_addr;
803 u32 size_base_tables;
804 u32 size_expansion_tables;
805 u32 public_ip_addr;
806 void *tmp_vaddr;
807 dma_addr_t tmp_dma_handle;
808 bool is_tmp_mem;
Amir Levy05fccd02017-06-13 16:25:45 +0300809 struct ipa_mem_buffer pdn_mem;
Amir Levy9659e592016-10-27 18:08:27 +0300810};
811
812/**
813 * enum ipa3_hw_mode - IPA hardware mode
814 * @IPA_HW_Normal: Regular IPA hardware
815 * @IPA_HW_Virtual: IPA hardware supporting virtual memory allocation
816 * @IPA_HW_PCIE: IPA hardware supporting memory allocation over PCIE Bridge
817 */
818enum ipa3_hw_mode {
819 IPA_HW_MODE_NORMAL = 0,
820 IPA_HW_MODE_VIRTUAL = 1,
821 IPA_HW_MODE_PCIE = 2
822};
823
824enum ipa3_config_this_ep {
825 IPA_CONFIGURE_THIS_EP,
826 IPA_DO_NOT_CONFIGURE_THIS_EP,
827};
828
829struct ipa3_stats {
830 u32 tx_sw_pkts;
831 u32 tx_hw_pkts;
832 u32 rx_pkts;
833 u32 rx_excp_pkts[IPAHAL_PKT_STATUS_EXCEPTION_MAX];
834 u32 rx_repl_repost;
835 u32 tx_pkts_compl;
836 u32 rx_q_len;
837 u32 msg_w[IPA_EVENT_MAX_NUM];
838 u32 msg_r[IPA_EVENT_MAX_NUM];
839 u32 stat_compl;
840 u32 aggr_close;
841 u32 wan_aggr_close;
842 u32 wan_rx_empty;
843 u32 wan_repl_rx_empty;
844 u32 lan_rx_empty;
845 u32 lan_repl_rx_empty;
846 u32 flow_enable;
847 u32 flow_disable;
848 u32 tx_non_linear;
849};
850
851struct ipa3_active_clients {
852 struct mutex mutex;
Skylar Chang242952b2017-07-20 15:04:05 -0700853 atomic_t cnt;
Amir Levy9659e592016-10-27 18:08:27 +0300854};
855
856struct ipa3_wakelock_ref_cnt {
857 spinlock_t spinlock;
858 int cnt;
859};
860
861struct ipa3_tag_completion {
862 struct completion comp;
863 atomic_t cnt;
864};
865
866struct ipa3_controller;
867
868/**
869 * struct ipa3_uc_hdlrs - IPA uC callback functions
870 * @ipa_uc_loaded_hdlr: Function handler when uC is loaded
871 * @ipa_uc_event_hdlr: Event handler function
872 * @ipa3_uc_response_hdlr: Response handler function
873 * @ipa_uc_event_log_info_hdlr: Log event handler function
874 */
875struct ipa3_uc_hdlrs {
876 void (*ipa_uc_loaded_hdlr)(void);
877
878 void (*ipa_uc_event_hdlr)
879 (struct IpaHwSharedMemCommonMapping_t *uc_sram_mmio);
880
881 int (*ipa3_uc_response_hdlr)
882 (struct IpaHwSharedMemCommonMapping_t *uc_sram_mmio,
883 u32 *uc_status);
884
885 void (*ipa_uc_event_log_info_hdlr)
886 (struct IpaHwEventLogInfoData_t *uc_event_top_mmio);
887};
888
889/**
890 * enum ipa3_hw_flags - flags which defines the behavior of HW
891 *
892 * @IPA_HW_FLAG_HALT_SYSTEM_ON_ASSERT_FAILURE: Halt system in case of assert
893 * failure.
894 * @IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_ERORR: Channel error would be reported
895 * in the event ring only. No event to CPU.
896 * @IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_WAKE_UP: No need to report event
897 * IPA_HW_2_CPU_EVENT_MHI_WAKE_UP_REQUEST
898 * @IPA_HW_FLAG_WORK_OVER_DDR: Perform all transaction to external addresses by
899 * QMB (avoid memcpy)
900 * @IPA_HW_FLAG_NO_REPORT_OOB: If set do not report that the device is OOB in
901 * IN Channel
902 * @IPA_HW_FLAG_NO_REPORT_DB_MODE: If set, do not report that the device is
903 * entering a mode where it expects a doorbell to be rung for OUT Channel
904 * @IPA_HW_FLAG_NO_START_OOB_TIMER
905 */
906enum ipa3_hw_flags {
907 IPA_HW_FLAG_HALT_SYSTEM_ON_ASSERT_FAILURE = 0x01,
908 IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_ERORR = 0x02,
909 IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_WAKE_UP = 0x04,
910 IPA_HW_FLAG_WORK_OVER_DDR = 0x08,
911 IPA_HW_FLAG_NO_REPORT_OOB = 0x10,
912 IPA_HW_FLAG_NO_REPORT_DB_MODE = 0x20,
913 IPA_HW_FLAG_NO_START_OOB_TIMER = 0x40
914};
915
916/**
917 * struct ipa3_uc_ctx - IPA uC context
918 * @uc_inited: Indicates if uC interface has been initialized
919 * @uc_loaded: Indicates if uC has loaded
920 * @uc_failed: Indicates if uC has failed / returned an error
921 * @uc_lock: uC interface lock to allow only one uC interaction at a time
922 * @uc_spinlock: same as uc_lock but for irq contexts
923 * @uc_completation: Completion mechanism to wait for uC commands
924 * @uc_sram_mmio: Pointer to uC mapped memory
925 * @pending_cmd: The last command sent waiting to be ACKed
926 * @uc_status: The last status provided by the uC
927 * @uc_error_type: error type from uC error event
928 * @uc_error_timestamp: tag timer sampled after uC crashed
929 */
930struct ipa3_uc_ctx {
931 bool uc_inited;
932 bool uc_loaded;
933 bool uc_failed;
934 struct mutex uc_lock;
935 spinlock_t uc_spinlock;
936 struct completion uc_completion;
937 struct IpaHwSharedMemCommonMapping_t *uc_sram_mmio;
938 struct IpaHwEventLogInfoData_t *uc_event_top_mmio;
939 u32 uc_event_top_ofst;
940 u32 pending_cmd;
941 u32 uc_status;
942 u32 uc_error_type;
943 u32 uc_error_timestamp;
944 phys_addr_t rdy_ring_base_pa;
945 phys_addr_t rdy_ring_rp_pa;
946 u32 rdy_ring_size;
947 phys_addr_t rdy_comp_ring_base_pa;
948 phys_addr_t rdy_comp_ring_wp_pa;
949 u32 rdy_comp_ring_size;
950 u32 *rdy_ring_rp_va;
951 u32 *rdy_comp_ring_wp_va;
952};
953
954/**
955 * struct ipa3_uc_wdi_ctx
956 * @wdi_uc_top_ofst:
957 * @wdi_uc_top_mmio:
958 * @wdi_uc_stats_ofst:
959 * @wdi_uc_stats_mmio:
960 */
961struct ipa3_uc_wdi_ctx {
962 /* WDI specific fields */
963 u32 wdi_uc_stats_ofst;
964 struct IpaHwStatsWDIInfoData_t *wdi_uc_stats_mmio;
965 void *priv;
966 ipa_uc_ready_cb uc_ready_cb;
Skylar Chang6b41f8d2016-11-01 12:50:11 -0700967 /* for AP+STA stats update */
968#ifdef IPA_WAN_MSG_IPv6_ADDR_GW_LEN
969 ipa_wdi_meter_notifier_cb stats_notify;
970#endif
Amir Levy9659e592016-10-27 18:08:27 +0300971};
972
973/**
974 * struct ipa3_transport_pm - transport power management related members
Sridhar Ancha99b505b2016-04-21 23:11:10 +0530975 * @transport_pm_mutex: Mutex to protect the transport_pm functionality.
Amir Levy9659e592016-10-27 18:08:27 +0300976 */
977struct ipa3_transport_pm {
Amir Levy9659e592016-10-27 18:08:27 +0300978 atomic_t dec_clients;
979 atomic_t eot_activity;
Sridhar Ancha99b505b2016-04-21 23:11:10 +0530980 struct mutex transport_pm_mutex;
Amir Levy9659e592016-10-27 18:08:27 +0300981};
982
983/**
984 * struct ipa3cm_client_info - the client-info indicated from IPACM
985 * @ipacm_client_enum: the enum to indicate tether-client
986 * @ipacm_client_uplink: the bool to indicate pipe for uplink
987 */
988struct ipa3cm_client_info {
989 enum ipacm_client_enum client_enum;
990 bool uplink;
991};
992
993struct ipa3_smp2p_info {
994 u32 out_base_id;
995 u32 in_base_id;
Skylar Change1209942017-02-02 14:26:38 -0800996 bool ipa_clk_on;
Amir Levy9659e592016-10-27 18:08:27 +0300997 bool res_sent;
998};
999
1000/**
1001 * struct ipa3_ready_cb_info - A list of all the registrations
1002 * for an indication of IPA driver readiness
1003 *
1004 * @link: linked list link
1005 * @ready_cb: callback
1006 * @user_data: User data
1007 *
1008 */
1009struct ipa3_ready_cb_info {
1010 struct list_head link;
1011 ipa_ready_cb ready_cb;
1012 void *user_data;
1013};
1014
Gidon Studinski3021a6f2016-11-10 12:48:48 +02001015struct ipa_tz_unlock_reg_info {
1016 u64 reg_addr;
1017 u32 size;
1018};
1019
Skylar Chang6c4bec92017-04-21 16:10:14 -07001020struct ipa_dma_task_info {
1021 struct ipa_mem_buffer mem;
1022 struct ipahal_imm_cmd_pyld *cmd_pyld;
1023};
1024
Amir Levy9659e592016-10-27 18:08:27 +03001025/**
1026 * struct ipa3_context - IPA context
1027 * @class: pointer to the struct class
1028 * @dev_num: device number
1029 * @dev: the dev_t of the device
1030 * @cdev: cdev of the device
Amir Levy9659e592016-10-27 18:08:27 +03001031 * @ep: list of all end points
1032 * @skip_ep_cfg_shadow: state to update filter table correctly across
1033 power-save
1034 * @ep_flt_bitmap: End-points supporting filtering bitmap
1035 * @ep_flt_num: End-points supporting filtering number
Amir Levya59ed3f2017-03-05 17:30:55 +02001036 * @resume_on_connect: resume ep on ipa connect
Amir Levy9659e592016-10-27 18:08:27 +03001037 * @flt_tbl: list of all IPA filter tables
1038 * @mode: IPA operating mode
1039 * @mmio: iomem
1040 * @ipa_wrapper_base: IPA wrapper base address
1041 * @hdr_tbl: IPA header table
1042 * @hdr_proc_ctx_tbl: IPA processing context table
1043 * @rt_tbl_set: list of routing tables each of which is a list of rules
1044 * @reap_rt_tbl_set: list of sys mem routing tables waiting to be reaped
1045 * @flt_rule_cache: filter rule cache
1046 * @rt_rule_cache: routing rule cache
1047 * @hdr_cache: header cache
1048 * @hdr_offset_cache: header offset cache
1049 * @hdr_proc_ctx_cache: processing context cache
1050 * @hdr_proc_ctx_offset_cache: processing context offset cache
1051 * @rt_tbl_cache: routing table cache
1052 * @tx_pkt_wrapper_cache: Tx packets cache
1053 * @rx_pkt_wrapper_cache: Rx packets cache
1054 * @rt_idx_bitmap: routing table index bitmap
1055 * @lock: this does NOT protect the linked lists within ipa3_sys_context
1056 * @smem_sz: shared memory size available for SW use starting
1057 * from non-restricted bytes
1058 * @smem_restricted_bytes: the bytes that SW should not use in the shared mem
1059 * @nat_mem: NAT memory
1060 * @excp_hdr_hdl: exception header handle
1061 * @dflt_v4_rt_rule_hdl: default v4 routing rule handle
1062 * @dflt_v6_rt_rule_hdl: default v6 routing rule handle
1063 * @aggregation_type: aggregation type used on USB client endpoint
1064 * @aggregation_byte_limit: aggregation byte limit used on USB client endpoint
1065 * @aggregation_time_limit: aggregation time limit used on USB client endpoint
1066 * @hdr_tbl_lcl: where hdr tbl resides 1-local, 0-system
1067 * @hdr_proc_ctx_tbl_lcl: where proc_ctx tbl resides true-local, false-system
1068 * @hdr_mem: header memory
1069 * @hdr_proc_ctx_mem: processing context memory
1070 * @ip4_rt_tbl_lcl: where ip4 rt tables reside 1-local; 0-system
1071 * @ip6_rt_tbl_lcl: where ip6 rt tables reside 1-local; 0-system
1072 * @ip4_flt_tbl_lcl: where ip4 flt tables reside 1-local; 0-system
1073 * @ip6_flt_tbl_lcl: where ip6 flt tables reside 1-local; 0-system
1074 * @power_mgmt_wq: workqueue for power management
1075 * @transport_power_mgmt_wq: workqueue transport related power management
1076 * @tag_process_before_gating: indicates whether to start tag process before
1077 * gating IPA clocks
1078 * @transport_pm: transport power management related information
1079 * @disconnect_lock: protects LAN_CONS packet receive notification CB
Amir Levy9659e592016-10-27 18:08:27 +03001080 * @ipa3_active_clients: structure for reference counting connected IPA clients
1081 * @ipa_hw_type: type of IPA HW type (e.g. IPA 1.0, IPA 1.1 etc')
1082 * @ipa3_hw_mode: mode of IPA HW mode (e.g. Normal, Virtual or over PCIe)
1083 * @use_ipa_teth_bridge: use tethering bridge driver
Amir Levy9659e592016-10-27 18:08:27 +03001084 * @modem_cfg_emb_pipe_flt: modem configure embedded pipe filtering rules
1085 * @logbuf: ipc log buffer for high priority messages
1086 * @logbuf_low: ipc log buffer for low priority messages
1087 * @ipa_wdi2: using wdi-2.0
1088 * @use_64_bit_dma_mask: using 64bits dma mask
1089 * @ipa_bus_hdl: msm driver handle for the data path bus
1090 * @ctrl: holds the core specific operations based on
1091 * core version (vtable like)
Michael Adisumartab5d170f2017-05-17 14:34:11 -07001092 * @pkt_init_imm_opcode: opcode for IP_PACKET_INIT imm cmd
Amir Levy9659e592016-10-27 18:08:27 +03001093 * @enable_clock_scaling: clock scaling is enabled ?
Ghanim Fodi6a831342017-03-07 18:19:15 +02001094 * @curr_ipa_clk_rate: IPA current clock rate
Amir Levy9659e592016-10-27 18:08:27 +03001095 * @wcstats: wlan common buffer stats
1096 * @uc_ctx: uC interface context
1097 * @uc_wdi_ctx: WDI specific fields for uC interface
1098 * @ipa_num_pipes: The number of pipes used by IPA HW
1099 * @skip_uc_pipe_reset: Indicates whether pipe reset via uC needs to be avoided
1100 * @ipa_client_apps_wan_cons_agg_gro: RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA
1101 * @apply_rg10_wa: Indicates whether to use register group 10 workaround
1102 * @gsi_ch20_wa: Indicates whether to apply GSI physical channel 20 workaround
1103 * @w_lock: Indicates the wakeup source.
1104 * @wakelock_ref_cnt: Indicates the number of times wakelock is acquired
1105 * @ipa_initialization_complete: Indicates that IPA is fully initialized
1106 * @ipa_ready_cb_list: A list of all the clients who require a CB when IPA
1107 * driver is ready/initialized.
1108 * @init_completion_obj: Completion object to be used in case IPA driver hasn't
1109 * finished initializing. Example of use - IOCTLs to /dev/ipa
1110 * IPA context - holds all relevant info about IPA driver and its state
1111 */
1112struct ipa3_context {
1113 struct class *class;
1114 dev_t dev_num;
1115 struct device *dev;
1116 struct cdev cdev;
Amir Levy9659e592016-10-27 18:08:27 +03001117 struct ipa3_ep_context ep[IPA3_MAX_NUM_PIPES];
1118 bool skip_ep_cfg_shadow[IPA3_MAX_NUM_PIPES];
1119 u32 ep_flt_bitmap;
1120 u32 ep_flt_num;
1121 bool resume_on_connect[IPA_CLIENT_MAX];
1122 struct ipa3_flt_tbl flt_tbl[IPA3_MAX_NUM_PIPES][IPA_IP_MAX];
1123 void __iomem *mmio;
1124 u32 ipa_wrapper_base;
1125 u32 ipa_wrapper_size;
1126 struct ipa3_hdr_tbl hdr_tbl;
1127 struct ipa3_hdr_proc_ctx_tbl hdr_proc_ctx_tbl;
1128 struct ipa3_rt_tbl_set rt_tbl_set[IPA_IP_MAX];
1129 struct ipa3_rt_tbl_set reap_rt_tbl_set[IPA_IP_MAX];
1130 struct kmem_cache *flt_rule_cache;
1131 struct kmem_cache *rt_rule_cache;
1132 struct kmem_cache *hdr_cache;
1133 struct kmem_cache *hdr_offset_cache;
1134 struct kmem_cache *hdr_proc_ctx_cache;
1135 struct kmem_cache *hdr_proc_ctx_offset_cache;
1136 struct kmem_cache *rt_tbl_cache;
1137 struct kmem_cache *tx_pkt_wrapper_cache;
1138 struct kmem_cache *rx_pkt_wrapper_cache;
1139 unsigned long rt_idx_bitmap[IPA_IP_MAX];
1140 struct mutex lock;
1141 u16 smem_sz;
1142 u16 smem_restricted_bytes;
1143 u16 smem_reqd_sz;
1144 struct ipa3_nat_mem nat_mem;
1145 u32 excp_hdr_hdl;
1146 u32 dflt_v4_rt_rule_hdl;
1147 u32 dflt_v6_rt_rule_hdl;
1148 uint aggregation_type;
1149 uint aggregation_byte_limit;
1150 uint aggregation_time_limit;
1151 bool hdr_tbl_lcl;
1152 bool hdr_proc_ctx_tbl_lcl;
1153 struct ipa_mem_buffer hdr_mem;
1154 struct ipa_mem_buffer hdr_proc_ctx_mem;
1155 bool ip4_rt_tbl_hash_lcl;
1156 bool ip4_rt_tbl_nhash_lcl;
1157 bool ip6_rt_tbl_hash_lcl;
1158 bool ip6_rt_tbl_nhash_lcl;
1159 bool ip4_flt_tbl_hash_lcl;
1160 bool ip4_flt_tbl_nhash_lcl;
1161 bool ip6_flt_tbl_hash_lcl;
1162 bool ip6_flt_tbl_nhash_lcl;
Amir Levy9659e592016-10-27 18:08:27 +03001163 struct ipa3_active_clients ipa3_active_clients;
1164 struct ipa3_active_clients_log_ctx ipa3_active_clients_logging;
1165 struct workqueue_struct *power_mgmt_wq;
1166 struct workqueue_struct *transport_power_mgmt_wq;
1167 bool tag_process_before_gating;
1168 struct ipa3_transport_pm transport_pm;
Skylar Changd407e592017-03-30 11:25:30 -07001169 unsigned long gsi_evt_comm_hdl;
1170 u32 gsi_evt_comm_ring_rem;
Amir Levy9659e592016-10-27 18:08:27 +03001171 u32 clnt_hdl_cmd;
1172 u32 clnt_hdl_data_in;
1173 u32 clnt_hdl_data_out;
1174 spinlock_t disconnect_lock;
1175 u8 a5_pipe_index;
1176 struct list_head intf_list;
1177 struct list_head msg_list;
1178 struct list_head pull_msg_list;
1179 struct mutex msg_lock;
1180 wait_queue_head_t msg_waitq;
1181 enum ipa_hw_type ipa_hw_type;
1182 enum ipa3_hw_mode ipa3_hw_mode;
Amir Levy54fe4d32017-03-16 11:21:49 +02001183 bool ipa_config_is_mhi;
Amir Levy9659e592016-10-27 18:08:27 +03001184 bool use_ipa_teth_bridge;
Amir Levy9659e592016-10-27 18:08:27 +03001185 bool modem_cfg_emb_pipe_flt;
1186 bool ipa_wdi2;
1187 bool use_64_bit_dma_mask;
1188 /* featurize if memory footprint becomes a concern */
1189 struct ipa3_stats stats;
1190 void *smem_pipe_mem;
1191 void *logbuf;
1192 void *logbuf_low;
1193 u32 ipa_bus_hdl;
1194 struct ipa3_controller *ctrl;
1195 struct idr ipa_idr;
1196 struct device *pdev;
1197 struct device *uc_pdev;
1198 spinlock_t idr_lock;
1199 u32 enable_clock_scaling;
1200 u32 curr_ipa_clk_rate;
1201 bool q6_proxy_clk_vote_valid;
1202 u32 ipa_num_pipes;
Skylar Changcd3902d2017-03-27 18:08:27 -07001203 dma_addr_t pkt_init_imm[IPA3_MAX_NUM_PIPES];
Michael Adisumartab5d170f2017-05-17 14:34:11 -07001204 u32 pkt_init_imm_opcode;
Amir Levy9659e592016-10-27 18:08:27 +03001205
1206 struct ipa3_wlan_comm_memb wc_memb;
1207
1208 struct ipa3_uc_ctx uc_ctx;
1209
1210 struct ipa3_uc_wdi_ctx uc_wdi_ctx;
1211 struct ipa3_uc_ntn_ctx uc_ntn_ctx;
1212 u32 wan_rx_ring_size;
1213 u32 lan_rx_ring_size;
1214 bool skip_uc_pipe_reset;
Amir Levy9659e592016-10-27 18:08:27 +03001215 unsigned long gsi_dev_hdl;
1216 u32 ee;
1217 bool apply_rg10_wa;
1218 bool gsi_ch20_wa;
1219 bool smmu_present;
1220 bool smmu_s1_bypass;
Amir Levy9659e592016-10-27 18:08:27 +03001221 u32 wdi_map_cnt;
1222 struct wakeup_source w_lock;
1223 struct ipa3_wakelock_ref_cnt wakelock_ref_cnt;
1224 /* RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA */
1225 bool ipa_client_apps_wan_cons_agg_gro;
1226 /* M-release support to know client pipes */
1227 struct ipa3cm_client_info ipacm_client[IPA3_MAX_NUM_PIPES];
1228 bool tethered_flow_control;
1229 bool ipa_initialization_complete;
1230 struct list_head ipa_ready_cb_list;
1231 struct completion init_completion_obj;
Skylar Chang0c17c7d2016-10-31 09:57:54 -07001232 struct completion uc_loaded_completion_obj;
Amir Levy9659e592016-10-27 18:08:27 +03001233 struct ipa3_smp2p_info smp2p_info;
Gidon Studinski3021a6f2016-11-10 12:48:48 +02001234 u32 ipa_tz_unlock_reg_num;
1235 struct ipa_tz_unlock_reg_info *ipa_tz_unlock_reg;
Skylar Chang6c4bec92017-04-21 16:10:14 -07001236 struct ipa_dma_task_info dma_task_info;
Amir Levy9659e592016-10-27 18:08:27 +03001237};
1238
Amir Levy9659e592016-10-27 18:08:27 +03001239struct ipa3_plat_drv_res {
1240 bool use_ipa_teth_bridge;
1241 u32 ipa_mem_base;
1242 u32 ipa_mem_size;
1243 u32 transport_mem_base;
1244 u32 transport_mem_size;
1245 u32 ipa_irq;
1246 u32 transport_irq;
1247 u32 ipa_pipe_mem_start_ofst;
1248 u32 ipa_pipe_mem_size;
1249 enum ipa_hw_type ipa_hw_type;
1250 enum ipa3_hw_mode ipa3_hw_mode;
1251 u32 ee;
Amir Levy9659e592016-10-27 18:08:27 +03001252 bool modem_cfg_emb_pipe_flt;
1253 bool ipa_wdi2;
1254 bool use_64_bit_dma_mask;
Ghanim Fodi6a831342017-03-07 18:19:15 +02001255 bool use_bw_vote;
Amir Levy9659e592016-10-27 18:08:27 +03001256 u32 wan_rx_ring_size;
1257 u32 lan_rx_ring_size;
1258 bool skip_uc_pipe_reset;
Amir Levy9659e592016-10-27 18:08:27 +03001259 bool apply_rg10_wa;
1260 bool gsi_ch20_wa;
1261 bool tethered_flow_control;
Gidon Studinski3021a6f2016-11-10 12:48:48 +02001262 u32 ipa_tz_unlock_reg_num;
1263 struct ipa_tz_unlock_reg_info *ipa_tz_unlock_reg;
Amir Levy9659e592016-10-27 18:08:27 +03001264};
1265
1266/**
1267 * struct ipa3_mem_partition - represents IPA RAM Map as read from DTS
1268 * Order and type of members should not be changed without a suitable change
1269 * to DTS file or the code that reads it.
1270 *
Amir Levy7e7a1342017-04-27 15:46:30 +03001271 * IPA SRAM memory layout:
1272 * +-------------------------+
1273 * | UC MEM |
Amir Levy9659e592016-10-27 18:08:27 +03001274 * +-------------------------+
1275 * | UC INFO |
1276 * +-------------------------+
1277 * | CANARY |
1278 * +-------------------------+
1279 * | CANARY |
1280 * +-------------------------+
1281 * | V4 FLT HDR HASHABLE |
1282 * +-------------------------+
1283 * | CANARY |
1284 * +-------------------------+
1285 * | CANARY |
1286 * +-------------------------+
1287 * | V4 FLT HDR NON-HASHABLE |
1288 * +-------------------------+
1289 * | CANARY |
1290 * +-------------------------+
1291 * | CANARY |
1292 * +-------------------------+
1293 * | V6 FLT HDR HASHABLE |
1294 * +-------------------------+
1295 * | CANARY |
1296 * +-------------------------+
1297 * | CANARY |
1298 * +-------------------------+
1299 * | V6 FLT HDR NON-HASHABLE |
1300 * +-------------------------+
1301 * | CANARY |
1302 * +-------------------------+
1303 * | CANARY |
1304 * +-------------------------+
1305 * | V4 RT HDR HASHABLE |
1306 * +-------------------------+
1307 * | CANARY |
1308 * +-------------------------+
1309 * | CANARY |
1310 * +-------------------------+
1311 * | V4 RT HDR NON-HASHABLE |
1312 * +-------------------------+
1313 * | CANARY |
1314 * +-------------------------+
1315 * | CANARY |
1316 * +-------------------------+
1317 * | V6 RT HDR HASHABLE |
1318 * +-------------------------+
1319 * | CANARY |
1320 * +-------------------------+
1321 * | CANARY |
1322 * +-------------------------+
1323 * | V6 RT HDR NON-HASHABLE |
1324 * +-------------------------+
1325 * | CANARY |
1326 * +-------------------------+
1327 * | CANARY |
1328 * +-------------------------+
1329 * | MODEM HDR |
1330 * +-------------------------+
1331 * | CANARY |
1332 * +-------------------------+
1333 * | CANARY |
1334 * +-------------------------+
1335 * | MODEM PROC CTX |
1336 * +-------------------------+
1337 * | APPS PROC CTX |
1338 * +-------------------------+
1339 * | CANARY |
1340 * +-------------------------+
Amir Levy7e7a1342017-04-27 15:46:30 +03001341 * | CANARY |
1342 * +-------------------------+
Michael Adisumarta891a4ff2017-05-16 16:40:06 -07001343 * | PDN CONFIG |
1344 * +-------------------------+
1345 * | CANARY |
1346 * +-------------------------+
1347 * | CANARY |
1348 * +-------------------------+
Amir Levy9659e592016-10-27 18:08:27 +03001349 * | MODEM MEM |
1350 * +-------------------------+
1351 * | CANARY |
1352 * +-------------------------+
Amir Levy7e7a1342017-04-27 15:46:30 +03001353 * | UC EVENT RING | From IPA 3.5
1354 * +-------------------------+
Amir Levy9659e592016-10-27 18:08:27 +03001355 */
1356struct ipa3_mem_partition {
1357 u32 ofst_start;
1358 u32 nat_ofst;
1359 u32 nat_size;
1360 u32 v4_flt_hash_ofst;
1361 u32 v4_flt_hash_size;
1362 u32 v4_flt_hash_size_ddr;
1363 u32 v4_flt_nhash_ofst;
1364 u32 v4_flt_nhash_size;
1365 u32 v4_flt_nhash_size_ddr;
1366 u32 v6_flt_hash_ofst;
1367 u32 v6_flt_hash_size;
1368 u32 v6_flt_hash_size_ddr;
1369 u32 v6_flt_nhash_ofst;
1370 u32 v6_flt_nhash_size;
1371 u32 v6_flt_nhash_size_ddr;
1372 u32 v4_rt_num_index;
1373 u32 v4_modem_rt_index_lo;
1374 u32 v4_modem_rt_index_hi;
1375 u32 v4_apps_rt_index_lo;
1376 u32 v4_apps_rt_index_hi;
1377 u32 v4_rt_hash_ofst;
1378 u32 v4_rt_hash_size;
1379 u32 v4_rt_hash_size_ddr;
1380 u32 v4_rt_nhash_ofst;
1381 u32 v4_rt_nhash_size;
1382 u32 v4_rt_nhash_size_ddr;
1383 u32 v6_rt_num_index;
1384 u32 v6_modem_rt_index_lo;
1385 u32 v6_modem_rt_index_hi;
1386 u32 v6_apps_rt_index_lo;
1387 u32 v6_apps_rt_index_hi;
1388 u32 v6_rt_hash_ofst;
1389 u32 v6_rt_hash_size;
1390 u32 v6_rt_hash_size_ddr;
1391 u32 v6_rt_nhash_ofst;
1392 u32 v6_rt_nhash_size;
1393 u32 v6_rt_nhash_size_ddr;
1394 u32 modem_hdr_ofst;
1395 u32 modem_hdr_size;
1396 u32 apps_hdr_ofst;
1397 u32 apps_hdr_size;
1398 u32 apps_hdr_size_ddr;
1399 u32 modem_hdr_proc_ctx_ofst;
1400 u32 modem_hdr_proc_ctx_size;
1401 u32 apps_hdr_proc_ctx_ofst;
1402 u32 apps_hdr_proc_ctx_size;
1403 u32 apps_hdr_proc_ctx_size_ddr;
1404 u32 modem_comp_decomp_ofst;
1405 u32 modem_comp_decomp_size;
1406 u32 modem_ofst;
1407 u32 modem_size;
1408 u32 apps_v4_flt_hash_ofst;
1409 u32 apps_v4_flt_hash_size;
1410 u32 apps_v4_flt_nhash_ofst;
1411 u32 apps_v4_flt_nhash_size;
1412 u32 apps_v6_flt_hash_ofst;
1413 u32 apps_v6_flt_hash_size;
1414 u32 apps_v6_flt_nhash_ofst;
1415 u32 apps_v6_flt_nhash_size;
1416 u32 uc_info_ofst;
1417 u32 uc_info_size;
1418 u32 end_ofst;
1419 u32 apps_v4_rt_hash_ofst;
1420 u32 apps_v4_rt_hash_size;
1421 u32 apps_v4_rt_nhash_ofst;
1422 u32 apps_v4_rt_nhash_size;
1423 u32 apps_v6_rt_hash_ofst;
1424 u32 apps_v6_rt_hash_size;
1425 u32 apps_v6_rt_nhash_ofst;
1426 u32 apps_v6_rt_nhash_size;
Amir Levy9fadeca2017-04-25 10:18:32 +03001427 u32 uc_event_ring_ofst;
1428 u32 uc_event_ring_size;
Michael Adisumarta891a4ff2017-05-16 16:40:06 -07001429 u32 pdn_config_ofst;
1430 u32 pdn_config_size;
Amir Levy9659e592016-10-27 18:08:27 +03001431};
1432
1433struct ipa3_controller {
1434 struct ipa3_mem_partition mem_partition;
1435 u32 ipa_clk_rate_turbo;
1436 u32 ipa_clk_rate_nominal;
1437 u32 ipa_clk_rate_svs;
1438 u32 clock_scaling_bw_threshold_turbo;
1439 u32 clock_scaling_bw_threshold_nominal;
1440 u32 ipa_reg_base_ofst;
1441 u32 max_holb_tmr_val;
1442 void (*ipa_sram_read_settings)(void);
1443 int (*ipa_init_sram)(void);
1444 int (*ipa_init_hdr)(void);
1445 int (*ipa_init_rt4)(void);
1446 int (*ipa_init_rt6)(void);
1447 int (*ipa_init_flt4)(void);
1448 int (*ipa_init_flt6)(void);
1449 int (*ipa3_read_ep_reg)(char *buff, int max_len, int pipe);
1450 int (*ipa3_commit_flt)(enum ipa_ip_type ip);
1451 int (*ipa3_commit_rt)(enum ipa_ip_type ip);
1452 int (*ipa3_commit_hdr)(void);
1453 void (*ipa3_enable_clks)(void);
1454 void (*ipa3_disable_clks)(void);
1455 struct msm_bus_scale_pdata *msm_bus_data_ptr;
1456};
1457
1458extern struct ipa3_context *ipa3_ctx;
1459
1460/* public APIs */
Amir Levy9659e592016-10-27 18:08:27 +03001461/* Generic GSI channels functions */
1462int ipa3_request_gsi_channel(struct ipa_request_gsi_channel_params *params,
1463 struct ipa_req_chan_out_params *out_params);
1464
1465int ipa3_release_gsi_channel(u32 clnt_hdl);
1466
1467int ipa3_start_gsi_channel(u32 clnt_hdl);
1468
1469int ipa3_stop_gsi_channel(u32 clnt_hdl);
1470
1471int ipa3_reset_gsi_channel(u32 clnt_hdl);
1472
1473int ipa3_reset_gsi_event_ring(u32 clnt_hdl);
1474
1475/* Specific xDCI channels functions */
1476int ipa3_set_usb_max_packet_size(
1477 enum ipa_usb_max_usb_packet_size usb_max_packet_size);
1478
Ghanim Fodi93a61112016-10-05 11:59:18 +03001479int ipa3_xdci_start(u32 clnt_hdl, u8 xferrscidx, bool xferrscidx_valid);
1480
1481int ipa3_xdci_connect(u32 clnt_hdl);
Amir Levy9659e592016-10-27 18:08:27 +03001482
1483int ipa3_xdci_disconnect(u32 clnt_hdl, bool should_force_clear, u32 qmi_req_id);
1484
1485int ipa3_xdci_suspend(u32 ul_clnt_hdl, u32 dl_clnt_hdl,
1486 bool should_force_clear, u32 qmi_req_id, bool is_dpl);
1487
1488int ipa3_xdci_resume(u32 ul_clnt_hdl, u32 dl_clnt_hdl, bool is_dpl);
1489
1490/*
Amir Levy9659e592016-10-27 18:08:27 +03001491 * Remove ep delay
1492 */
1493int ipa3_clear_endpoint_delay(u32 clnt_hdl);
1494
1495/*
1496 * Configuration
1497 */
1498int ipa3_cfg_ep(u32 clnt_hdl, const struct ipa_ep_cfg *ipa_ep_cfg);
1499
1500int ipa3_cfg_ep_nat(u32 clnt_hdl, const struct ipa_ep_cfg_nat *ipa_ep_cfg);
1501
Amir Levydc65f4c2017-07-06 09:49:50 +03001502int ipa3_cfg_ep_conn_track(u32 clnt_hdl,
1503 const struct ipa_ep_cfg_conn_track *ep_conn_track);
1504
Amir Levy9659e592016-10-27 18:08:27 +03001505int ipa3_cfg_ep_hdr(u32 clnt_hdl, const struct ipa_ep_cfg_hdr *ipa_ep_cfg);
1506
1507int ipa3_cfg_ep_hdr_ext(u32 clnt_hdl,
1508 const struct ipa_ep_cfg_hdr_ext *ipa_ep_cfg);
1509
1510int ipa3_cfg_ep_mode(u32 clnt_hdl, const struct ipa_ep_cfg_mode *ipa_ep_cfg);
1511
1512int ipa3_cfg_ep_aggr(u32 clnt_hdl, const struct ipa_ep_cfg_aggr *ipa_ep_cfg);
1513
1514int ipa3_cfg_ep_deaggr(u32 clnt_hdl,
1515 const struct ipa_ep_cfg_deaggr *ipa_ep_cfg);
1516
1517int ipa3_cfg_ep_route(u32 clnt_hdl, const struct ipa_ep_cfg_route *ipa_ep_cfg);
1518
1519int ipa3_cfg_ep_holb(u32 clnt_hdl, const struct ipa_ep_cfg_holb *ipa_ep_cfg);
1520
1521int ipa3_cfg_ep_cfg(u32 clnt_hdl, const struct ipa_ep_cfg_cfg *ipa_ep_cfg);
1522
1523int ipa3_cfg_ep_metadata_mask(u32 clnt_hdl,
1524 const struct ipa_ep_cfg_metadata_mask *ipa_ep_cfg);
1525
1526int ipa3_cfg_ep_holb_by_client(enum ipa_client_type client,
1527 const struct ipa_ep_cfg_holb *ipa_ep_cfg);
1528
1529int ipa3_cfg_ep_ctrl(u32 clnt_hdl, const struct ipa_ep_cfg_ctrl *ep_ctrl);
1530
1531/*
1532 * Header removal / addition
1533 */
1534int ipa3_add_hdr(struct ipa_ioc_add_hdr *hdrs);
1535
1536int ipa3_del_hdr(struct ipa_ioc_del_hdr *hdls);
1537
Ghanim Fodi2c8ba072017-01-12 15:14:15 +02001538int ipa3_del_hdr_by_user(struct ipa_ioc_del_hdr *hdls, bool by_user);
1539
Amir Levy9659e592016-10-27 18:08:27 +03001540int ipa3_commit_hdr(void);
1541
1542int ipa3_reset_hdr(void);
1543
1544int ipa3_get_hdr(struct ipa_ioc_get_hdr *lookup);
1545
1546int ipa3_put_hdr(u32 hdr_hdl);
1547
1548int ipa3_copy_hdr(struct ipa_ioc_copy_hdr *copy);
1549
1550/*
1551 * Header Processing Context
1552 */
1553int ipa3_add_hdr_proc_ctx(struct ipa_ioc_add_hdr_proc_ctx *proc_ctxs);
1554
1555int ipa3_del_hdr_proc_ctx(struct ipa_ioc_del_hdr_proc_ctx *hdls);
1556
Ghanim Fodi2c8ba072017-01-12 15:14:15 +02001557int ipa3_del_hdr_proc_ctx_by_user(struct ipa_ioc_del_hdr_proc_ctx *hdls,
1558 bool by_user);
1559
Amir Levy9659e592016-10-27 18:08:27 +03001560/*
1561 * Routing
1562 */
1563int ipa3_add_rt_rule(struct ipa_ioc_add_rt_rule *rules);
1564
1565int ipa3_add_rt_rule_after(struct ipa_ioc_add_rt_rule_after *rules);
1566
1567int ipa3_del_rt_rule(struct ipa_ioc_del_rt_rule *hdls);
1568
1569int ipa3_commit_rt(enum ipa_ip_type ip);
1570
1571int ipa3_reset_rt(enum ipa_ip_type ip);
1572
1573int ipa3_get_rt_tbl(struct ipa_ioc_get_rt_tbl *lookup);
1574
1575int ipa3_put_rt_tbl(u32 rt_tbl_hdl);
1576
1577int ipa3_query_rt_index(struct ipa_ioc_get_rt_tbl_indx *in);
1578
1579int ipa3_mdfy_rt_rule(struct ipa_ioc_mdfy_rt_rule *rules);
1580
1581/*
1582 * Filtering
1583 */
1584int ipa3_add_flt_rule(struct ipa_ioc_add_flt_rule *rules);
1585
1586int ipa3_add_flt_rule_after(struct ipa_ioc_add_flt_rule_after *rules);
1587
1588int ipa3_del_flt_rule(struct ipa_ioc_del_flt_rule *hdls);
1589
1590int ipa3_mdfy_flt_rule(struct ipa_ioc_mdfy_flt_rule *rules);
1591
1592int ipa3_commit_flt(enum ipa_ip_type ip);
1593
1594int ipa3_reset_flt(enum ipa_ip_type ip);
1595
1596/*
1597 * NAT
1598 */
1599int ipa3_allocate_nat_device(struct ipa_ioc_nat_alloc_mem *mem);
1600
1601int ipa3_nat_init_cmd(struct ipa_ioc_v4_nat_init *init);
1602
1603int ipa3_nat_dma_cmd(struct ipa_ioc_nat_dma_cmd *dma);
1604
1605int ipa3_nat_del_cmd(struct ipa_ioc_v4_nat_del *del);
1606
Amir Levydc65f4c2017-07-06 09:49:50 +03001607int ipa3_nat_mdfy_pdn(struct ipa_ioc_nat_pdn_entry *mdfy_pdn);
Amir Levy05fccd02017-06-13 16:25:45 +03001608
Amir Levy9659e592016-10-27 18:08:27 +03001609/*
1610 * Messaging
1611 */
1612int ipa3_send_msg(struct ipa_msg_meta *meta, void *buff,
1613 ipa_msg_free_fn callback);
1614int ipa3_register_pull_msg(struct ipa_msg_meta *meta, ipa_msg_pull_fn callback);
1615int ipa3_deregister_pull_msg(struct ipa_msg_meta *meta);
1616
1617/*
1618 * Interface
1619 */
1620int ipa3_register_intf(const char *name, const struct ipa_tx_intf *tx,
1621 const struct ipa_rx_intf *rx);
1622int ipa3_register_intf_ext(const char *name, const struct ipa_tx_intf *tx,
1623 const struct ipa_rx_intf *rx,
1624 const struct ipa_ext_intf *ext);
1625int ipa3_deregister_intf(const char *name);
1626
1627/*
1628 * Aggregation
1629 */
1630int ipa3_set_aggr_mode(enum ipa_aggr_mode mode);
1631
1632int ipa3_set_qcncm_ndp_sig(char sig[3]);
1633
1634int ipa3_set_single_ndp_per_mbim(bool enable);
1635
1636/*
1637 * Data path
1638 */
1639int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb,
1640 struct ipa_tx_meta *metadata);
1641
1642/*
1643 * To transfer multiple data packets
1644 * While passing the data descriptor list, the anchor node
1645 * should be of type struct ipa_tx_data_desc not list_head
1646*/
1647int ipa3_tx_dp_mul(enum ipa_client_type dst,
1648 struct ipa_tx_data_desc *data_desc);
1649
1650void ipa3_free_skb(struct ipa_rx_data *);
1651
1652/*
1653 * System pipes
1654 */
1655int ipa3_setup_sys_pipe(struct ipa_sys_connect_params *sys_in, u32 *clnt_hdl);
1656
1657int ipa3_teardown_sys_pipe(u32 clnt_hdl);
1658
1659int ipa3_sys_setup(struct ipa_sys_connect_params *sys_in,
Amir Levya59ed3f2017-03-05 17:30:55 +02001660 unsigned long *ipa_transport_hdl,
Amir Levy9659e592016-10-27 18:08:27 +03001661 u32 *ipa_pipe_num, u32 *clnt_hdl, bool en_status);
1662
1663int ipa3_sys_teardown(u32 clnt_hdl);
1664
1665int ipa3_sys_update_gsi_hdls(u32 clnt_hdl, unsigned long gsi_ch_hdl,
1666 unsigned long gsi_ev_hdl);
1667
1668int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in,
1669 struct ipa_wdi_out_params *out);
1670int ipa3_disconnect_wdi_pipe(u32 clnt_hdl);
1671int ipa3_enable_wdi_pipe(u32 clnt_hdl);
1672int ipa3_disable_wdi_pipe(u32 clnt_hdl);
1673int ipa3_resume_wdi_pipe(u32 clnt_hdl);
1674int ipa3_suspend_wdi_pipe(u32 clnt_hdl);
1675int ipa3_get_wdi_stats(struct IpaHwStatsWDIInfoData_t *stats);
1676u16 ipa3_get_smem_restr_bytes(void);
Skylar Chang6b41f8d2016-11-01 12:50:11 -07001677int ipa3_broadcast_wdi_quota_reach_ind(uint32_t fid, uint64_t num_bytes);
Amir Levy9659e592016-10-27 18:08:27 +03001678int ipa3_setup_uc_ntn_pipes(struct ipa_ntn_conn_in_params *in,
1679 ipa_notify_cb notify, void *priv, u8 hdr_len,
1680 struct ipa_ntn_conn_out_params *outp);
1681int ipa3_tear_down_uc_offload_pipes(int ipa_ep_idx_ul, int ipa_ep_idx_dl);
1682
1683/*
1684 * To retrieve doorbell physical address of
1685 * wlan pipes
1686 */
1687int ipa3_uc_wdi_get_dbpa(struct ipa_wdi_db_params *out);
1688
1689/*
1690 * To register uC ready callback if uC not ready
1691 * and also check uC readiness
1692 * if uC not ready only, register callback
1693 */
1694int ipa3_uc_reg_rdyCB(struct ipa_wdi_uc_ready_params *param);
1695/*
1696 * To de-register uC ready callback
1697 */
1698int ipa3_uc_dereg_rdyCB(void);
1699
1700/*
1701 * Tethering bridge (Rmnet / MBIM)
1702 */
1703int ipa3_teth_bridge_init(struct teth_bridge_init_params *params);
1704
1705int ipa3_teth_bridge_disconnect(enum ipa_client_type client);
1706
1707int ipa3_teth_bridge_connect(struct teth_bridge_connect_params *connect_params);
1708
1709/*
1710 * Tethering client info
1711 */
1712void ipa3_set_client(int index, enum ipacm_client_enum client, bool uplink);
1713
1714enum ipacm_client_enum ipa3_get_client(int pipe_idx);
1715
1716bool ipa3_get_client_uplink(int pipe_idx);
1717
Skylar Chang6b41f8d2016-11-01 12:50:11 -07001718int ipa3_get_wlan_stats(struct ipa_get_wdi_sap_stats *wdi_sap_stats);
1719
1720int ipa3_set_wlan_quota(struct ipa_set_wifi_quota *wdi_quota);
Amir Levy9659e592016-10-27 18:08:27 +03001721/*
1722 * IPADMA
1723 */
1724int ipa3_dma_init(void);
1725
1726int ipa3_dma_enable(void);
1727
1728int ipa3_dma_disable(void);
1729
1730int ipa3_dma_sync_memcpy(u64 dest, u64 src, int len);
1731
1732int ipa3_dma_async_memcpy(u64 dest, u64 src, int len,
1733 void (*user_cb)(void *user1), void *user_param);
1734
1735int ipa3_dma_uc_memcpy(phys_addr_t dest, phys_addr_t src, int len);
1736
1737void ipa3_dma_destroy(void);
1738
1739/*
1740 * MHI
1741 */
1742
1743int ipa3_mhi_init_engine(struct ipa_mhi_init_engine *params);
1744
1745int ipa3_connect_mhi_pipe(
1746 struct ipa_mhi_connect_params_internal *in,
1747 u32 *clnt_hdl);
1748
1749int ipa3_disconnect_mhi_pipe(u32 clnt_hdl);
1750
1751bool ipa3_mhi_stop_gsi_channel(enum ipa_client_type client);
1752
1753int ipa3_mhi_reset_channel_internal(enum ipa_client_type client);
1754
1755int ipa3_mhi_start_channel_internal(enum ipa_client_type client);
1756
1757bool ipa3_has_open_aggr_frame(enum ipa_client_type client);
1758
1759int ipa3_mhi_resume_channels_internal(enum ipa_client_type client,
1760 bool LPTransitionRejected, bool brstmode_enabled,
1761 union __packed gsi_channel_scratch ch_scratch, u8 index);
1762
1763int ipa3_mhi_destroy_channel(enum ipa_client_type client);
1764
1765/*
1766 * mux id
1767 */
1768int ipa3_write_qmap_id(struct ipa_ioc_write_qmapid *param_in);
1769
1770/*
1771 * interrupts
1772 */
1773int ipa3_add_interrupt_handler(enum ipa_irq_type interrupt,
1774 ipa_irq_handler_t handler,
1775 bool deferred_flag,
1776 void *private_data);
1777
1778int ipa3_remove_interrupt_handler(enum ipa_irq_type interrupt);
1779
1780/*
1781 * Miscellaneous
1782 */
Amir Levy9659e592016-10-27 18:08:27 +03001783int ipa3_get_ep_mapping(enum ipa_client_type client);
1784
1785bool ipa3_is_ready(void);
1786
1787void ipa3_proxy_clk_vote(void);
1788void ipa3_proxy_clk_unvote(void);
1789
1790bool ipa3_is_client_handle_valid(u32 clnt_hdl);
1791
1792enum ipa_client_type ipa3_get_client_mapping(int pipe_idx);
1793
1794void ipa_init_ep_flt_bitmap(void);
1795
1796bool ipa_is_ep_support_flt(int pipe_idx);
1797
1798enum ipa_rm_resource_name ipa3_get_rm_resource_from_ep(int pipe_idx);
1799
1800bool ipa3_get_modem_cfg_emb_pipe_flt(void);
1801
1802u8 ipa3_get_qmb_master_sel(enum ipa_client_type client);
1803
1804/* internal functions */
1805
1806int ipa3_bind_api_controller(enum ipa_hw_type ipa_hw_type,
1807 struct ipa_api_controller *api_ctrl);
1808
1809bool ipa_is_modem_pipe(int pipe_idx);
1810
1811int ipa3_send_one(struct ipa3_sys_context *sys, struct ipa3_desc *desc,
1812 bool in_atomic);
1813int ipa3_send(struct ipa3_sys_context *sys,
1814 u32 num_desc,
1815 struct ipa3_desc *desc,
1816 bool in_atomic);
1817int ipa3_get_ep_mapping(enum ipa_client_type client);
1818int ipa_get_ep_group(enum ipa_client_type client);
1819
1820int ipa3_generate_hw_rule(enum ipa_ip_type ip,
1821 const struct ipa_rule_attrib *attrib,
1822 u8 **buf,
1823 u16 *en_rule);
1824int ipa3_init_hw(void);
1825struct ipa3_rt_tbl *__ipa3_find_rt_tbl(enum ipa_ip_type ip, const char *name);
1826int ipa3_set_single_ndp_per_mbim(bool);
1827void ipa3_debugfs_init(void);
1828void ipa3_debugfs_remove(void);
1829
1830void ipa3_dump_buff_internal(void *base, dma_addr_t phy_base, u32 size);
1831#ifdef IPA_DEBUG
1832#define IPA_DUMP_BUFF(base, phy_base, size) \
1833 ipa3_dump_buff_internal(base, phy_base, size)
1834#else
1835#define IPA_DUMP_BUFF(base, phy_base, size)
1836#endif
1837int ipa3_init_mem_partition(struct device_node *dev_node);
1838int ipa3_controller_static_bind(struct ipa3_controller *controller,
1839 enum ipa_hw_type ipa_hw_type);
1840int ipa3_cfg_route(struct ipahal_reg_route *route);
Gidon Studinski3021a6f2016-11-10 12:48:48 +02001841int ipa3_send_cmd_timeout(u16 num_desc, struct ipa3_desc *descr, u32 timeout);
Amir Levy9659e592016-10-27 18:08:27 +03001842int ipa3_send_cmd(u16 num_desc, struct ipa3_desc *descr);
1843int ipa3_cfg_filter(u32 disable);
Amir Levy9659e592016-10-27 18:08:27 +03001844int ipa3_straddle_boundary(u32 start, u32 end, u32 boundary);
1845struct ipa3_context *ipa3_get_ctx(void);
1846void ipa3_enable_clks(void);
1847void ipa3_disable_clks(void);
1848void ipa3_inc_client_enable_clks(struct ipa_active_client_logging_info *id);
1849int ipa3_inc_client_enable_clks_no_block(struct ipa_active_client_logging_info
1850 *id);
1851void ipa3_dec_client_disable_clks(struct ipa_active_client_logging_info *id);
Skylar Chang242952b2017-07-20 15:04:05 -07001852void ipa3_dec_client_disable_clks_no_block(
1853 struct ipa_active_client_logging_info *id);
Amir Levy9659e592016-10-27 18:08:27 +03001854void ipa3_active_clients_log_dec(struct ipa_active_client_logging_info *id,
1855 bool int_ctx);
1856void ipa3_active_clients_log_inc(struct ipa_active_client_logging_info *id,
1857 bool int_ctx);
1858int ipa3_active_clients_log_print_buffer(char *buf, int size);
1859int ipa3_active_clients_log_print_table(char *buf, int size);
1860void ipa3_active_clients_log_clear(void);
1861int ipa3_interrupts_init(u32 ipa_irq, u32 ee, struct device *ipa_dev);
1862int __ipa3_del_rt_rule(u32 rule_hdl);
Ghanim Fodi2c8ba072017-01-12 15:14:15 +02001863int __ipa3_del_hdr(u32 hdr_hdl, bool by_user);
Amir Levy9659e592016-10-27 18:08:27 +03001864int __ipa3_release_hdr(u32 hdr_hdl);
1865int __ipa3_release_hdr_proc_ctx(u32 proc_ctx_hdl);
1866int _ipa_read_ep_reg_v3_0(char *buf, int max_len, int pipe);
Michael Adisumarta891a4ff2017-05-16 16:40:06 -07001867int _ipa_read_ep_reg_v4_0(char *buf, int max_len, int pipe);
Amir Levy9659e592016-10-27 18:08:27 +03001868void _ipa_enable_clks_v3_0(void);
1869void _ipa_disable_clks_v3_0(void);
1870struct device *ipa3_get_dma_dev(void);
1871void ipa3_suspend_active_aggr_wa(u32 clnt_hdl);
1872void ipa3_suspend_handler(enum ipa_irq_type interrupt,
1873 void *private_data,
1874 void *interrupt_data);
1875
1876
1877int ipa_bridge_init(void);
1878void ipa_bridge_cleanup(void);
1879
1880ssize_t ipa3_read(struct file *filp, char __user *buf, size_t count,
1881 loff_t *f_pos);
1882int ipa3_pull_msg(struct ipa_msg_meta *meta, char *buff, size_t count);
1883int ipa3_query_intf(struct ipa_ioc_query_intf *lookup);
1884int ipa3_query_intf_tx_props(struct ipa_ioc_query_intf_tx_props *tx);
1885int ipa3_query_intf_rx_props(struct ipa_ioc_query_intf_rx_props *rx);
1886int ipa3_query_intf_ext_props(struct ipa_ioc_query_intf_ext_props *ext);
1887
1888void wwan_cleanup(void);
1889
1890int ipa3_teth_bridge_driver_init(void);
1891void ipa3_lan_rx_cb(void *priv, enum ipa_dp_evt_type evt, unsigned long data);
1892
Amir Levy9fadeca2017-04-25 10:18:32 +03001893int _ipa_init_sram_v3(void);
Amir Levy9659e592016-10-27 18:08:27 +03001894int _ipa_init_hdr_v3_0(void);
1895int _ipa_init_rt4_v3(void);
1896int _ipa_init_rt6_v3(void);
1897int _ipa_init_flt4_v3(void);
1898int _ipa_init_flt6_v3(void);
1899
1900int __ipa_commit_flt_v3(enum ipa_ip_type ip);
1901int __ipa_commit_rt_v3(enum ipa_ip_type ip);
1902
1903int __ipa_commit_hdr_v3_0(void);
1904void ipa3_skb_recycle(struct sk_buff *skb);
1905void ipa3_install_dflt_flt_rules(u32 ipa_ep_idx);
1906void ipa3_delete_dflt_flt_rules(u32 ipa_ep_idx);
1907
1908int ipa3_enable_data_path(u32 clnt_hdl);
1909int ipa3_disable_data_path(u32 clnt_hdl);
1910int ipa3_alloc_rule_id(struct idr *rule_ids);
1911int ipa3_id_alloc(void *ptr);
1912void *ipa3_id_find(u32 id);
1913void ipa3_id_remove(u32 id);
Skylar Change834a9e612016-12-22 14:20:32 -08001914int ipa3_enable_force_clear(u32 request_id, bool throttle_source,
1915 u32 source_pipe_bitmask);
1916int ipa3_disable_force_clear(u32 request_id);
Amir Levy9659e592016-10-27 18:08:27 +03001917
1918int ipa3_set_required_perf_profile(enum ipa_voltage_level floor_voltage,
1919 u32 bandwidth_mbps);
1920
1921int ipa3_cfg_ep_status(u32 clnt_hdl,
1922 const struct ipahal_reg_ep_cfg_status *ipa_ep_cfg);
1923
1924int ipa3_suspend_resource_no_block(enum ipa_rm_resource_name name);
1925int ipa3_suspend_resource_sync(enum ipa_rm_resource_name name);
1926int ipa3_resume_resource(enum ipa_rm_resource_name name);
1927bool ipa3_should_pipe_be_suspended(enum ipa_client_type client);
1928int ipa3_tag_aggr_force_close(int pipe_num);
1929
Amir Levy9659e592016-10-27 18:08:27 +03001930void ipa3_active_clients_unlock(void);
Amir Levy9659e592016-10-27 18:08:27 +03001931int ipa3_wdi_init(void);
1932int ipa3_write_qmapid_wdi_pipe(u32 clnt_hdl, u8 qmap_id);
1933int ipa3_tag_process(struct ipa3_desc *desc, int num_descs,
1934 unsigned long timeout);
1935
1936void ipa3_q6_pre_shutdown_cleanup(void);
1937void ipa3_q6_post_shutdown_cleanup(void);
1938int ipa3_init_q6_smem(void);
1939
Amir Levy9659e592016-10-27 18:08:27 +03001940int ipa3_mhi_handle_ipa_config_req(struct ipa_config_req_msg_v01 *config_req);
1941int ipa3_mhi_query_ch_info(enum ipa_client_type client,
1942 struct gsi_chan_info *ch_info);
1943
1944int ipa3_uc_interface_init(void);
Amir Levy9659e592016-10-27 18:08:27 +03001945int ipa3_uc_is_gsi_channel_empty(enum ipa_client_type ipa_client);
1946int ipa3_uc_state_check(void);
1947int ipa3_uc_loaded_check(void);
1948void ipa3_uc_load_notify(void);
1949int ipa3_uc_send_cmd(u32 cmd, u32 opcode, u32 expected_status,
1950 bool polling_mode, unsigned long timeout_jiffies);
1951void ipa3_uc_register_handlers(enum ipa3_hw_features feature,
1952 struct ipa3_uc_hdlrs *hdlrs);
1953int ipa3_create_nat_device(void);
1954int ipa3_uc_notify_clk_state(bool enabled);
1955void ipa3_dma_async_memcpy_notify_cb(void *priv,
1956 enum ipa_dp_evt_type evt, unsigned long data);
1957
1958int ipa3_uc_update_hw_flags(u32 flags);
1959
1960int ipa3_uc_mhi_init(void (*ready_cb)(void), void (*wakeup_request_cb)(void));
1961void ipa3_uc_mhi_cleanup(void);
1962int ipa3_uc_mhi_send_dl_ul_sync_info(union IpaHwMhiDlUlSyncCmdData_t *cmd);
1963int ipa3_uc_mhi_init_engine(struct ipa_mhi_msi_info *msi, u32 mmio_addr,
1964 u32 host_ctrl_addr, u32 host_data_addr, u32 first_ch_idx,
1965 u32 first_evt_idx);
1966int ipa3_uc_mhi_init_channel(int ipa_ep_idx, int channelHandle,
1967 int contexArrayIndex, int channelDirection);
1968int ipa3_uc_mhi_reset_channel(int channelHandle);
1969int ipa3_uc_mhi_suspend_channel(int channelHandle);
1970int ipa3_uc_mhi_resume_channel(int channelHandle, bool LPTransitionRejected);
1971int ipa3_uc_mhi_stop_event_update_channel(int channelHandle);
1972int ipa3_uc_mhi_print_stats(char *dbg_buff, int size);
1973int ipa3_uc_memcpy(phys_addr_t dest, phys_addr_t src, int len);
1974void ipa3_tag_destroy_imm(void *user1, int user2);
Amir Levy3be373c2017-03-05 16:31:30 +02001975const struct ipa_gsi_ep_config *ipa3_get_gsi_ep_info
1976 (enum ipa_client_type client);
Amir Levy9659e592016-10-27 18:08:27 +03001977void ipa3_uc_rg10_write_reg(enum ipahal_reg_name reg, u32 n, u32 val);
1978
1979u32 ipa3_get_num_pipes(void);
1980struct ipa_smmu_cb_ctx *ipa3_get_smmu_ctx(void);
1981struct ipa_smmu_cb_ctx *ipa3_get_wlan_smmu_ctx(void);
1982struct ipa_smmu_cb_ctx *ipa3_get_uc_smmu_ctx(void);
1983struct iommu_domain *ipa3_get_smmu_domain(void);
1984struct iommu_domain *ipa3_get_uc_smmu_domain(void);
1985struct iommu_domain *ipa3_get_wlan_smmu_domain(void);
1986int ipa3_iommu_map(struct iommu_domain *domain, unsigned long iova,
1987 phys_addr_t paddr, size_t size, int prot);
1988int ipa3_ap_suspend(struct device *dev);
1989int ipa3_ap_resume(struct device *dev);
1990int ipa3_init_interrupts(void);
1991struct iommu_domain *ipa3_get_smmu_domain(void);
1992int ipa3_release_wdi_mapping(u32 num_buffers, struct ipa_wdi_buffer_info *info);
1993int ipa3_create_wdi_mapping(u32 num_buffers, struct ipa_wdi_buffer_info *info);
1994int ipa3_set_flt_tuple_mask(int pipe_idx, struct ipahal_reg_hash_tuple *tuple);
1995int ipa3_set_rt_tuple_mask(int tbl_idx, struct ipahal_reg_hash_tuple *tuple);
1996void ipa3_set_resorce_groups_min_max_limits(void);
1997void ipa3_suspend_apps_pipes(bool suspend);
Amir Levy9659e592016-10-27 18:08:27 +03001998int ipa3_flt_read_tbl_from_hw(u32 pipe_idx,
1999 enum ipa_ip_type ip_type,
2000 bool hashable,
2001 struct ipahal_flt_rule_entry entry[],
2002 int *num_entry);
2003int ipa3_rt_read_tbl_from_hw(u32 tbl_idx,
2004 enum ipa_ip_type ip_type,
2005 bool hashable,
2006 struct ipahal_rt_rule_entry entry[],
2007 int *num_entry);
2008int ipa3_restore_suspend_handler(void);
2009int ipa3_inject_dma_task_for_gsi(void);
2010int ipa3_uc_panic_notifier(struct notifier_block *this,
2011 unsigned long event, void *ptr);
2012void ipa3_inc_acquire_wakelock(void);
2013void ipa3_dec_release_wakelock(void);
Ghanim Fodi37b64952017-01-24 15:42:30 +02002014int ipa3_load_fws(const struct firmware *firmware, phys_addr_t gsi_mem_base);
Amir Levy9659e592016-10-27 18:08:27 +03002015int ipa3_register_ipa_ready_cb(void (*ipa_ready_cb)(void *), void *user_data);
2016const char *ipa_hw_error_str(enum ipa3_hw_errors err_type);
2017int ipa_gsi_ch20_wa(void);
2018int ipa3_rx_poll(u32 clnt_hdl, int budget);
2019void ipa3_recycle_wan_skb(struct sk_buff *skb);
2020int ipa3_smmu_map_peer_reg(phys_addr_t phys_addr, bool map);
2021int ipa3_smmu_map_peer_buff(u64 iova, phys_addr_t phys_addr,
2022 u32 size, bool map);
Skylar Change1209942017-02-02 14:26:38 -08002023void ipa3_reset_freeze_vote(void);
Amir Levy9659e592016-10-27 18:08:27 +03002024int ipa3_ntn_init(void);
2025int ipa3_get_ntn_stats(struct Ipa3HwStatsNTNInfoData_t *stats);
2026struct dentry *ipa_debugfs_get_root(void);
2027bool ipa3_is_msm_device(void);
Amir Levyc4222c92016-11-07 16:14:54 +02002028struct device *ipa3_get_pdev(void);
Amir Levy12ef0912016-08-30 09:27:34 +03002029void ipa3_enable_dcd(void);
Amir Levy3afd94a2017-01-05 10:19:13 +02002030void ipa3_disable_prefetch(enum ipa_client_type client);
Skylar Changd407e592017-03-30 11:25:30 -07002031int ipa3_alloc_common_event_ring(void);
Skylar Chang6c4bec92017-04-21 16:10:14 -07002032int ipa3_allocate_dma_task_for_gsi(void);
2033void ipa3_free_dma_task_for_gsi(void);
Amir Levy9659e592016-10-27 18:08:27 +03002034#endif /* _IPA3_I_H_ */