Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> |
| 3 | * Copyright © 2006-2007 Intel Corporation |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | */ |
| 27 | #include <linux/i2c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 28 | #include <linux/slab.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 29 | #include <drm/drmP.h> |
Matt Roper | c6f95f2 | 2015-01-22 16:50:32 -0800 | [diff] [blame] | 30 | #include <drm/drm_atomic_helper.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 31 | #include <drm/drm_crtc.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 32 | #include "intel_drv.h" |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 33 | #include <drm/i915_drm.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 34 | #include "i915_drv.h" |
| 35 | #include "dvo.h" |
| 36 | |
| 37 | #define SIL164_ADDR 0x38 |
| 38 | #define CH7xxx_ADDR 0x76 |
| 39 | #define TFP410_ADDR 0x38 |
Thomas Richter | 7434a25 | 2012-07-18 19:22:30 +0200 | [diff] [blame] | 40 | #define NS2501_ADDR 0x38 |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 41 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 42 | static const struct intel_dvo_device intel_dvo_devices[] = { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 43 | { |
| 44 | .type = INTEL_DVO_CHIP_TMDS, |
| 45 | .name = "sil164", |
| 46 | .dvo_reg = DVOC, |
| 47 | .slave_addr = SIL164_ADDR, |
| 48 | .dev_ops = &sil164_ops, |
| 49 | }, |
| 50 | { |
| 51 | .type = INTEL_DVO_CHIP_TMDS, |
| 52 | .name = "ch7xxx", |
| 53 | .dvo_reg = DVOC, |
| 54 | .slave_addr = CH7xxx_ADDR, |
| 55 | .dev_ops = &ch7xxx_ops, |
| 56 | }, |
| 57 | { |
braggle@free.fr | 98304ad | 2013-05-16 12:57:38 +0200 | [diff] [blame] | 58 | .type = INTEL_DVO_CHIP_TMDS, |
| 59 | .name = "ch7xxx", |
| 60 | .dvo_reg = DVOC, |
| 61 | .slave_addr = 0x75, /* For some ch7010 */ |
| 62 | .dev_ops = &ch7xxx_ops, |
| 63 | }, |
| 64 | { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 65 | .type = INTEL_DVO_CHIP_LVDS, |
| 66 | .name = "ivch", |
| 67 | .dvo_reg = DVOA, |
| 68 | .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ |
| 69 | .dev_ops = &ivch_ops, |
| 70 | }, |
| 71 | { |
| 72 | .type = INTEL_DVO_CHIP_TMDS, |
| 73 | .name = "tfp410", |
| 74 | .dvo_reg = DVOC, |
| 75 | .slave_addr = TFP410_ADDR, |
| 76 | .dev_ops = &tfp410_ops, |
| 77 | }, |
| 78 | { |
| 79 | .type = INTEL_DVO_CHIP_LVDS, |
| 80 | .name = "ch7017", |
| 81 | .dvo_reg = DVOC, |
| 82 | .slave_addr = 0x75, |
Jani Nikula | 988c701 | 2015-03-27 00:20:19 +0200 | [diff] [blame] | 83 | .gpio = GMBUS_PIN_DPB, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 84 | .dev_ops = &ch7017_ops, |
Thomas Richter | 7434a25 | 2012-07-18 19:22:30 +0200 | [diff] [blame] | 85 | }, |
| 86 | { |
| 87 | .type = INTEL_DVO_CHIP_TMDS, |
| 88 | .name = "ns2501", |
Ville Syrjälä | 316e015 | 2014-08-15 01:21:58 +0300 | [diff] [blame] | 89 | .dvo_reg = DVOB, |
Thomas Richter | 7434a25 | 2012-07-18 19:22:30 +0200 | [diff] [blame] | 90 | .slave_addr = NS2501_ADDR, |
| 91 | .dev_ops = &ns2501_ops, |
| 92 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 93 | }; |
| 94 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 95 | struct intel_dvo { |
| 96 | struct intel_encoder base; |
| 97 | |
| 98 | struct intel_dvo_device dev; |
| 99 | |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 100 | struct intel_connector *attached_connector; |
| 101 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 102 | bool panel_wants_dither; |
| 103 | }; |
| 104 | |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 105 | static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 106 | { |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 107 | return container_of(encoder, struct intel_dvo, base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 108 | } |
| 109 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 110 | static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) |
| 111 | { |
Daniel Vetter | 79fde30 | 2013-07-21 21:37:00 +0200 | [diff] [blame] | 112 | return enc_to_dvo(intel_attached_encoder(connector)); |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 113 | } |
| 114 | |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 115 | static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 116 | { |
Ville Syrjälä | f417c11 | 2014-06-05 19:15:52 +0300 | [diff] [blame] | 117 | struct drm_device *dev = connector->base.dev; |
| 118 | struct drm_i915_private *dev_priv = dev->dev_private; |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 119 | struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); |
Ville Syrjälä | f417c11 | 2014-06-05 19:15:52 +0300 | [diff] [blame] | 120 | u32 tmp; |
| 121 | |
| 122 | tmp = I915_READ(intel_dvo->dev.dvo_reg); |
| 123 | |
| 124 | if (!(tmp & DVO_ENABLE)) |
| 125 | return false; |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 126 | |
| 127 | return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); |
| 128 | } |
| 129 | |
| 130 | static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, |
| 131 | enum pipe *pipe) |
| 132 | { |
| 133 | struct drm_device *dev = encoder->base.dev; |
| 134 | struct drm_i915_private *dev_priv = dev->dev_private; |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 135 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 136 | u32 tmp; |
| 137 | |
| 138 | tmp = I915_READ(intel_dvo->dev.dvo_reg); |
| 139 | |
| 140 | if (!(tmp & DVO_ENABLE)) |
| 141 | return false; |
| 142 | |
| 143 | *pipe = PORT_TO_PIPE(tmp); |
| 144 | |
| 145 | return true; |
| 146 | } |
| 147 | |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 148 | static void intel_dvo_get_config(struct intel_encoder *encoder, |
Ander Conselvan de Oliveira | 5cec258 | 2015-01-15 14:55:21 +0200 | [diff] [blame] | 149 | struct intel_crtc_state *pipe_config) |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 150 | { |
| 151 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 152 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 153 | u32 tmp, flags = 0; |
| 154 | |
| 155 | tmp = I915_READ(intel_dvo->dev.dvo_reg); |
| 156 | if (tmp & DVO_HSYNC_ACTIVE_HIGH) |
| 157 | flags |= DRM_MODE_FLAG_PHSYNC; |
| 158 | else |
| 159 | flags |= DRM_MODE_FLAG_NHSYNC; |
| 160 | if (tmp & DVO_VSYNC_ACTIVE_HIGH) |
| 161 | flags |= DRM_MODE_FLAG_PVSYNC; |
| 162 | else |
| 163 | flags |= DRM_MODE_FLAG_NVSYNC; |
| 164 | |
Ander Conselvan de Oliveira | 2d112de | 2015-01-15 14:55:22 +0200 | [diff] [blame] | 165 | pipe_config->base.adjusted_mode.flags |= flags; |
Ville Syrjälä | 18442d0 | 2013-09-13 16:00:08 +0300 | [diff] [blame] | 166 | |
Ander Conselvan de Oliveira | 2d112de | 2015-01-15 14:55:22 +0200 | [diff] [blame] | 167 | pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 168 | } |
| 169 | |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 170 | static void intel_disable_dvo(struct intel_encoder *encoder) |
| 171 | { |
| 172 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 173 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 174 | u32 dvo_reg = intel_dvo->dev.dvo_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 175 | u32 temp = I915_READ(dvo_reg); |
| 176 | |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 177 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); |
| 178 | I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); |
| 179 | I915_READ(dvo_reg); |
| 180 | } |
| 181 | |
| 182 | static void intel_enable_dvo(struct intel_encoder *encoder) |
| 183 | { |
| 184 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 185 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Daniel Vetter | 48f34e1 | 2013-10-08 12:25:42 +0200 | [diff] [blame] | 186 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 187 | u32 dvo_reg = intel_dvo->dev.dvo_reg; |
| 188 | u32 temp = I915_READ(dvo_reg); |
| 189 | |
Daniel Vetter | 48f34e1 | 2013-10-08 12:25:42 +0200 | [diff] [blame] | 190 | intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, |
Ander Conselvan de Oliveira | 6e3c971 | 2015-01-15 14:55:25 +0200 | [diff] [blame] | 191 | &crtc->config->base.mode, |
| 192 | &crtc->config->base.adjusted_mode); |
Daniel Vetter | 48f34e1 | 2013-10-08 12:25:42 +0200 | [diff] [blame] | 193 | |
Ville Syrjälä | c9c054c | 2014-08-15 01:21:59 +0300 | [diff] [blame] | 194 | I915_WRITE(dvo_reg, temp | DVO_ENABLE); |
| 195 | I915_READ(dvo_reg); |
| 196 | |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 197 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); |
| 198 | } |
| 199 | |
Damien Lespiau | c19de8e | 2013-11-28 15:29:18 +0000 | [diff] [blame] | 200 | static enum drm_mode_status |
| 201 | intel_dvo_mode_valid(struct drm_connector *connector, |
| 202 | struct drm_display_mode *mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 203 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 204 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 205 | const struct drm_display_mode *fixed_mode = |
| 206 | to_intel_connector(connector)->panel.fixed_mode; |
Mika Kahola | 26a9155 | 2015-08-18 14:37:02 +0300 | [diff] [blame] | 207 | int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; |
| 208 | int target_clock = mode->clock; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 209 | |
| 210 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
| 211 | return MODE_NO_DBLESCAN; |
| 212 | |
| 213 | /* XXX: Validate clock range */ |
| 214 | |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 215 | if (fixed_mode) { |
| 216 | if (mode->hdisplay > fixed_mode->hdisplay) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 217 | return MODE_PANEL; |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 218 | if (mode->vdisplay > fixed_mode->vdisplay) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 219 | return MODE_PANEL; |
Mika Kahola | 26a9155 | 2015-08-18 14:37:02 +0300 | [diff] [blame] | 220 | |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 221 | target_clock = fixed_mode->clock; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 222 | } |
| 223 | |
Mika Kahola | 26a9155 | 2015-08-18 14:37:02 +0300 | [diff] [blame] | 224 | if (target_clock > max_dotclk) |
| 225 | return MODE_CLOCK_HIGH; |
| 226 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 227 | return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 228 | } |
| 229 | |
Daniel Vetter | a347037 | 2013-07-21 21:36:58 +0200 | [diff] [blame] | 230 | static bool intel_dvo_compute_config(struct intel_encoder *encoder, |
Ander Conselvan de Oliveira | 5cec258 | 2015-01-15 14:55:21 +0200 | [diff] [blame] | 231 | struct intel_crtc_state *pipe_config) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 232 | { |
Daniel Vetter | a347037 | 2013-07-21 21:36:58 +0200 | [diff] [blame] | 233 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 234 | const struct drm_display_mode *fixed_mode = |
| 235 | intel_dvo->attached_connector->panel.fixed_mode; |
Ander Conselvan de Oliveira | 2d112de | 2015-01-15 14:55:22 +0200 | [diff] [blame] | 236 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 237 | |
| 238 | /* If we have timings from the BIOS for the panel, put them in |
| 239 | * to the adjusted mode. The CRTC will be set up for this mode, |
| 240 | * with the panel scaling set up to source from the H/VDisplay |
| 241 | * of the original mode. |
| 242 | */ |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 243 | if (fixed_mode) |
| 244 | intel_fixed_panel_mode(fixed_mode, adjusted_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 245 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 246 | return true; |
| 247 | } |
| 248 | |
Daniel Vetter | 912b0e2 | 2014-04-24 23:54:38 +0200 | [diff] [blame] | 249 | static void intel_dvo_pre_enable(struct intel_encoder *encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 250 | { |
Daniel Vetter | 79fde30 | 2013-07-21 21:37:00 +0200 | [diff] [blame] | 251 | struct drm_device *dev = encoder->base.dev; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 252 | struct drm_i915_private *dev_priv = dev->dev_private; |
Daniel Vetter | 79fde30 | 2013-07-21 21:37:00 +0200 | [diff] [blame] | 253 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
Ville Syrjälä | 7c5f93b | 2015-09-08 13:40:49 +0300 | [diff] [blame] | 254 | const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; |
Daniel Vetter | 79fde30 | 2013-07-21 21:37:00 +0200 | [diff] [blame] | 255 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
| 256 | int pipe = crtc->pipe; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 257 | u32 dvo_val; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 258 | u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 259 | |
| 260 | switch (dvo_reg) { |
| 261 | case DVOA: |
| 262 | default: |
| 263 | dvo_srcdim_reg = DVOA_SRCDIM; |
| 264 | break; |
| 265 | case DVOB: |
| 266 | dvo_srcdim_reg = DVOB_SRCDIM; |
| 267 | break; |
| 268 | case DVOC: |
| 269 | dvo_srcdim_reg = DVOC_SRCDIM; |
| 270 | break; |
| 271 | } |
| 272 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 273 | /* Save the data order, since I don't know what it should be set to. */ |
| 274 | dvo_val = I915_READ(dvo_reg) & |
| 275 | (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); |
| 276 | dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | |
| 277 | DVO_BLANK_ACTIVE_HIGH; |
| 278 | |
| 279 | if (pipe == 1) |
| 280 | dvo_val |= DVO_PIPE_B_SELECT; |
| 281 | dvo_val |= DVO_PIPE_STALL; |
| 282 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
| 283 | dvo_val |= DVO_HSYNC_ACTIVE_HIGH; |
| 284 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
| 285 | dvo_val |= DVO_VSYNC_ACTIVE_HIGH; |
| 286 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 287 | /*I915_WRITE(DVOB_SRCDIM, |
Ville Syrjälä | aad941d | 2015-09-25 16:38:56 +0300 | [diff] [blame] | 288 | (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | |
| 289 | (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 290 | I915_WRITE(dvo_srcdim_reg, |
Ville Syrjälä | aad941d | 2015-09-25 16:38:56 +0300 | [diff] [blame] | 291 | (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | |
| 292 | (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 293 | /*I915_WRITE(DVOB, dvo_val);*/ |
| 294 | I915_WRITE(dvo_reg, dvo_val); |
| 295 | } |
| 296 | |
| 297 | /** |
| 298 | * Detect the output connection on our DVO device. |
| 299 | * |
| 300 | * Unimplemented. |
| 301 | */ |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 302 | static enum drm_connector_status |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 303 | intel_dvo_detect(struct drm_connector *connector, bool force) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 304 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 305 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Chris Wilson | 164c859 | 2013-07-20 20:27:08 +0100 | [diff] [blame] | 306 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
Jani Nikula | c23cc41 | 2014-06-03 14:56:17 +0300 | [diff] [blame] | 307 | connector->base.id, connector->name); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 308 | return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 309 | } |
| 310 | |
| 311 | static int intel_dvo_get_modes(struct drm_connector *connector) |
| 312 | { |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 313 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 314 | const struct drm_display_mode *fixed_mode = |
| 315 | to_intel_connector(connector)->panel.fixed_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 316 | |
| 317 | /* We should probably have an i2c driver get_modes function for those |
| 318 | * devices which will have a fixed set of modes determined by the chip |
| 319 | * (TV-out, for example), but for now with just TMDS and LVDS, |
| 320 | * that's not the case. |
| 321 | */ |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 322 | intel_ddc_get_modes(connector, |
Jani Nikula | 988c701 | 2015-03-27 00:20:19 +0200 | [diff] [blame] | 323 | intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 324 | if (!list_empty(&connector->probed_modes)) |
| 325 | return 1; |
| 326 | |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 327 | if (fixed_mode) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 328 | struct drm_display_mode *mode; |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 329 | mode = drm_mode_duplicate(connector->dev, fixed_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 330 | if (mode) { |
| 331 | drm_mode_probed_add(connector, mode); |
| 332 | return 1; |
| 333 | } |
| 334 | } |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 335 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 336 | return 0; |
| 337 | } |
| 338 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 339 | static void intel_dvo_destroy(struct drm_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 340 | { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 341 | drm_connector_cleanup(connector); |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 342 | intel_panel_fini(&to_intel_connector(connector)->panel); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 343 | kfree(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 344 | } |
| 345 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 346 | static const struct drm_connector_funcs intel_dvo_connector_funcs = { |
Maarten Lankhorst | 4d688a2 | 2015-08-05 12:37:06 +0200 | [diff] [blame] | 347 | .dpms = drm_atomic_helper_connector_dpms, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 348 | .detect = intel_dvo_detect, |
| 349 | .destroy = intel_dvo_destroy, |
| 350 | .fill_modes = drm_helper_probe_single_connector_modes, |
Matt Roper | 2545e4a | 2015-01-22 16:51:27 -0800 | [diff] [blame] | 351 | .atomic_get_property = intel_connector_atomic_get_property, |
Matt Roper | c6f95f2 | 2015-01-22 16:50:32 -0800 | [diff] [blame] | 352 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
Ander Conselvan de Oliveira | 9896972 | 2015-03-20 16:18:06 +0200 | [diff] [blame] | 353 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 354 | }; |
| 355 | |
| 356 | static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { |
| 357 | .mode_valid = intel_dvo_mode_valid, |
| 358 | .get_modes = intel_dvo_get_modes, |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 359 | .best_encoder = intel_best_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 360 | }; |
| 361 | |
Hannes Eder | b358d0a | 2008-12-18 21:18:47 +0100 | [diff] [blame] | 362 | static void intel_dvo_enc_destroy(struct drm_encoder *encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 363 | { |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 364 | struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 365 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 366 | if (intel_dvo->dev.dev_ops->destroy) |
| 367 | intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); |
| 368 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 369 | intel_encoder_destroy(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 370 | } |
| 371 | |
| 372 | static const struct drm_encoder_funcs intel_dvo_enc_funcs = { |
| 373 | .destroy = intel_dvo_enc_destroy, |
| 374 | }; |
| 375 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 376 | /** |
| 377 | * Attempts to get a fixed panel timing for LVDS (currently only the i830). |
| 378 | * |
| 379 | * Other chips with DVO LVDS will need to extend this to deal with the LVDS |
| 380 | * chip being on DVOB/C and having multiple pipes. |
| 381 | */ |
| 382 | static struct drm_display_mode * |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 383 | intel_dvo_get_current_mode(struct drm_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 384 | { |
| 385 | struct drm_device *dev = connector->dev; |
| 386 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 387 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 388 | uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 389 | struct drm_display_mode *mode = NULL; |
| 390 | |
| 391 | /* If the DVO port is active, that'll be the LVDS, so we can pull out |
| 392 | * its timings to get how the BIOS set up the panel. |
| 393 | */ |
| 394 | if (dvo_val & DVO_ENABLE) { |
| 395 | struct drm_crtc *crtc; |
| 396 | int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; |
| 397 | |
Chris Wilson | f875c15 | 2010-09-09 15:44:14 +0100 | [diff] [blame] | 398 | crtc = intel_get_crtc_for_pipe(dev, pipe); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 399 | if (crtc) { |
| 400 | mode = intel_crtc_mode_get(dev, crtc); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 401 | if (mode) { |
| 402 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
| 403 | if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) |
| 404 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
| 405 | if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) |
| 406 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
| 407 | } |
| 408 | } |
| 409 | } |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 410 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 411 | return mode; |
| 412 | } |
| 413 | |
| 414 | void intel_dvo_init(struct drm_device *dev) |
| 415 | { |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 416 | struct drm_i915_private *dev_priv = dev->dev_private; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 417 | struct intel_encoder *intel_encoder; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 418 | struct intel_dvo *intel_dvo; |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 419 | struct intel_connector *intel_connector; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 420 | int i; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 421 | int encoder_type = DRM_MODE_ENCODER_NONE; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 422 | |
Daniel Vetter | b14c567 | 2013-09-19 12:18:32 +0200 | [diff] [blame] | 423 | intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 424 | if (!intel_dvo) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 425 | return; |
| 426 | |
Ander Conselvan de Oliveira | 9bdbd0b | 2015-04-10 10:59:10 +0300 | [diff] [blame] | 427 | intel_connector = intel_connector_alloc(); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 428 | if (!intel_connector) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 429 | kfree(intel_dvo); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 430 | return; |
| 431 | } |
| 432 | |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 433 | intel_dvo->attached_connector = intel_connector; |
| 434 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 435 | intel_encoder = &intel_dvo->base; |
Chris Wilson | 373a3cf | 2010-09-15 12:03:59 +0100 | [diff] [blame] | 436 | drm_encoder_init(dev, &intel_encoder->base, |
| 437 | &intel_dvo_enc_funcs, encoder_type); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 438 | |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 439 | intel_encoder->disable = intel_disable_dvo; |
| 440 | intel_encoder->enable = intel_enable_dvo; |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 441 | intel_encoder->get_hw_state = intel_dvo_get_hw_state; |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 442 | intel_encoder->get_config = intel_dvo_get_config; |
Daniel Vetter | a347037 | 2013-07-21 21:36:58 +0200 | [diff] [blame] | 443 | intel_encoder->compute_config = intel_dvo_compute_config; |
Daniel Vetter | 912b0e2 | 2014-04-24 23:54:38 +0200 | [diff] [blame] | 444 | intel_encoder->pre_enable = intel_dvo_pre_enable; |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 445 | intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; |
Imre Deak | 4932e2c | 2014-02-11 17:12:48 +0200 | [diff] [blame] | 446 | intel_connector->unregister = intel_connector_unregister; |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 447 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 448 | /* Now, try to find a controller */ |
| 449 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 450 | struct drm_connector *connector = &intel_connector->base; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 451 | const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 452 | struct i2c_adapter *i2c; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 453 | int gpio; |
David Müller (ELSOFT AG) | e4bfff5 | 2013-04-19 10:41:50 +0200 | [diff] [blame] | 454 | bool dvoinit; |
Ville Syrjälä | 4650947 | 2015-03-31 10:37:21 +0300 | [diff] [blame] | 455 | enum pipe pipe; |
Chris Wilson | 699ab78 | 2015-04-27 16:32:07 +0100 | [diff] [blame] | 456 | uint32_t dpll[I915_MAX_PIPES]; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 457 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 458 | /* Allow the I2C driver info to specify the GPIO to be used in |
| 459 | * special cases, but otherwise default to what's defined |
| 460 | * in the spec. |
| 461 | */ |
Jani Nikula | 88ac793 | 2015-03-27 00:20:22 +0200 | [diff] [blame] | 462 | if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 463 | gpio = dvo->gpio; |
| 464 | else if (dvo->type == INTEL_DVO_CHIP_LVDS) |
Jani Nikula | 988c701 | 2015-03-27 00:20:19 +0200 | [diff] [blame] | 465 | gpio = GMBUS_PIN_SSC; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 466 | else |
Jani Nikula | 988c701 | 2015-03-27 00:20:19 +0200 | [diff] [blame] | 467 | gpio = GMBUS_PIN_DPB; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 468 | |
| 469 | /* Set up the I2C bus necessary for the chip we're probing. |
| 470 | * It appears that everything is on GPIOE except for panels |
| 471 | * on i830 laptops, which are on GPIOB (DVOA). |
| 472 | */ |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 473 | i2c = intel_gmbus_get_adapter(dev_priv, gpio); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 474 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 475 | intel_dvo->dev = *dvo; |
David Müller (ELSOFT AG) | e4bfff5 | 2013-04-19 10:41:50 +0200 | [diff] [blame] | 476 | |
| 477 | /* GMBUS NAK handling seems to be unstable, hence let the |
| 478 | * transmitter detection run in bit banging mode for now. |
| 479 | */ |
| 480 | intel_gmbus_force_bit(i2c, true); |
| 481 | |
Ville Syrjälä | 4650947 | 2015-03-31 10:37:21 +0300 | [diff] [blame] | 482 | /* ns2501 requires the DVO 2x clock before it will |
| 483 | * respond to i2c accesses, so make sure we have |
| 484 | * have the clock enabled before we attempt to |
| 485 | * initialize the device. |
| 486 | */ |
| 487 | for_each_pipe(dev_priv, pipe) { |
| 488 | dpll[pipe] = I915_READ(DPLL(pipe)); |
| 489 | I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE); |
| 490 | } |
| 491 | |
David Müller (ELSOFT AG) | e4bfff5 | 2013-04-19 10:41:50 +0200 | [diff] [blame] | 492 | dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); |
| 493 | |
Ville Syrjälä | 4650947 | 2015-03-31 10:37:21 +0300 | [diff] [blame] | 494 | /* restore the DVO 2x clock state to original */ |
| 495 | for_each_pipe(dev_priv, pipe) { |
| 496 | I915_WRITE(DPLL(pipe), dpll[pipe]); |
| 497 | } |
| 498 | |
David Müller (ELSOFT AG) | e4bfff5 | 2013-04-19 10:41:50 +0200 | [diff] [blame] | 499 | intel_gmbus_force_bit(i2c, false); |
| 500 | |
| 501 | if (!dvoinit) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 502 | continue; |
| 503 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 504 | intel_encoder->type = INTEL_OUTPUT_DVO; |
| 505 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 506 | switch (dvo->type) { |
| 507 | case INTEL_DVO_CHIP_TMDS: |
Ville Syrjälä | bc079e8 | 2014-03-03 16:15:28 +0200 | [diff] [blame] | 508 | intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | |
| 509 | (1 << INTEL_OUTPUT_DVO); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 510 | drm_connector_init(dev, connector, |
| 511 | &intel_dvo_connector_funcs, |
| 512 | DRM_MODE_CONNECTOR_DVII); |
| 513 | encoder_type = DRM_MODE_ENCODER_TMDS; |
| 514 | break; |
| 515 | case INTEL_DVO_CHIP_LVDS: |
Ville Syrjälä | bc079e8 | 2014-03-03 16:15:28 +0200 | [diff] [blame] | 516 | intel_encoder->cloneable = 0; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 517 | drm_connector_init(dev, connector, |
| 518 | &intel_dvo_connector_funcs, |
| 519 | DRM_MODE_CONNECTOR_LVDS); |
| 520 | encoder_type = DRM_MODE_ENCODER_LVDS; |
| 521 | break; |
| 522 | } |
| 523 | |
| 524 | drm_connector_helper_add(connector, |
| 525 | &intel_dvo_connector_helper_funcs); |
| 526 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 527 | connector->interlace_allowed = false; |
| 528 | connector->doublescan_allowed = false; |
| 529 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 530 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 531 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { |
| 532 | /* For our LVDS chipsets, we should hopefully be able |
| 533 | * to dig the fixed panel mode out of the BIOS data. |
| 534 | * However, it's in a different format from the BIOS |
| 535 | * data on chipsets with integrated LVDS (stored in AIM |
| 536 | * headers, likely), so for now, just get the current |
| 537 | * mode being output through DVO. |
| 538 | */ |
Ville Syrjälä | 2869407 | 2015-09-08 13:40:44 +0300 | [diff] [blame] | 539 | intel_panel_init(&intel_connector->panel, |
| 540 | intel_dvo_get_current_mode(connector), |
| 541 | NULL); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 542 | intel_dvo->panel_wants_dither = true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 543 | } |
| 544 | |
Thomas Wood | 34ea3d3 | 2014-05-29 16:57:41 +0100 | [diff] [blame] | 545 | drm_connector_register(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 546 | return; |
| 547 | } |
| 548 | |
Chris Wilson | 373a3cf | 2010-09-15 12:03:59 +0100 | [diff] [blame] | 549 | drm_encoder_cleanup(&intel_encoder->base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 550 | kfree(intel_dvo); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 551 | kfree(intel_connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 552 | } |