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gerrit-public.fairphone.software / kernel / msm-4.9 / 24bdd055fb1e188692e0274ef048ac3fb7513a4e / . / arch / arm64 / boot / dts / qcom / dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi
blob: c6dfc8da69b515563195f7d3de2f30bfc2e219cb [file] [log] [blame]
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame^]1/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&mdss_mdp {
14 dsi_nt35597_truly_dsc_cmd: qcom,mdss_dsi_nt35597_dsc_cmd_truly {
15 qcom,mdss-dsi-panel-name =
16 "nt35597 cmd mode dsi truly panel with DSC";
17 qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
18 qcom,mdss-dsi-panel-framerate = <60>;
19 qcom,mdss-dsi-virtual-channel-id = <0>;
20 qcom,mdss-dsi-stream = <0>;
21 qcom,mdss-dsi-panel-width = <1440>;
22 qcom,mdss-dsi-panel-height = <2560>;
23 qcom,mdss-dsi-h-front-porch = <100>;
24 qcom,mdss-dsi-h-back-porch = <32>;
25 qcom,mdss-dsi-h-pulse-width = <16>;
26 qcom,mdss-dsi-h-sync-skew = <0>;
27 qcom,mdss-dsi-v-back-porch = <8>;
28 qcom,mdss-dsi-v-front-porch = <10>;
29 qcom,mdss-dsi-v-pulse-width = <2>;
30 qcom,mdss-dsi-h-left-border = <0>;
31 qcom,mdss-dsi-h-right-border = <0>;
32 qcom,mdss-dsi-v-top-border = <0>;
33 qcom,mdss-dsi-v-bottom-border = <0>;
34 qcom,mdss-dsi-bpp = <24>;
35 qcom,mdss-dsi-color-order = "rgb_swap_rgb";
36 qcom,mdss-dsi-underflow-color = <0xff>;
37 qcom,mdss-dsi-border-color = <0>;
38 qcom,mdss-dsi-on-command = [
39 /* CMD2_P0 */
40 15 01 00 00 00 00 02 ff 20
41 15 01 00 00 00 00 02 fb 01
42 15 01 00 00 00 00 02 00 01
43 15 01 00 00 00 00 02 01 55
44 15 01 00 00 00 00 02 02 45
45 15 01 00 00 00 00 02 05 40
46 15 01 00 00 00 00 02 06 19
47 15 01 00 00 00 00 02 07 1e
48 15 01 00 00 00 00 02 0b 73
49 15 01 00 00 00 00 02 0c 73
50 15 01 00 00 00 00 02 0e b0
51 15 01 00 00 00 00 02 0f ae
52 15 01 00 00 00 00 02 11 b8
53 15 01 00 00 00 00 02 13 00
54 15 01 00 00 00 00 02 58 80
55 15 01 00 00 00 00 02 59 01
56 15 01 00 00 00 00 02 5a 00
57 15 01 00 00 00 00 02 5b 01
58 15 01 00 00 00 00 02 5c 80
59 15 01 00 00 00 00 02 5d 81
60 15 01 00 00 00 00 02 5e 00
61 15 01 00 00 00 00 02 5f 01
62 15 01 00 00 00 00 02 72 31
63 15 01 00 00 00 00 02 68 03
64 /* CMD2_P4 */
65 15 01 00 00 00 00 02 ff 24
66 15 01 00 00 00 00 02 fb 01
67 15 01 00 00 00 00 02 00 1c
68 15 01 00 00 00 00 02 01 0b
69 15 01 00 00 00 00 02 02 0c
70 15 01 00 00 00 00 02 03 01
71 15 01 00 00 00 00 02 04 0f
72 15 01 00 00 00 00 02 05 10
73 15 01 00 00 00 00 02 06 10
74 15 01 00 00 00 00 02 07 10
75 15 01 00 00 00 00 02 08 89
76 15 01 00 00 00 00 02 09 8a
77 15 01 00 00 00 00 02 0a 13
78 15 01 00 00 00 00 02 0b 13
79 15 01 00 00 00 00 02 0c 15
80 15 01 00 00 00 00 02 0d 15
81 15 01 00 00 00 00 02 0e 17
82 15 01 00 00 00 00 02 0f 17
83 15 01 00 00 00 00 02 10 1c
84 15 01 00 00 00 00 02 11 0b
85 15 01 00 00 00 00 02 12 0c
86 15 01 00 00 00 00 02 13 01
87 15 01 00 00 00 00 02 14 0f
88 15 01 00 00 00 00 02 15 10
89 15 01 00 00 00 00 02 16 10
90 15 01 00 00 00 00 02 17 10
91 15 01 00 00 00 00 02 18 89
92 15 01 00 00 00 00 02 19 8a
93 15 01 00 00 00 00 02 1a 13
94 15 01 00 00 00 00 02 1b 13
95 15 01 00 00 00 00 02 1c 15
96 15 01 00 00 00 00 02 1d 15
97 15 01 00 00 00 00 02 1e 17
98 15 01 00 00 00 00 02 1f 17
99 /* STV */
100 15 01 00 00 00 00 02 20 40
101 15 01 00 00 00 00 02 21 01
102 15 01 00 00 00 00 02 22 00
103 15 01 00 00 00 00 02 23 40
104 15 01 00 00 00 00 02 24 40
105 15 01 00 00 00 00 02 25 6d
106 15 01 00 00 00 00 02 26 40
107 15 01 00 00 00 00 02 27 40
108 /* Vend */
109 15 01 00 00 00 00 02 e0 00
110 15 01 00 00 00 00 02 dc 21
111 15 01 00 00 00 00 02 dd 22
112 15 01 00 00 00 00 02 de 07
113 15 01 00 00 00 00 02 df 07
114 15 01 00 00 00 00 02 e3 6D
115 15 01 00 00 00 00 02 e1 07
116 15 01 00 00 00 00 02 e2 07
117 /* UD */
118 15 01 00 00 00 00 02 29 d8
119 15 01 00 00 00 00 02 2a 2a
120 /* CLK */
121 15 01 00 00 00 00 02 4b 03
122 15 01 00 00 00 00 02 4c 11
123 15 01 00 00 00 00 02 4d 10
124 15 01 00 00 00 00 02 4e 01
125 15 01 00 00 00 00 02 4f 01
126 15 01 00 00 00 00 02 50 10
127 15 01 00 00 00 00 02 51 00
128 15 01 00 00 00 00 02 52 80
129 15 01 00 00 00 00 02 53 00
130 15 01 00 00 00 00 02 56 00
131 15 01 00 00 00 00 02 54 07
132 15 01 00 00 00 00 02 58 07
133 15 01 00 00 00 00 02 55 25
134 /* Reset XDONB */
135 15 01 00 00 00 00 02 5b 43
136 15 01 00 00 00 00 02 5c 00
137 15 01 00 00 00 00 02 5f 73
138 15 01 00 00 00 00 02 60 73
139 15 01 00 00 00 00 02 63 22
140 15 01 00 00 00 00 02 64 00
141 15 01 00 00 00 00 02 67 08
142 15 01 00 00 00 00 02 68 04
143 /* Resolution:1440x2560*/
144 15 01 00 00 00 00 02 72 02
145 /* mux */
146 15 01 00 00 00 00 02 7a 80
147 15 01 00 00 00 00 02 7b 91
148 15 01 00 00 00 00 02 7c D8
149 15 01 00 00 00 00 02 7d 60
150 15 01 00 00 00 00 02 7f 15
151 15 01 00 00 00 00 02 75 15
152 /* ABOFF */
153 15 01 00 00 00 00 02 b3 C0
154 15 01 00 00 00 00 02 b4 00
155 15 01 00 00 00 00 02 b5 00
156 /* Source EQ */
157 15 01 00 00 00 00 02 78 00
158 15 01 00 00 00 00 02 79 00
159 15 01 00 00 00 00 02 80 00
160 15 01 00 00 00 00 02 83 00
161 /* FP BP */
162 15 01 00 00 00 00 02 93 0a
163 15 01 00 00 00 00 02 94 0a
164 /* Inversion Type */
165 15 01 00 00 00 00 02 8a 00
166 15 01 00 00 00 00 02 9b ff
167 /* IMGSWAP =1 @PortSwap=1 */
168 15 01 00 00 00 00 02 9d b0
169 15 01 00 00 00 00 02 9f 63
170 15 01 00 00 00 00 02 98 10
171 /* FRM */
172 15 01 00 00 00 00 02 ec 00
173 /* CMD1 */
174 15 01 00 00 00 00 02 ff 10
175 /* VESA DSC PPS settings(1440x2560 slide 16H) */
176 39 01 00 00 00 00 11 c1 09 20 00 10 02 00 02 68
177 01 bb 00 0a 06 67 04 c5
178 39 01 00 00 00 00 03 c2 10 f0
179 /* C0h = 0x0(2 Port SDC)0x01(1 PortA FBC)
180 * 0x02(MTK) 0x03(1 PortA VESA)
181 */
182 15 01 00 00 00 00 02 c0 03
183 /* VBP+VSA=,VFP = 10H */
184 15 01 00 00 00 00 04 3b 03 0a 0a
185 /* FTE on */
186 15 01 00 00 00 00 02 35 00
187 /* EN_BK =1(auto black) */
188 15 01 00 00 00 00 02 e5 01
189 /* CMD mode(10) VDO mode(03) */
190 15 01 00 00 00 00 02 bb 10
191 /* Non Reload MTP */
192 15 01 00 00 00 00 02 fb 01
193 /* SlpOut + DispOn */
194 05 01 00 00 78 00 02 11 00
195 05 01 00 00 78 00 02 29 00
196 ];
197 qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00
198 05 01 00 00 78 00 02 10 00];
199
200 qcom,mdss-dsi-on-command-state = "dsi_hs_mode";
201 qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
202 qcom,mdss-dsi-h-sync-pulse = <0>;
203 qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
204 qcom,mdss-dsi-bllp-eof-power-mode;
205 qcom,mdss-dsi-bllp-power-mode;
206 qcom,mdss-dsi-lane-0-state;
207 qcom,mdss-dsi-lane-1-state;
208 qcom,mdss-dsi-lane-2-state;
209 qcom,mdss-dsi-lane-3-state;
210 qcom,mdss-dsi-dma-trigger = "trigger_sw";
211 qcom,mdss-dsi-mdp-trigger = "none";
212 qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
213
214 qcom,mdss-dsi-bl-max-level = <4095>;
215 qcom,adjust-timer-wakeup-ms = <1>;
216 qcom,mdss-dsi-te-pin-select = <1>;
217 qcom,mdss-dsi-wr-mem-start = <0x2c>;
218 qcom,mdss-dsi-wr-mem-continue = <0x3c>;
219 qcom,mdss-dsi-te-dcs-command = <1>;
220 qcom,mdss-dsi-te-check-enable;
221 qcom,mdss-dsi-te-using-te-pin;
222
223 qcom,compression-mode = "dsc";
224 qcom,config-select = <&dsi_nt35597_truly_dsc_cmd_config0>;
225
226 dsi_nt35597_truly_dsc_cmd_config0: config0 {
227 qcom,mdss-dsc-encoders = <1>;
228 qcom,mdss-dsc-slice-height = <16>;
229 qcom,mdss-dsc-slice-width = <720>;
230 qcom,mdss-dsc-slice-per-pkt = <2>;
231
232 qcom,mdss-dsc-bit-per-component = <8>;
233 qcom,mdss-dsc-bit-per-pixel = <8>;
234 qcom,mdss-dsc-block-prediction-enable;
235 };
236
237 dsi_nt35597_truly_dsc_cmd_config1: config1 {
238 qcom,lm-split = <720 720>;
239 qcom,mdss-dsc-encoders = <1>; /* 3D Mux */
240 qcom,mdss-dsc-slice-height = <16>;
241 qcom,mdss-dsc-slice-width = <720>;
242 qcom,mdss-dsc-slice-per-pkt = <2>;
243
244 qcom,mdss-dsc-bit-per-component = <8>;
245 qcom,mdss-dsc-bit-per-pixel = <8>;
246 qcom,mdss-dsc-block-prediction-enable;
247 };
248
249 dsi_nt35597_truly_dsc_cmd_config2: config2 {
250 qcom,lm-split = <720 720>;
251 qcom,mdss-dsc-encoders = <2>; /* DSC Merge */
252 qcom,mdss-dsc-slice-height = <16>;
253 qcom,mdss-dsc-slice-width = <720>;
254 qcom,mdss-dsc-slice-per-pkt = <2>;
255
256 qcom,mdss-dsc-bit-per-component = <8>;
257 qcom,mdss-dsc-bit-per-pixel = <8>;
258 qcom,mdss-dsc-block-prediction-enable;
259 };
260 };
261};