blob: 1610bdedee6b9356f0030ca69b15ba59bafc53d6 [file] [log] [blame]
Paul Walmsleyc0718df2011-03-10 22:17:45 -07001/*
2 * OMAP4 Voltage Controller (VC) data
3 *
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008, 2011 Nokia Corporation
10 * Kalle Jokiniemi
11 * Paul Walmsley
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17#include <linux/io.h>
18#include <linux/err.h>
19#include <linux/init.h>
20
21#include <plat/common.h>
22
23#include "prm44xx.h"
24#include "prm-regbits-44xx.h"
25#include "voltage.h"
26
27#include "vc.h"
28
29/*
30 * VC data common to 44xx chips
31 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
32 */
Kevin Hilmand84adcf2011-03-22 16:14:57 -070033static const struct omap_vc_common omap4_vc_common = {
Paul Walmsleyc0718df2011-03-10 22:17:45 -070034 .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
35 .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
Kevin Hilmane4e021c2011-06-09 11:01:55 -070036 .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070037 .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,
38 .data_shift = OMAP4430_DATA_SHIFT,
39 .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT,
40 .regaddr_shift = OMAP4430_REGADDR_SHIFT,
41 .valid = OMAP4430_VALID_MASK,
42 .cmd_on_shift = OMAP4430_ON_SHIFT,
43 .cmd_on_mask = OMAP4430_ON_MASK,
44 .cmd_onlp_shift = OMAP4430_ONLP_SHIFT,
45 .cmd_ret_shift = OMAP4430_RET_SHIFT,
46 .cmd_off_shift = OMAP4430_OFF_SHIFT,
Kevin Hilman24d31942011-03-29 15:57:16 -070047 .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070048};
49
50/* VC instance data for each controllable voltage line */
Kevin Hilmand84adcf2011-03-22 16:14:57 -070051struct omap_vc_channel omap4_vc_mpu = {
Kevin Hilman24d31942011-03-29 15:57:16 -070052 .flags = OMAP_VC_CHANNEL_DEFAULT,
Kevin Hilmand84adcf2011-03-22 16:14:57 -070053 .common = &omap4_vc_common,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070054 .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070055 .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070056 .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK,
Kevin Hilmane4e021c2011-06-09 11:01:55 -070057 .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK,
Kevin Hilman24d31942011-03-29 15:57:16 -070058 .cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070059};
60
Kevin Hilmand84adcf2011-03-22 16:14:57 -070061struct omap_vc_channel omap4_vc_iva = {
62 .common = &omap4_vc_common,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070063 .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070064 .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070065 .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK,
Kevin Hilmane4e021c2011-06-09 11:01:55 -070066 .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK,
Kevin Hilman24d31942011-03-29 15:57:16 -070067 .cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070068};
69
Kevin Hilmand84adcf2011-03-22 16:14:57 -070070struct omap_vc_channel omap4_vc_core = {
71 .common = &omap4_vc_common,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070072 .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070073 .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070074 .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK,
Kevin Hilmane4e021c2011-06-09 11:01:55 -070075 .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK,
Kevin Hilman24d31942011-03-29 15:57:16 -070076 .cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070077};
78