blob: d9ba6b879fc1b25e25f8d006c8b57ab722310c7d [file] [log] [blame]
Nishanth Menon5a0f93c2014-11-07 11:47:13 -06001/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "dra74x.dtsi"
Nishanth Menon5a0f93c2014-11-07 11:47:13 -060011#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13
14/ {
15 model = "TI AM5728 BeagleBoard-X15";
16 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
17
18 aliases {
19 rtc0 = &mcp_rtc;
20 rtc1 = &tps659038_rtc;
Nishanth Menon00edd312015-04-08 18:56:27 -050021 rtc2 = &rtc;
Tomi Valkeinen0c534932015-02-12 12:23:10 +020022 display0 = &hdmi0;
Nishanth Menon5a0f93c2014-11-07 11:47:13 -060023 };
24
25 memory {
26 device_type = "memory";
27 reg = <0x80000000 0x80000000>;
28 };
29
30 vdd_3v3: fixedregulator-vdd_3v3 {
31 compatible = "regulator-fixed";
32 regulator-name = "vdd_3v3";
33 vin-supply = <&regen1>;
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 };
37
Peter Ujfalusid929e8b2015-08-24 10:20:06 +030038 aic_dvdd: fixedregulator-aic_dvdd {
39 compatible = "regulator-fixed";
40 regulator-name = "aic_dvdd_fixed";
41 vin-supply = <&vdd_3v3>;
42 regulator-min-microvolt = <1800000>;
43 regulator-max-microvolt = <1800000>;
44 };
45
Nishanth Menon5a0f93c2014-11-07 11:47:13 -060046 vtt_fixed: fixedregulator-vtt {
47 /* TPS51200 */
48 compatible = "regulator-fixed";
49 regulator-name = "vtt_fixed";
50 vin-supply = <&smps3_reg>;
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-always-on;
54 regulator-boot-on;
55 enable-active-high;
56 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
57 };
58
59 leds {
60 compatible = "gpio-leds";
61 pinctrl-names = "default";
62 pinctrl-0 = <&leds_pins_default>;
63
64 led@0 {
65 label = "beagle-x15:usr0";
66 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
67 linux,default-trigger = "heartbeat";
68 default-state = "off";
69 };
70
71 led@1 {
72 label = "beagle-x15:usr1";
73 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
74 linux,default-trigger = "cpu0";
75 default-state = "off";
76 };
77
78 led@2 {
79 label = "beagle-x15:usr2";
80 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
81 linux,default-trigger = "mmc0";
82 default-state = "off";
83 };
84
85 led@3 {
86 label = "beagle-x15:usr3";
87 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger = "ide-disk";
89 default-state = "off";
90 };
91 };
Nishanth Menon7a03f2c2015-01-05 10:32:29 -060092
93 gpio_fan: gpio_fan {
94 /* Based on 5v 500mA AFB02505HHB */
95 compatible = "gpio-fan";
Nishanth Menoned12f102015-04-09 17:33:17 -050096 gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
Nishanth Menon7a03f2c2015-01-05 10:32:29 -060097 gpio-fan,speed-map = <0 0>,
98 <13000 1>;
Nishanth Menond723cfe2015-03-23 14:39:39 -050099 #cooling-cells = <2>;
Nishanth Menon7a03f2c2015-01-05 10:32:29 -0600100 };
Roger Quadrosf60db982015-01-26 14:15:30 +0200101
102 extcon_usb1: extcon_usb1 {
103 compatible = "linux,extcon-usb-gpio";
104 id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&extcon_usb1_pins>;
107 };
108
Tomi Valkeinen0c534932015-02-12 12:23:10 +0200109 hdmi0: connector {
110 compatible = "hdmi-connector";
111 label = "hdmi";
112
113 type = "a";
114
115 port {
116 hdmi_connector_in: endpoint {
117 remote-endpoint = <&tpd12s015_out>;
118 };
119 };
120 };
121
122 tpd12s015: encoder {
123 compatible = "ti,tpd12s015";
124
125 pinctrl-names = "default";
126 pinctrl-0 = <&tpd12s015_pins>;
127
128 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
129 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
130 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
131
132 ports {
133 #address-cells = <1>;
134 #size-cells = <0>;
135
136 port@0 {
137 reg = <0>;
138
139 tpd12s015_in: endpoint {
140 remote-endpoint = <&hdmi_out>;
141 };
142 };
143
144 port@1 {
145 reg = <1>;
146
147 tpd12s015_out: endpoint {
148 remote-endpoint = <&hdmi_connector_in>;
149 };
150 };
151 };
152 };
Peter Ujfalusia00e3682015-08-24 10:20:07 +0300153
154 sound0: sound@0 {
155 compatible = "simple-audio-card";
156 simple-audio-card,name = "BeagleBoard-X15";
157 simple-audio-card,widgets =
158 "Line", "Line Out",
159 "Line", "Line In";
160 simple-audio-card,routing =
161 "Line Out", "LLOUT",
162 "Line Out", "RLOUT",
163 "MIC2L", "Line In",
164 "MIC2R", "Line In";
165 simple-audio-card,format = "dsp_b";
166 simple-audio-card,bitclock-master = <&sound0_master>;
167 simple-audio-card,frame-master = <&sound0_master>;
168 simple-audio-card,bitclock-inversion;
169
170 simple-audio-card,cpu {
171 sound-dai = <&mcasp3>;
172 };
173
174 sound0_master: simple-audio-card,codec {
175 sound-dai = <&tlv320aic3104>;
176 clocks = <&clkout2_clk>;
177 };
178 };
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600179};
180
181&dra7_pmx_core {
182 leds_pins_default: leds_pins_default {
183 pinctrl-single,pins = <
184 0x3a8 (PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
185 0x3ac (PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
186 0x3c0 (PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
187 0x3c4 (PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
188 >;
189 };
190
191 i2c1_pins_default: i2c1_pins_default {
192 pinctrl-single,pins = <
193 0x400 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
194 0x404 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
195 >;
196 };
197
Tomi Valkeinen0c534932015-02-12 12:23:10 +0200198 hdmi_pins: pinmux_hdmi_pins {
199 pinctrl-single,pins = <
200 0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
201 0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
202 >;
203 };
204
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600205 i2c3_pins_default: i2c3_pins_default {
206 pinctrl-single,pins = <
207 0x2a4 (PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
208 0x2a8 (PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
209 >;
210 };
211
212 uart3_pins_default: uart3_pins_default {
213 pinctrl-single,pins = <
Nishanth Menon5eb67192015-04-08 17:40:59 -0500214 0x3f8 (PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
215 0x3fc (PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600216 >;
217 };
218
219 mmc1_pins_default: mmc1_pins_default {
220 pinctrl-single,pins = <
221 0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
222 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
223 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
224 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
225 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
226 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
227 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
228 >;
229 };
230
231 mmc2_pins_default: mmc2_pins_default {
232 pinctrl-single,pins = <
233 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
234 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
235 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
236 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
237 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
238 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
239 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
240 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
241 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
242 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
243 >;
244 };
245
Felipe Balbia75dacf2014-12-04 15:02:57 -0600246 cpsw_pins_default: cpsw_pins_default {
247 pinctrl-single,pins = <
248 /* Slave 1 */
249 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
250 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
251 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
252 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
253 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
254 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
255 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
256 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
257 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
258 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
259 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
260 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
261
262 /* Slave 2 */
263 0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
264 0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
265 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
266 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
267 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
268 0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
269 0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
270 0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
271 0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
272 0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
273 0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
274 0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
275 >;
276
277 };
278
279 cpsw_pins_sleep: cpsw_pins_sleep {
280 pinctrl-single,pins = <
281 /* Slave 1 */
282 0x250 (PIN_INPUT | MUX_MODE15)
283 0x254 (PIN_INPUT | MUX_MODE15)
284 0x258 (PIN_INPUT | MUX_MODE15)
285 0x25c (PIN_INPUT | MUX_MODE15)
286 0x260 (PIN_INPUT | MUX_MODE15)
287 0x264 (PIN_INPUT | MUX_MODE15)
288 0x268 (PIN_INPUT | MUX_MODE15)
289 0x26c (PIN_INPUT | MUX_MODE15)
290 0x270 (PIN_INPUT | MUX_MODE15)
291 0x274 (PIN_INPUT | MUX_MODE15)
292 0x278 (PIN_INPUT | MUX_MODE15)
293 0x27c (PIN_INPUT | MUX_MODE15)
294
295 /* Slave 2 */
296 0x198 (PIN_INPUT | MUX_MODE15)
297 0x19c (PIN_INPUT | MUX_MODE15)
298 0x1a0 (PIN_INPUT | MUX_MODE15)
299 0x1a4 (PIN_INPUT | MUX_MODE15)
300 0x1a8 (PIN_INPUT | MUX_MODE15)
301 0x1ac (PIN_INPUT | MUX_MODE15)
302 0x1b0 (PIN_INPUT | MUX_MODE15)
303 0x1b4 (PIN_INPUT | MUX_MODE15)
304 0x1b8 (PIN_INPUT | MUX_MODE15)
305 0x1bc (PIN_INPUT | MUX_MODE15)
306 0x1c0 (PIN_INPUT | MUX_MODE15)
307 0x1c4 (PIN_INPUT | MUX_MODE15)
308 >;
309 };
310
311 davinci_mdio_pins_default: davinci_mdio_pins_default {
312 pinctrl-single,pins = <
313 /* MDIO */
314 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
315 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
316 >;
317 };
318
319 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
320 pinctrl-single,pins = <
321 0x23c (PIN_INPUT | MUX_MODE15)
322 0x240 (PIN_INPUT | MUX_MODE15)
323 >;
324 };
325
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600326 tps659038_pins_default: tps659038_pins_default {
327 pinctrl-single,pins = <
328 0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
329 >;
330 };
331
332 tmp102_pins_default: tmp102_pins_default {
333 pinctrl-single,pins = <
334 0x3C8 (PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
335 >;
336 };
337
338 mcp79410_pins_default: mcp79410_pins_default {
339 pinctrl-single,pins = <
340 0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
341 >;
342 };
343
344 usb1_pins: pinmux_usb1_pins {
345 pinctrl-single,pins = <
346 0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
347 >;
348 };
349
Roger Quadrosf60db982015-01-26 14:15:30 +0200350 extcon_usb1_pins: extcon_usb1_pins {
351 pinctrl-single,pins = <
352 0x3ec (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
353 >;
354 };
355
Tomi Valkeinen0c534932015-02-12 12:23:10 +0200356 tpd12s015_pins: pinmux_tpd12s015_pins {
357 pinctrl-single,pins = <
358 0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
359 0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
360 0x370 (PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
361 >;
362 };
Peter Ujfalusia00e3682015-08-24 10:20:07 +0300363
364 clkout2_pins_default: clkout2_pins_default {
365 pinctrl-single,pins = <
366 0x294 (PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
367 >;
368 };
369
370 clkout2_pins_sleep: clkout2_pins_sleep {
371 pinctrl-single,pins = <
372 0x294 (PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
373 >;
374 };
375
376 mcasp3_pins_default: mcasp3_pins_default {
377 pinctrl-single,pins = <
378 0x324 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
379 0x328 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
380 0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
381 0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
382 >;
383 };
384
385 mcasp3_pins_sleep: mcasp3_pins_sleep {
386 pinctrl-single,pins = <
387 0x324 (PIN_INPUT | MUX_MODE15)
388 0x328 (PIN_INPUT | MUX_MODE15)
389 0x32c (PIN_INPUT | MUX_MODE15)
390 0x330 (PIN_INPUT | MUX_MODE15)
391 >;
392 };
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600393};
394
395&i2c1 {
396 status = "okay";
397 pinctrl-names = "default";
398 pinctrl-0 = <&i2c1_pins_default>;
399 clock-frequency = <400000>;
400
401 tps659038: tps659038@58 {
402 compatible = "ti,tps659038";
403 reg = <0x58>;
404 interrupt-parent = <&gpio1>;
405 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
406
407 pinctrl-names = "default";
408 pinctrl-0 = <&tps659038_pins_default>;
409
410 #interrupt-cells = <2>;
411 interrupt-controller;
412
413 ti,system-power-controller;
414
415 tps659038_pmic {
416 compatible = "ti,tps659038-pmic";
417
418 regulators {
419 smps12_reg: smps12 {
420 /* VDD_MPU */
421 regulator-name = "smps12";
422 regulator-min-microvolt = < 850000>;
423 regulator-max-microvolt = <1250000>;
424 regulator-always-on;
425 regulator-boot-on;
426 };
427
428 smps3_reg: smps3 {
429 /* VDD_DDR */
430 regulator-name = "smps3";
431 regulator-min-microvolt = <1350000>;
432 regulator-max-microvolt = <1350000>;
433 regulator-always-on;
434 regulator-boot-on;
435 };
436
437 smps45_reg: smps45 {
438 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
439 regulator-name = "smps45";
440 regulator-min-microvolt = < 850000>;
441 regulator-max-microvolt = <1150000>;
442 regulator-always-on;
443 regulator-boot-on;
444 };
445
446 smps6_reg: smps6 {
447 /* VDD_CORE */
448 regulator-name = "smps6";
449 regulator-min-microvolt = <850000>;
450 regulator-max-microvolt = <1030000>;
451 regulator-always-on;
452 regulator-boot-on;
453 };
454
455 /* SMPS7 unused */
456
457 smps8_reg: smps8 {
458 /* VDD_1V8 */
459 regulator-name = "smps8";
460 regulator-min-microvolt = <1800000>;
461 regulator-max-microvolt = <1800000>;
462 regulator-always-on;
463 regulator-boot-on;
464 };
465
466 /* SMPS9 unused */
467
468 ldo1_reg: ldo1 {
Tomi Valkeinen7e381ec2015-09-25 16:02:03 +0300469 /* VDD_SD / VDDSHV8 */
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600470 regulator-name = "ldo1";
471 regulator-min-microvolt = <1800000>;
472 regulator-max-microvolt = <3300000>;
473 regulator-boot-on;
Tomi Valkeinen7e381ec2015-09-25 16:02:03 +0300474 regulator-always-on;
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600475 };
476
477 ldo2_reg: ldo2 {
478 /* VDD_SHV5 */
479 regulator-name = "ldo2";
480 regulator-min-microvolt = <3300000>;
481 regulator-max-microvolt = <3300000>;
482 regulator-always-on;
483 regulator-boot-on;
484 };
485
486 ldo3_reg: ldo3 {
Nishanth Menon50052962015-09-03 14:23:45 -0500487 /* VDDA_1V8_PHYA */
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600488 regulator-name = "ldo3";
489 regulator-min-microvolt = <1800000>;
490 regulator-max-microvolt = <1800000>;
491 regulator-always-on;
492 regulator-boot-on;
493 };
494
Nishanth Menon50052962015-09-03 14:23:45 -0500495 ldo4_reg: ldo4 {
496 /* VDDA_1V8_PHYB */
497 regulator-name = "ldo4";
498 regulator-min-microvolt = <1800000>;
499 regulator-max-microvolt = <1800000>;
500 regulator-always-on;
501 regulator-boot-on;
502 };
503
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600504 ldo9_reg: ldo9 {
505 /* VDD_RTC */
506 regulator-name = "ldo9";
507 regulator-min-microvolt = <1050000>;
508 regulator-max-microvolt = <1050000>;
509 regulator-always-on;
510 regulator-boot-on;
511 };
512
513 ldoln_reg: ldoln {
514 /* VDDA_1V8_PLL */
515 regulator-name = "ldoln";
516 regulator-min-microvolt = <1800000>;
517 regulator-max-microvolt = <1800000>;
518 regulator-always-on;
519 regulator-boot-on;
520 };
521
522 ldousb_reg: ldousb {
523 /* VDDA_3V_USB: VDDA_USBHS33 */
524 regulator-name = "ldousb";
525 regulator-min-microvolt = <3300000>;
526 regulator-max-microvolt = <3300000>;
527 regulator-boot-on;
528 };
529
530 regen1: regen1 {
531 /* VDD_3V3_ON */
532 regulator-name = "regen1";
533 regulator-boot-on;
534 regulator-always-on;
535 };
536 };
537 };
538
539 tps659038_rtc: tps659038_rtc {
540 compatible = "ti,palmas-rtc";
541 interrupt-parent = <&tps659038>;
542 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
543 wakeup-source;
544 };
545
546 tps659038_pwr_button: tps659038_pwr_button {
547 compatible = "ti,palmas-pwrbutton";
548 interrupt-parent = <&tps659038>;
549 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
550 wakeup-source;
551 ti,palmas-long-press-seconds = <12>;
552 };
Nishanth Menon7a03f2c2015-01-05 10:32:29 -0600553
554 tps659038_gpio: tps659038_gpio {
555 compatible = "ti,palmas-gpio";
556 gpio-controller;
557 #gpio-cells = <2>;
558 };
Roger Quadros84ad1ba2015-07-27 16:10:17 +0300559
560 extcon_usb2: tps659038_usb {
561 compatible = "ti,palmas-usb-vid";
562 ti,enable-vbus-detection;
563 ti,enable-id-detection;
564 id-gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
565 };
566
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600567 };
568
569 tmp102: tmp102@48 {
570 compatible = "ti,tmp102";
571 reg = <0x48>;
572 pinctrl-names = "default";
573 pinctrl-0 = <&tmp102_pins_default>;
574 interrupt-parent = <&gpio7>;
575 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
Nishanth Menond723cfe2015-03-23 14:39:39 -0500576 #thermal-sensor-cells = <1>;
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600577 };
Peter Ujfalusia00e3682015-08-24 10:20:07 +0300578
579 tlv320aic3104: tlv320aic3104@18 {
580 #sound-dai-cells = <0>;
581 compatible = "ti,tlv320aic3104";
582 reg = <0x18>;
583 pinctrl-names = "default", "sleep";
584 pinctrl-0 = <&clkout2_pins_default>;
585 pinctrl-1 = <&clkout2_pins_sleep>;
586 status = "okay";
587 adc-settle-ms = <40>;
588
589 AVDD-supply = <&vdd_3v3>;
590 IOVDD-supply = <&vdd_3v3>;
591 DRVDD-supply = <&vdd_3v3>;
592 DVDD-supply = <&aic_dvdd>;
593 };
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600594};
595
596&i2c3 {
597 status = "okay";
598 pinctrl-names = "default";
599 pinctrl-0 = <&i2c3_pins_default>;
600 clock-frequency = <400000>;
601
602 mcp_rtc: rtc@6f {
603 compatible = "microchip,mcp7941x";
604 reg = <0x6f>;
Nishanth Menonc22c7f32015-09-03 14:24:00 -0500605 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
606 <&dra7_pmx_core 0x424>;
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600607
608 pinctrl-names = "default";
609 pinctrl-0 = <&mcp79410_pins_default>;
610
611 vcc-supply = <&vdd_3v3>;
612 wakeup-source;
613 };
614};
615
616&gpio7 {
617 ti,no-reset-on-init;
618 ti,no-idle-on-init;
619};
620
621&cpu0 {
622 cpu0-supply = <&smps12_reg>;
623 voltage-tolerance = <1>;
624};
625
626&uart3 {
627 status = "okay";
Marc Zyngier783d3182015-03-11 15:43:44 +0000628 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
Nishanth Menon5eb67192015-04-08 17:40:59 -0500629 <&dra7_pmx_core 0x3f8>;
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600630
631 pinctrl-names = "default";
632 pinctrl-0 = <&uart3_pins_default>;
633};
634
Felipe Balbia75dacf2014-12-04 15:02:57 -0600635&mac {
636 status = "okay";
637 pinctrl-names = "default", "sleep";
638 pinctrl-0 = <&cpsw_pins_default>;
639 pinctrl-1 = <&cpsw_pins_sleep>;
640 dual_emac;
641};
642
643&cpsw_emac0 {
644 phy_id = <&davinci_mdio>, <1>;
645 phy-mode = "rgmii";
646 dual_emac_res_vlan = <1>;
647};
648
649&cpsw_emac1 {
650 phy_id = <&davinci_mdio>, <2>;
651 phy-mode = "rgmii";
652 dual_emac_res_vlan = <2>;
653};
654
655&davinci_mdio {
656 pinctrl-names = "default", "sleep";
657 pinctrl-0 = <&davinci_mdio_pins_default>;
658 pinctrl-1 = <&davinci_mdio_pins_sleep>;
659};
660
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600661&mmc1 {
662 status = "okay";
663
664 pinctrl-names = "default";
665 pinctrl-0 = <&mmc1_pins_default>;
666
667 vmmc-supply = <&ldo1_reg>;
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600668 bus-width = <4>;
Mugunthan V N267068d2015-10-12 14:37:12 +0530669 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600670};
671
672&mmc2 {
673 status = "okay";
674
675 pinctrl-names = "default";
676 pinctrl-0 = <&mmc2_pins_default>;
677
678 vmmc-supply = <&vdd_3v3>;
679 bus-width = <8>;
680 ti,non-removable;
681 cap-mmc-dual-data-rate;
682};
683
684&sata {
685 status = "okay";
686};
687
688&usb2_phy1 {
689 phy-supply = <&ldousb_reg>;
690};
691
Roger Quadros9ab402a2015-06-17 17:52:43 +0300692&usb2_phy2 {
693 phy-supply = <&ldousb_reg>;
694};
695
Nishanth Menon5a0f93c2014-11-07 11:47:13 -0600696&usb1 {
697 dr_mode = "host";
698 pinctrl-names = "default";
699 pinctrl-0 = <&usb1_pins>;
700};
Roger Quadrosf60db982015-01-26 14:15:30 +0200701
Roger Quadrosa7b0aa12015-03-17 11:43:51 +0200702&omap_dwc3_1 {
703 extcon = <&extcon_usb1>;
704};
705
706&omap_dwc3_2 {
707 extcon = <&extcon_usb2>;
708};
709
Roger Quadros726806a2015-01-26 14:15:31 +0200710&usb2 {
Roger Quadros84ad1ba2015-07-27 16:10:17 +0300711 /*
712 * Stand alone usage is peripheral only.
713 * However, with some resistor modifications
714 * this port can be used via expansion connectors
715 * as "host" or "dual-role". If so, provide
716 * the necessary dr_mode override in the expansion
717 * board's DT.
718 */
Roger Quadros726806a2015-01-26 14:15:31 +0200719 dr_mode = "peripheral";
720};
Nishanth Menond723cfe2015-03-23 14:39:39 -0500721
722&cpu_trips {
723 cpu_alert1: cpu_alert1 {
724 temperature = <50000>; /* millicelsius */
725 hysteresis = <2000>; /* millicelsius */
726 type = "active";
727 };
728};
729
730&cpu_cooling_maps {
731 map1 {
732 trip = <&cpu_alert1>;
733 cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
734 };
735};
736
737&thermal_zones {
738 board_thermal: board_thermal {
739 polling-delay-passive = <1250>; /* milliseconds */
740 polling-delay = <1500>; /* milliseconds */
741
742 /* sensor ID */
743 thermal-sensors = <&tmp102 0>;
744
745 board_trips: trips {
746 board_alert0: board_alert {
747 temperature = <40000>; /* millicelsius */
748 hysteresis = <2000>; /* millicelsius */
749 type = "active";
750 };
751
752 board_crit: board_crit {
753 temperature = <105000>; /* millicelsius */
754 hysteresis = <0>; /* millicelsius */
755 type = "critical";
756 };
757 };
758
759 board_cooling_maps: cooling-maps {
760 map0 {
761 trip = <&board_alert0>;
762 cooling-device =
763 <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
764 };
765 };
766 };
767};
Tomi Valkeinen0c534932015-02-12 12:23:10 +0200768
769&dss {
770 status = "ok";
771
772 vdda_video-supply = <&ldoln_reg>;
773};
774
775&hdmi {
776 status = "ok";
Nishanth Menon50052962015-09-03 14:23:45 -0500777 vdda-supply = <&ldo4_reg>;
Tomi Valkeinen0c534932015-02-12 12:23:10 +0200778
779 pinctrl-names = "default";
780 pinctrl-0 = <&hdmi_pins>;
781
782 port {
783 hdmi_out: endpoint {
784 remote-endpoint = <&tpd12s015_in>;
785 };
786 };
787};
Kishon Vijay Abraham I73c8f0c2015-07-28 19:09:10 +0530788
789&pcie1 {
790 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
791};
Peter Ujfalusia00e3682015-08-24 10:20:07 +0300792
793&mcasp3 {
794 #sound-dai-cells = <0>;
795 pinctrl-names = "default", "sleep";
796 pinctrl-0 = <&mcasp3_pins_default>;
797 pinctrl-1 = <&mcasp3_pins_sleep>;
798 status = "okay";
799
800 op-mode = <0>; /* MCASP_IIS_MODE */
801 tdm-slots = <2>;
802 /* 4 serializers */
803 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
804 1 2 0 0
805 >;
806};
Suman Annaebbf93f2015-09-18 13:16:34 -0500807
808&mailbox5 {
809 status = "okay";
810 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
811 status = "okay";
812 };
813 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
814 status = "okay";
815 };
816};
817
818&mailbox6 {
819 status = "okay";
820 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
821 status = "okay";
822 };
823 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
824 status = "okay";
825 };
826};