Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright © 2011-2012 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Ben Widawsky <ben@bwidawsk.net> |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * This file implements HW context support. On gen5+ a HW context consists of an |
| 30 | * opaque GPU object which is referenced at times of context saves and restores. |
| 31 | * With RC6 enabled, the context is also referenced as the GPU enters and exists |
| 32 | * from RC6 (GPU has it's own internal power context, except on gen5). Though |
| 33 | * something like a context does exist for the media ring, the code only |
| 34 | * supports contexts for the render ring. |
| 35 | * |
| 36 | * In software, there is a distinction between contexts created by the user, |
| 37 | * and the default HW context. The default HW context is used by GPU clients |
| 38 | * that do not request setup of their own hardware context. The default |
| 39 | * context's state is never restored to help prevent programming errors. This |
| 40 | * would happen if a client ran and piggy-backed off another clients GPU state. |
| 41 | * The default context only exists to give the GPU some offset to load as the |
| 42 | * current to invoke a save of the context we actually care about. In fact, the |
| 43 | * code could likely be constructed, albeit in a more complicated fashion, to |
| 44 | * never use the default context, though that limits the driver's ability to |
| 45 | * swap out, and/or destroy other contexts. |
| 46 | * |
| 47 | * All other contexts are created as a request by the GPU client. These contexts |
| 48 | * store GPU state, and thus allow GPU clients to not re-emit state (and |
| 49 | * potentially query certain state) at any time. The kernel driver makes |
| 50 | * certain that the appropriate commands are inserted. |
| 51 | * |
| 52 | * The context life cycle is semi-complicated in that context BOs may live |
| 53 | * longer than the context itself because of the way the hardware, and object |
| 54 | * tracking works. Below is a very crude representation of the state machine |
| 55 | * describing the context life. |
| 56 | * refcount pincount active |
| 57 | * S0: initial state 0 0 0 |
| 58 | * S1: context created 1 0 0 |
| 59 | * S2: context is currently running 2 1 X |
| 60 | * S3: GPU referenced, but not current 2 0 1 |
| 61 | * S4: context is current, but destroyed 1 1 0 |
| 62 | * S5: like S3, but destroyed 1 0 1 |
| 63 | * |
| 64 | * The most common (but not all) transitions: |
| 65 | * S0->S1: client creates a context |
| 66 | * S1->S2: client submits execbuf with context |
| 67 | * S2->S3: other clients submits execbuf with context |
| 68 | * S3->S1: context object was retired |
| 69 | * S3->S2: clients submits another execbuf |
| 70 | * S2->S4: context destroy called with current context |
| 71 | * S3->S5->S0: destroy path |
| 72 | * S4->S5->S0: destroy path on current context |
| 73 | * |
| 74 | * There are two confusing terms used above: |
| 75 | * The "current context" means the context which is currently running on the |
| 76 | * GPU. The GPU has loaded it's state already and has stored away the gtt |
| 77 | * offset of the BO. The GPU is not actively referencing the data at this |
| 78 | * offset, but it will on the next context switch. The only way to avoid this |
| 79 | * is to do a GPU reset. |
| 80 | * |
| 81 | * An "active context' is one which was previously the "current context" and is |
| 82 | * on the active list waiting for the next context switch to occur. Until this |
| 83 | * happens, the object must remain at the same gtt offset. It is therefore |
| 84 | * possible to destroy a context, but it is still active. |
| 85 | * |
| 86 | */ |
| 87 | |
| 88 | #include "drmP.h" |
| 89 | #include "i915_drm.h" |
| 90 | #include "i915_drv.h" |
| 91 | |
| 92 | static int get_context_size(struct drm_device *dev) |
| 93 | { |
| 94 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 95 | int ret; |
| 96 | u32 reg; |
| 97 | |
| 98 | switch (INTEL_INFO(dev)->gen) { |
| 99 | case 6: |
| 100 | reg = I915_READ(CXT_SIZE); |
| 101 | ret = GEN6_CXT_TOTAL_SIZE(reg) * 64; |
| 102 | break; |
| 103 | case 7: |
| 104 | reg = I915_READ(GEN7_CTX_SIZE); |
| 105 | ret = GEN7_CTX_TOTAL_SIZE(reg) * 64; |
| 106 | break; |
| 107 | default: |
| 108 | BUG(); |
| 109 | } |
| 110 | |
| 111 | return ret; |
| 112 | } |
| 113 | |
| 114 | /** |
| 115 | * The default context needs to exist per ring that uses contexts. It stores the |
| 116 | * context state of the GPU for applications that don't utilize HW contexts, as |
| 117 | * well as an idle case. |
| 118 | */ |
| 119 | static int create_default_context(struct drm_i915_private *dev_priv) |
| 120 | { |
| 121 | return 0; |
| 122 | } |
| 123 | |
| 124 | void i915_gem_context_init(struct drm_device *dev) |
| 125 | { |
| 126 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 127 | uint32_t ctx_size; |
| 128 | |
| 129 | if (!HAS_HW_CONTEXTS(dev)) |
| 130 | return; |
| 131 | |
| 132 | /* If called from reset, or thaw... we've been here already */ |
| 133 | if (dev_priv->hw_contexts_disabled) |
| 134 | return; |
| 135 | |
| 136 | ctx_size = get_context_size(dev); |
| 137 | dev_priv->hw_context_size = get_context_size(dev); |
| 138 | dev_priv->hw_context_size = round_up(dev_priv->hw_context_size, 4096); |
| 139 | |
| 140 | if (ctx_size <= 0 || ctx_size > (1<<20)) { |
| 141 | dev_priv->hw_contexts_disabled = true; |
| 142 | return; |
| 143 | } |
| 144 | |
| 145 | if (create_default_context(dev_priv)) { |
| 146 | dev_priv->hw_contexts_disabled = true; |
| 147 | return; |
| 148 | } |
| 149 | |
| 150 | DRM_DEBUG_DRIVER("HW context support initialized\n"); |
| 151 | } |
| 152 | |
| 153 | void i915_gem_context_fini(struct drm_device *dev) |
| 154 | { |
| 155 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 156 | |
| 157 | if (dev_priv->hw_contexts_disabled) |
| 158 | return; |
| 159 | } |
| 160 | |
| 161 | void i915_gem_context_open(struct drm_device *dev, struct drm_file *file) |
| 162 | { |
| 163 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 164 | |
| 165 | if (dev_priv->hw_contexts_disabled) |
| 166 | return; |
| 167 | } |
| 168 | |
| 169 | void i915_gem_context_close(struct drm_device *dev, struct drm_file *file) |
| 170 | { |
| 171 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 172 | |
| 173 | if (dev_priv->hw_contexts_disabled) |
| 174 | return; |
| 175 | } |