blob: 84e5a68635f12203c361cf837aab3f2bd4fdbca0 [file] [log] [blame]
Jim Cromie681a3e72006-06-27 02:54:21 -07001/* linux/drivers/char/pc8736x_gpio.c
2
3 National Semiconductor PC8736x GPIO driver. Allows a user space
4 process to play with the GPIO pins.
5
Jim Cromie27385082006-07-10 04:45:36 -07006 Copyright (c) 2005,2006 Jim Cromie <jim.cromie@gmail.com>
Jim Cromie681a3e72006-06-27 02:54:21 -07007
8 adapted from linux/drivers/char/scx200_gpio.c
9 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>,
10*/
11
Jim Cromie681a3e72006-06-27 02:54:21 -070012#include <linux/fs.h>
13#include <linux/module.h>
14#include <linux/errno.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
Jim Cromie27385082006-07-10 04:45:36 -070017#include <linux/cdev.h>
Jim Cromieec312312006-06-27 02:54:25 -070018#include <linux/io.h>
Jim Cromie681a3e72006-06-27 02:54:21 -070019#include <linux/ioport.h>
Jim Cromie8bcf6132006-06-27 02:54:25 -070020#include <linux/mutex.h>
Jim Cromie681a3e72006-06-27 02:54:21 -070021#include <linux/nsc_gpio.h>
Jim Cromie58b087c2006-06-27 02:54:22 -070022#include <linux/platform_device.h>
Jim Cromie681a3e72006-06-27 02:54:21 -070023#include <asm/uaccess.h>
Jim Cromie681a3e72006-06-27 02:54:21 -070024
Jim Cromie58b087c2006-06-27 02:54:22 -070025#define DEVNAME "pc8736x_gpio"
Jim Cromie681a3e72006-06-27 02:54:21 -070026
27MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
Jim Cromie4f197842006-07-10 04:45:35 -070028MODULE_DESCRIPTION("NatSemi/Winbond PC-8736x GPIO Pin Driver");
Jim Cromie681a3e72006-06-27 02:54:21 -070029MODULE_LICENSE("GPL");
30
31static int major; /* default to dynamic major */
32module_param(major, int, 0);
33MODULE_PARM_DESC(major, "Major device number");
34
Jim Cromie8bcf6132006-06-27 02:54:25 -070035static DEFINE_MUTEX(pc8736x_gpio_config_lock);
Jim Cromie681a3e72006-06-27 02:54:21 -070036static unsigned pc8736x_gpio_base;
Jim Cromie6cad56f2006-06-27 02:54:24 -070037static u8 pc8736x_gpio_shadow[4];
Jim Cromie681a3e72006-06-27 02:54:21 -070038
39#define SIO_BASE1 0x2E /* 1st command-reg to check */
40#define SIO_BASE2 0x4E /* alt command-reg to check */
Jim Cromie681a3e72006-06-27 02:54:21 -070041
42#define SIO_SID 0x20 /* SuperI/O ID Register */
43#define SIO_SID_VALUE 0xe9 /* Expected value in SuperI/O ID Register */
44
45#define SIO_CF1 0x21 /* chip config, bit0 is chip enable */
46
Jim Cromie4f197842006-07-10 04:45:35 -070047#define PC8736X_GPIO_RANGE 16 /* ioaddr range */
48#define PC8736X_GPIO_CT 32 /* minors matching 4 8 bit ports */
Jim Cromie58b087c2006-06-27 02:54:22 -070049
Jim Cromie681a3e72006-06-27 02:54:21 -070050#define SIO_UNIT_SEL 0x7 /* unit select reg */
51#define SIO_UNIT_ACT 0x30 /* unit enable */
52#define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */
53#define SIO_VLM_UNIT 0x0D
54#define SIO_TMS_UNIT 0x0E
55
56/* config-space addrs to read/write each unit's runtime addr */
57#define SIO_BASE_HADDR 0x60
58#define SIO_BASE_LADDR 0x61
59
60/* GPIO config-space pin-control addresses */
61#define SIO_GPIO_PIN_SELECT 0xF0
62#define SIO_GPIO_PIN_CONFIG 0xF1
63#define SIO_GPIO_PIN_EVENT 0xF2
64
65static unsigned char superio_cmd = 0;
66static unsigned char selected_device = 0xFF; /* bogus start val */
67
68/* GPIO port runtime access, functionality */
69static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */
70/* static int event_capable[] = { 1, 1, 0, 0 }; ports 2,3 are hobbled */
71
72#define PORT_OUT 0
73#define PORT_IN 1
74#define PORT_EVT_EN 2
75#define PORT_EVT_STST 3
76
Jim Cromie58b087c2006-06-27 02:54:22 -070077static struct platform_device *pdev; /* use in dev_*() */
78
Jim Cromie681a3e72006-06-27 02:54:21 -070079static inline void superio_outb(int addr, int val)
80{
81 outb_p(addr, superio_cmd);
82 outb_p(val, superio_cmd + 1);
83}
84
85static inline int superio_inb(int addr)
86{
87 outb_p(addr, superio_cmd);
88 return inb_p(superio_cmd + 1);
89}
90
91static int pc8736x_superio_present(void)
92{
93 /* try the 2 possible values, read a hardware reg to verify */
94 superio_cmd = SIO_BASE1;
95 if (superio_inb(SIO_SID) == SIO_SID_VALUE)
96 return superio_cmd;
97
98 superio_cmd = SIO_BASE2;
99 if (superio_inb(SIO_SID) == SIO_SID_VALUE)
100 return superio_cmd;
101
102 return 0;
103}
104
105static void device_select(unsigned devldn)
106{
107 superio_outb(SIO_UNIT_SEL, devldn);
108 selected_device = devldn;
109}
110
111static void select_pin(unsigned iminor)
112{
113 /* select GPIO port/pin from device minor number */
114 device_select(SIO_GPIO_UNIT);
115 superio_outb(SIO_GPIO_PIN_SELECT,
116 ((iminor << 1) & 0xF0) | (iminor & 0x7));
117}
118
119static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits,
120 u32 func_slct)
121{
122 u32 config, new_config;
Jim Cromie681a3e72006-06-27 02:54:21 -0700123
Jim Cromie8bcf6132006-06-27 02:54:25 -0700124 mutex_lock(&pc8736x_gpio_config_lock);
Jim Cromie681a3e72006-06-27 02:54:21 -0700125
126 device_select(SIO_GPIO_UNIT);
127 select_pin(index);
128
129 /* read current config value */
130 config = superio_inb(func_slct);
131
132 /* set new config */
133 new_config = (config & mask) | bits;
134 superio_outb(func_slct, new_config);
135
Jim Cromie8bcf6132006-06-27 02:54:25 -0700136 mutex_unlock(&pc8736x_gpio_config_lock);
Jim Cromie681a3e72006-06-27 02:54:21 -0700137
138 return config;
139}
140
141static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits)
142{
143 return pc8736x_gpio_configure_fn(index, mask, bits,
144 SIO_GPIO_PIN_CONFIG);
145}
146
147static int pc8736x_gpio_get(unsigned minor)
148{
149 int port, bit, val;
150
151 port = minor >> 3;
152 bit = minor & 7;
153 val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
154 val >>= bit;
155 val &= 1;
156
Jim Cromie58b087c2006-06-27 02:54:22 -0700157 dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n",
158 minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit,
159 val);
Jim Cromie681a3e72006-06-27 02:54:21 -0700160
161 return val;
162}
163
164static void pc8736x_gpio_set(unsigned minor, int val)
165{
166 int port, bit, curval;
167
168 minor &= 0x1f;
169 port = minor >> 3;
170 bit = minor & 7;
171 curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
172
Jim Cromie58b087c2006-06-27 02:54:22 -0700173 dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n",
174 pc8736x_gpio_base + port_offset[port] + PORT_OUT,
175 curval, bit, (curval & ~(1 << bit)), val, (val << bit));
Jim Cromie681a3e72006-06-27 02:54:21 -0700176
177 val = (curval & ~(1 << bit)) | (val << bit);
178
Jim Cromie58b087c2006-06-27 02:54:22 -0700179 dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)"
180 " %2x -> %2x\n", minor, port, bit, curval, val);
Jim Cromie681a3e72006-06-27 02:54:21 -0700181
182 outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT);
183
184 curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
185 val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
186
Jim Cromie58b087c2006-06-27 02:54:22 -0700187 dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val);
Jim Cromie6cad56f2006-06-27 02:54:24 -0700188 pc8736x_gpio_shadow[port] = val;
Jim Cromie681a3e72006-06-27 02:54:21 -0700189}
190
191static void pc8736x_gpio_set_high(unsigned index)
192{
193 pc8736x_gpio_set(index, 1);
194}
195
196static void pc8736x_gpio_set_low(unsigned index)
197{
198 pc8736x_gpio_set(index, 0);
199}
200
Jim Cromie6cad56f2006-06-27 02:54:24 -0700201static int pc8736x_gpio_current(unsigned minor)
Jim Cromie681a3e72006-06-27 02:54:21 -0700202{
Jim Cromie6cad56f2006-06-27 02:54:24 -0700203 int port, bit;
204 minor &= 0x1f;
205 port = minor >> 3;
206 bit = minor & 7;
207 return ((pc8736x_gpio_shadow[port] >> bit) & 0x01);
Jim Cromie681a3e72006-06-27 02:54:21 -0700208}
209
210static void pc8736x_gpio_change(unsigned index)
211{
Jim Cromie6cad56f2006-06-27 02:54:24 -0700212 pc8736x_gpio_set(index, !pc8736x_gpio_current(index));
Jim Cromie681a3e72006-06-27 02:54:21 -0700213}
214
Jim Cromie2e8f7a32006-07-14 00:24:26 -0700215static struct nsc_gpio_ops pc8736x_gpio_ops = {
Jim Cromie681a3e72006-06-27 02:54:21 -0700216 .owner = THIS_MODULE,
217 .gpio_config = pc8736x_gpio_configure,
218 .gpio_dump = nsc_gpio_dump,
219 .gpio_get = pc8736x_gpio_get,
220 .gpio_set = pc8736x_gpio_set,
Jim Cromie681a3e72006-06-27 02:54:21 -0700221 .gpio_change = pc8736x_gpio_change,
222 .gpio_current = pc8736x_gpio_current
223};
224
225static int pc8736x_gpio_open(struct inode *inode, struct file *file)
226{
227 unsigned m = iminor(inode);
Jim Cromie2e8f7a32006-07-14 00:24:26 -0700228 file->private_data = &pc8736x_gpio_ops;
Jim Cromie681a3e72006-06-27 02:54:21 -0700229
Jim Cromie58b087c2006-06-27 02:54:22 -0700230 dev_dbg(&pdev->dev, "open %d\n", m);
Jim Cromie681a3e72006-06-27 02:54:21 -0700231
Jim Cromie4f197842006-07-10 04:45:35 -0700232 if (m >= PC8736X_GPIO_CT)
Jim Cromie681a3e72006-06-27 02:54:21 -0700233 return -EINVAL;
234 return nonseekable_open(inode, file);
235}
236
Jim Cromie2e8f7a32006-07-14 00:24:26 -0700237static const struct file_operations pc8736x_gpio_fileops = {
Jim Cromie58b087c2006-06-27 02:54:22 -0700238 .owner = THIS_MODULE,
239 .open = pc8736x_gpio_open,
240 .write = nsc_gpio_write,
241 .read = nsc_gpio_read,
Jim Cromie681a3e72006-06-27 02:54:21 -0700242};
243
Jim Cromie6cad56f2006-06-27 02:54:24 -0700244static void __init pc8736x_init_shadow(void)
245{
246 int port;
247
248 /* read the current values driven on the GPIO signals */
249 for (port = 0; port < 4; ++port)
250 pc8736x_gpio_shadow[port]
251 = inb_p(pc8736x_gpio_base + port_offset[port]
252 + PORT_OUT);
253
254}
255
Jim Cromie27385082006-07-10 04:45:36 -0700256static struct cdev pc8736x_gpio_cdev;
257
Jim Cromie681a3e72006-06-27 02:54:21 -0700258static int __init pc8736x_gpio_init(void)
259{
Jim Cromiebabcfad2006-07-10 04:45:37 -0700260 int rc;
261 dev_t devid;
Jim Cromie681a3e72006-06-27 02:54:21 -0700262
Jim Cromie58b087c2006-06-27 02:54:22 -0700263 pdev = platform_device_alloc(DEVNAME, 0);
264 if (!pdev)
265 return -ENOMEM;
266
267 rc = platform_device_add(pdev);
268 if (rc) {
269 rc = -ENODEV;
270 goto undo_platform_dev_alloc;
271 }
272 dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n");
Jim Cromie681a3e72006-06-27 02:54:21 -0700273
274 if (!pc8736x_superio_present()) {
Jim Cromie58b087c2006-06-27 02:54:22 -0700275 rc = -ENODEV;
276 dev_err(&pdev->dev, "no device found\n");
277 goto undo_platform_dev_add;
Jim Cromie681a3e72006-06-27 02:54:21 -0700278 }
Jim Cromie2e8f7a32006-07-14 00:24:26 -0700279 pc8736x_gpio_ops.dev = &pdev->dev;
Jim Cromie681a3e72006-06-27 02:54:21 -0700280
281 /* Verify that chip and it's GPIO unit are both enabled.
282 My BIOS does this, so I take minimum action here
283 */
284 rc = superio_inb(SIO_CF1);
285 if (!(rc & 0x01)) {
Jim Cromie58b087c2006-06-27 02:54:22 -0700286 rc = -ENODEV;
287 dev_err(&pdev->dev, "device not enabled\n");
288 goto undo_platform_dev_add;
Jim Cromie681a3e72006-06-27 02:54:21 -0700289 }
290 device_select(SIO_GPIO_UNIT);
291 if (!superio_inb(SIO_UNIT_ACT)) {
Jim Cromie58b087c2006-06-27 02:54:22 -0700292 rc = -ENODEV;
293 dev_err(&pdev->dev, "GPIO unit not enabled\n");
294 goto undo_platform_dev_add;
Jim Cromie681a3e72006-06-27 02:54:21 -0700295 }
296
Jim Cromie58b087c2006-06-27 02:54:22 -0700297 /* read the GPIO unit base addr that chip responds to */
Jim Cromie681a3e72006-06-27 02:54:21 -0700298 pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8
299 | superio_inb(SIO_BASE_LADDR));
300
Jim Cromie4f197842006-07-10 04:45:35 -0700301 if (!request_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE, DEVNAME)) {
Jim Cromie58b087c2006-06-27 02:54:22 -0700302 rc = -ENODEV;
303 dev_err(&pdev->dev, "GPIO ioport %x busy\n",
304 pc8736x_gpio_base);
305 goto undo_platform_dev_add;
306 }
307 dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base);
Jim Cromie681a3e72006-06-27 02:54:21 -0700308
Jim Cromiebabcfad2006-07-10 04:45:37 -0700309 if (major) {
310 devid = MKDEV(major, 0);
311 rc = register_chrdev_region(devid, PC8736X_GPIO_CT, DEVNAME);
312 } else {
313 rc = alloc_chrdev_region(&devid, 0, PC8736X_GPIO_CT, DEVNAME);
314 major = MAJOR(devid);
315 }
316
Jim Cromie58b087c2006-06-27 02:54:22 -0700317 if (rc < 0) {
318 dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc);
Jim Cromie27385082006-07-10 04:45:36 -0700319 goto undo_request_region;
Jim Cromie681a3e72006-06-27 02:54:21 -0700320 }
321 if (!major) {
Jim Cromie58b087c2006-06-27 02:54:22 -0700322 major = rc;
323 dev_dbg(&pdev->dev, "got dynamic major %d\n", major);
Jim Cromie681a3e72006-06-27 02:54:21 -0700324 }
325
326 pc8736x_init_shadow();
Jim Cromiebabcfad2006-07-10 04:45:37 -0700327
328 /* ignore minor errs, and succeed */
Jim Cromie2e8f7a32006-07-14 00:24:26 -0700329 cdev_init(&pc8736x_gpio_cdev, &pc8736x_gpio_fileops);
Jim Cromiebabcfad2006-07-10 04:45:37 -0700330 cdev_add(&pc8736x_gpio_cdev, devid, PC8736X_GPIO_CT);
331
Jim Cromie681a3e72006-06-27 02:54:21 -0700332 return 0;
Jim Cromie58b087c2006-06-27 02:54:22 -0700333
Jim Cromie27385082006-07-10 04:45:36 -0700334undo_request_region:
335 release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
Jim Cromie58b087c2006-06-27 02:54:22 -0700336undo_platform_dev_add:
Ingo Molnar1017f6a2006-06-30 01:55:29 -0700337 platform_device_del(pdev);
Jim Cromie58b087c2006-06-27 02:54:22 -0700338undo_platform_dev_alloc:
Ingo Molnar1017f6a2006-06-30 01:55:29 -0700339 platform_device_put(pdev);
340
Jim Cromie58b087c2006-06-27 02:54:22 -0700341 return rc;
Jim Cromie681a3e72006-06-27 02:54:21 -0700342}
343
344static void __exit pc8736x_gpio_cleanup(void)
345{
Jim Cromie27385082006-07-10 04:45:36 -0700346 dev_dbg(&pdev->dev, "cleanup\n");
Jim Cromie681a3e72006-06-27 02:54:21 -0700347
Jim Cromie27385082006-07-10 04:45:36 -0700348 cdev_del(&pc8736x_gpio_cdev);
349 unregister_chrdev_region(MKDEV(major,0), PC8736X_GPIO_CT);
350 release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
Jim Cromie681a3e72006-06-27 02:54:21 -0700351
Jim Cromie27385082006-07-10 04:45:36 -0700352 platform_device_del(pdev);
353 platform_device_put(pdev);
Jim Cromie681a3e72006-06-27 02:54:21 -0700354}
355
Jim Cromie681a3e72006-06-27 02:54:21 -0700356module_init(pc8736x_gpio_init);
357module_exit(pc8736x_gpio_cleanup);