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Joe Perchese4ac92d2014-05-20 14:05:50 -07001#ifndef __SAMSUNG_H
2#define __SAMSUNG_H
3
Jovi Zhang99edb3d2011-03-30 05:30:41 -04004/*
Ben Dooksb4975492008-07-03 12:32:51 +01005 * Driver for Samsung SoC onboard UARTs.
6 *
Ben Dooksccae9412009-11-13 22:54:14 +00007 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
Ben Dooksb4975492008-07-03 12:32:51 +01008 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
Robert Baldyga7bb6b2f2014-12-10 12:49:22 +010015#include <linux/dmaengine.h>
16
Ben Dooksb4975492008-07-03 12:32:51 +010017struct s3c24xx_uart_info {
18 char *name;
19 unsigned int type;
20 unsigned int fifosize;
21 unsigned long rx_fifomask;
22 unsigned long rx_fifoshift;
23 unsigned long rx_fifofull;
24 unsigned long tx_fifomask;
25 unsigned long tx_fifoshift;
26 unsigned long tx_fifofull;
Thomas Abraham5f5a7a52011-10-24 11:47:46 +020027 unsigned int def_clk_sel;
28 unsigned long num_clks;
29 unsigned long clksel_mask;
30 unsigned long clksel_shift;
Ben Dooksb4975492008-07-03 12:32:51 +010031
Ben Dooks090f8482008-12-12 00:24:21 +000032 /* uart port features */
33
34 unsigned int has_divslot:1;
35
Ben Dooksb4975492008-07-03 12:32:51 +010036 /* uart controls */
37 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
38};
39
Thomas Abrahamda121502011-11-02 19:23:25 +090040struct s3c24xx_serial_drv_data {
41 struct s3c24xx_uart_info *info;
42 struct s3c2410_uartcfg *def_cfg;
43 unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
44};
45
Robert Baldyga7bb6b2f2014-12-10 12:49:22 +010046struct s3c24xx_uart_dma {
47 dma_filter_fn fn;
48 void *rx_param;
49 void *tx_param;
50
51 unsigned int rx_chan_id;
52 unsigned int tx_chan_id;
53
54 struct dma_slave_config rx_conf;
55 struct dma_slave_config tx_conf;
56
57 struct dma_chan *rx_chan;
58 struct dma_chan *tx_chan;
59
60 dma_addr_t rx_addr;
61 dma_addr_t tx_addr;
62
63 dma_cookie_t rx_cookie;
64 dma_cookie_t tx_cookie;
65
66 char *rx_buf;
67
68 dma_addr_t tx_transfer_addr;
69
70 size_t rx_size;
71 size_t tx_size;
72
73 struct dma_async_tx_descriptor *tx_desc;
74 struct dma_async_tx_descriptor *rx_desc;
75
76 int tx_bytes_requested;
77 int rx_bytes_requested;
78};
79
Ben Dooksb4975492008-07-03 12:32:51 +010080struct s3c24xx_uart_port {
81 unsigned char rx_claimed;
82 unsigned char tx_claimed;
Ben Dooks30555472008-10-21 14:06:36 +010083 unsigned int pm_level;
84 unsigned long baudclk_rate;
Marek Szyprowski81ccb2a2015-07-31 10:58:27 +020085 unsigned int min_dma_size;
Ben Dooksb4975492008-07-03 12:32:51 +010086
Ben Dooksb73c289c2008-10-21 14:07:04 +010087 unsigned int rx_irq;
88 unsigned int tx_irq;
89
Robert Baldyga29bef792014-12-10 12:49:26 +010090 unsigned int tx_in_progress;
91 unsigned int tx_mode;
Robert Baldygab543c302014-12-10 12:49:27 +010092 unsigned int rx_mode;
Robert Baldyga29bef792014-12-10 12:49:26 +010093
Ben Dooksb4975492008-07-03 12:32:51 +010094 struct s3c24xx_uart_info *info;
Ben Dooksb4975492008-07-03 12:32:51 +010095 struct clk *clk;
96 struct clk *baudclk;
97 struct uart_port port;
Thomas Abrahamda121502011-11-02 19:23:25 +090098 struct s3c24xx_serial_drv_data *drv_data;
Ben Dooks30555472008-10-21 14:06:36 +010099
Thomas Abraham4d84e972011-10-24 11:47:25 +0200100 /* reference to platform data */
101 struct s3c2410_uartcfg *cfg;
102
Robert Baldyga7bb6b2f2014-12-10 12:49:22 +0100103 struct s3c24xx_uart_dma *dma;
104
Ben Dooks30555472008-10-21 14:06:36 +0100105#ifdef CONFIG_CPU_FREQ
106 struct notifier_block freq_transition;
107#endif
Ben Dooksb4975492008-07-03 12:32:51 +0100108};
109
110/* conversion functions */
111
Jingoo Hand4aab202013-09-09 14:10:30 +0900112#define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev)
Ben Dooksb4975492008-07-03 12:32:51 +0100113
114/* register access controls */
115
116#define portaddr(port, reg) ((port)->membase + (reg))
Jingoo Han9fdedf52013-08-08 17:29:48 +0900117#define portaddrl(port, reg) \
118 ((unsigned long *)(unsigned long)((port)->membase + (reg)))
Ben Dooksb4975492008-07-03 12:32:51 +0100119
120#define rd_regb(port, reg) (__raw_readb(portaddr(port, reg)))
121#define rd_regl(port, reg) (__raw_readl(portaddr(port, reg)))
122
123#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg))
124#define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
125
Ben Dooksb4975492008-07-03 12:32:51 +0100126#endif