Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 1 | /* |
| 2 | * DTS file for AMD Seattle SoC |
| 3 | * |
| 4 | * Copyright (C) 2014 Advanced Micro Devices, Inc. |
| 5 | */ |
| 6 | |
| 7 | / { |
| 8 | compatible = "amd,seattle"; |
| 9 | interrupt-parent = <&gic0>; |
| 10 | #address-cells = <2>; |
| 11 | #size-cells = <2>; |
| 12 | |
| 13 | gic0: interrupt-controller@e1101000 { |
| 14 | compatible = "arm,gic-400", "arm,cortex-a15-gic"; |
| 15 | interrupt-controller; |
| 16 | #interrupt-cells = <3>; |
| 17 | #address-cells = <2>; |
| 18 | #size-cells = <2>; |
| 19 | reg = <0x0 0xe1110000 0 0x1000>, |
| 20 | <0x0 0xe112f000 0 0x2000>, |
Brijesh Singh | 4852773 | 2016-02-08 11:59:07 -0600 | [diff] [blame] | 21 | <0x0 0xe1140000 0 0x2000>, |
| 22 | <0x0 0xe1160000 0 0x2000>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 23 | interrupts = <1 9 0xf04>; |
| 24 | ranges = <0 0 0 0xe1100000 0 0x100000>; |
| 25 | v2m0: v2m@e0080000 { |
| 26 | compatible = "arm,gic-v2m-frame"; |
| 27 | msi-controller; |
| 28 | reg = <0x0 0x00080000 0 0x1000>; |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | timer { |
| 33 | compatible = "arm,armv8-timer"; |
| 34 | interrupts = <1 13 0xff04>, |
| 35 | <1 14 0xff04>, |
| 36 | <1 11 0xff04>, |
| 37 | <1 10 0xff04>; |
| 38 | }; |
| 39 | |
| 40 | pmu { |
| 41 | compatible = "arm,armv8-pmuv3"; |
| 42 | interrupts = <0 7 4>, |
| 43 | <0 8 4>, |
| 44 | <0 9 4>, |
| 45 | <0 10 4>, |
| 46 | <0 11 4>, |
| 47 | <0 12 4>, |
| 48 | <0 13 4>, |
| 49 | <0 14 4>; |
| 50 | }; |
| 51 | |
| 52 | smb0: smb { |
| 53 | compatible = "simple-bus"; |
| 54 | #address-cells = <2>; |
| 55 | #size-cells = <2>; |
| 56 | ranges; |
| 57 | |
Suravee Suthikulpanit | c91cb91 | 2016-02-08 11:59:08 -0600 | [diff] [blame] | 58 | /* |
| 59 | * dma-ranges is 40-bit address space containing: |
| 60 | * - GICv2m MSI register is at 0xe0080000 |
| 61 | * - DRAM range [0x8000000000 to 0xffffffffff] |
| 62 | */ |
| 63 | dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 64 | |
| 65 | /include/ "amd-seattle-clks.dtsi" |
| 66 | |
| 67 | sata0: sata@e0300000 { |
| 68 | compatible = "snps,dwc-ahci"; |
Suravee Suthikulpanit | 7973a3f | 2016-02-08 11:59:11 -0600 | [diff] [blame] | 69 | reg = <0 0xe0300000 0 0xf0000>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 70 | interrupts = <0 355 4>; |
| 71 | clocks = <&sataclk_333mhz>; |
| 72 | dma-coherent; |
| 73 | }; |
| 74 | |
Suravee Suthikulpanit | 7973a3f | 2016-02-08 11:59:11 -0600 | [diff] [blame] | 75 | /* This is for Rev B only */ |
| 76 | sata1: sata@e0d00000 { |
| 77 | status = "disabled"; |
| 78 | compatible = "snps,dwc-ahci"; |
| 79 | reg = <0 0xe0d00000 0 0xf0000>; |
| 80 | interrupts = <0 354 4>; |
| 81 | clocks = <&sataclk_333mhz>; |
| 82 | dma-coherent; |
| 83 | }; |
| 84 | |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 85 | i2c0: i2c@e1000000 { |
| 86 | status = "disabled"; |
| 87 | compatible = "snps,designware-i2c"; |
| 88 | reg = <0 0xe1000000 0 0x1000>; |
| 89 | interrupts = <0 357 4>; |
Suravee Suthikulpanit | 1584fd1 | 2016-02-08 11:59:10 -0600 | [diff] [blame] | 90 | clocks = <&miscclk_250mhz>; |
| 91 | }; |
| 92 | |
| 93 | i2c1: i2c@e0050000 { |
| 94 | status = "disabled"; |
| 95 | compatible = "snps,designware-i2c"; |
| 96 | reg = <0 0xe0050000 0 0x1000>; |
| 97 | interrupts = <0 340 4>; |
| 98 | clocks = <&miscclk_250mhz>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 99 | }; |
| 100 | |
| 101 | serial0: serial@e1010000 { |
| 102 | compatible = "arm,pl011", "arm,primecell"; |
| 103 | reg = <0 0xe1010000 0 0x1000>; |
| 104 | interrupts = <0 328 4>; |
| 105 | clocks = <&uartspiclk_100mhz>, <&uartspiclk_100mhz>; |
| 106 | clock-names = "uartclk", "apb_pclk"; |
| 107 | }; |
| 108 | |
| 109 | spi0: ssp@e1020000 { |
| 110 | status = "disabled"; |
| 111 | compatible = "arm,pl022", "arm,primecell"; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 112 | reg = <0 0xe1020000 0 0x1000>; |
| 113 | spi-controller; |
| 114 | interrupts = <0 330 4>; |
| 115 | clocks = <&uartspiclk_100mhz>; |
| 116 | clock-names = "apb_pclk"; |
| 117 | }; |
| 118 | |
| 119 | spi1: ssp@e1030000 { |
| 120 | status = "disabled"; |
| 121 | compatible = "arm,pl022", "arm,primecell"; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 122 | reg = <0 0xe1030000 0 0x1000>; |
| 123 | spi-controller; |
| 124 | interrupts = <0 329 4>; |
| 125 | clocks = <&uartspiclk_100mhz>; |
| 126 | clock-names = "apb_pclk"; |
| 127 | num-cs = <1>; |
| 128 | #address-cells = <1>; |
| 129 | #size-cells = <0>; |
| 130 | }; |
| 131 | |
Suravee Suthikulpanit | ce00c22 | 2016-02-08 11:59:12 -0600 | [diff] [blame] | 132 | gpio0: gpio@e1040000 { /* Not available to OS for B0 */ |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 133 | status = "disabled"; |
| 134 | compatible = "arm,pl061", "arm,primecell"; |
| 135 | #gpio-cells = <2>; |
| 136 | reg = <0 0xe1040000 0 0x1000>; |
| 137 | gpio-controller; |
| 138 | interrupts = <0 359 4>; |
| 139 | interrupt-controller; |
| 140 | #interrupt-cells = <2>; |
Suravee Suthikulpanit | ce00c22 | 2016-02-08 11:59:12 -0600 | [diff] [blame] | 141 | clocks = <&miscclk_250mhz>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 142 | clock-names = "apb_pclk"; |
| 143 | }; |
| 144 | |
Suravee Suthikulpanit | ce00c22 | 2016-02-08 11:59:12 -0600 | [diff] [blame] | 145 | gpio1: gpio@e1050000 { /* [0:7] */ |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 146 | status = "disabled"; |
| 147 | compatible = "arm,pl061", "arm,primecell"; |
| 148 | #gpio-cells = <2>; |
| 149 | reg = <0 0xe1050000 0 0x1000>; |
| 150 | gpio-controller; |
Suravee Suthikulpanit | ce00c22 | 2016-02-08 11:59:12 -0600 | [diff] [blame] | 151 | interrupt-controller; |
| 152 | #interrupt-cells = <2>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 153 | interrupts = <0 358 4>; |
Suravee Suthikulpanit | ce00c22 | 2016-02-08 11:59:12 -0600 | [diff] [blame] | 154 | clocks = <&miscclk_250mhz>; |
| 155 | clock-names = "apb_pclk"; |
| 156 | }; |
| 157 | |
| 158 | gpio2: gpio@e0020000 { /* [8:15] */ |
| 159 | status = "disabled"; |
| 160 | compatible = "arm,pl061", "arm,primecell"; |
| 161 | #gpio-cells = <2>; |
| 162 | reg = <0 0xe0020000 0 0x1000>; |
| 163 | gpio-controller; |
| 164 | interrupt-controller; |
| 165 | #interrupt-cells = <2>; |
| 166 | interrupts = <0 366 4>; |
| 167 | clocks = <&miscclk_250mhz>; |
| 168 | clock-names = "apb_pclk"; |
| 169 | }; |
| 170 | |
| 171 | gpio3: gpio@e0030000 { /* [16:23] */ |
| 172 | status = "disabled"; |
| 173 | compatible = "arm,pl061", "arm,primecell"; |
| 174 | #gpio-cells = <2>; |
| 175 | reg = <0 0xe0030000 0 0x1000>; |
| 176 | gpio-controller; |
| 177 | interrupt-controller; |
| 178 | #interrupt-cells = <2>; |
| 179 | interrupts = <0 365 4>; |
| 180 | clocks = <&miscclk_250mhz>; |
| 181 | clock-names = "apb_pclk"; |
| 182 | }; |
| 183 | |
| 184 | gpio4: gpio@e0080000 { /* [24] */ |
| 185 | status = "disabled"; |
| 186 | compatible = "arm,pl061", "arm,primecell"; |
| 187 | #gpio-cells = <2>; |
| 188 | reg = <0 0xe0080000 0 0x1000>; |
| 189 | gpio-controller; |
| 190 | interrupt-controller; |
| 191 | #interrupt-cells = <2>; |
| 192 | interrupts = <0 361 4>; |
| 193 | clocks = <&miscclk_250mhz>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 194 | clock-names = "apb_pclk"; |
| 195 | }; |
| 196 | |
| 197 | ccp0: ccp@e0100000 { |
| 198 | status = "disabled"; |
| 199 | compatible = "amd,ccp-seattle-v1a"; |
| 200 | reg = <0 0xe0100000 0 0x10000>; |
| 201 | interrupts = <0 3 4>; |
| 202 | dma-coherent; |
| 203 | }; |
| 204 | |
| 205 | pcie0: pcie@f0000000 { |
| 206 | compatible = "pci-host-ecam-generic"; |
| 207 | #address-cells = <3>; |
| 208 | #size-cells = <2>; |
| 209 | #interrupt-cells = <1>; |
| 210 | device_type = "pci"; |
Suravee Suthikulpanit | 70bcc9b | 2014-11-30 21:46:40 -0600 | [diff] [blame] | 211 | bus-range = <0 0x7f>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 212 | msi-parent = <&v2m0>; |
| 213 | reg = <0 0xf0000000 0 0x10000000>; |
| 214 | |
| 215 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 216 | interrupt-map = |
| 217 | <0x1000 0x0 0x0 0x1 &gic0 0x0 0x0 0x0 0x120 0x1>, |
| 218 | <0x1000 0x0 0x0 0x2 &gic0 0x0 0x0 0x0 0x121 0x1>, |
| 219 | <0x1000 0x0 0x0 0x3 &gic0 0x0 0x0 0x0 0x122 0x1>, |
| 220 | <0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>; |
| 221 | |
| 222 | dma-coherent; |
Suravee Suthikulpanit | c91cb91 | 2016-02-08 11:59:08 -0600 | [diff] [blame] | 223 | dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 224 | ranges = |
| 225 | /* I/O Memory (size=64K) */ |
| 226 | <0x01000000 0x00 0x00000000 0x00 0xefff0000 0x00 0x00010000>, |
| 227 | /* 32-bit MMIO (size=2G) */ |
| 228 | <0x02000000 0x00 0x40000000 0x00 0x40000000 0x00 0x80000000>, |
| 229 | /* 64-bit MMIO (size= 124G) */ |
| 230 | <0x03000000 0x01 0x00000000 0x01 0x00000000 0x7f 0x00000000>; |
| 231 | }; |
Suravee Suthikulpanit | fb8d5e0 | 2016-02-08 11:59:13 -0600 | [diff] [blame] | 232 | |
| 233 | /* Perf CCN504 PMU */ |
Suravee Suthikulpanit | 18f9451 | 2016-02-12 07:20:43 +0700 | [diff] [blame] | 234 | ccn: ccn@e8000000 { |
Suravee Suthikulpanit | fb8d5e0 | 2016-02-08 11:59:13 -0600 | [diff] [blame] | 235 | compatible = "arm,ccn-504"; |
| 236 | reg = <0x0 0xe8000000 0 0x1000000>; |
| 237 | interrupts = <0 380 4>; |
| 238 | }; |
Brijesh Singh | 71edbeb | 2016-02-08 11:59:14 -0600 | [diff] [blame] | 239 | |
| 240 | ipmi_kcs: kcs@e0010000 { |
| 241 | status = "disabled"; |
| 242 | compatible = "ipmi-kcs"; |
| 243 | device_type = "ipmi"; |
| 244 | reg = <0x0 0xe0010000 0 0x8>; |
| 245 | interrupts = <0 389 4>; |
Brijesh Singh | 71edbeb | 2016-02-08 11:59:14 -0600 | [diff] [blame] | 246 | reg-size = <1>; |
| 247 | reg-spacing = <4>; |
| 248 | }; |
Suravee Suthikulpanit | 4190436 | 2014-11-26 11:51:09 +0700 | [diff] [blame] | 249 | }; |
| 250 | }; |