blob: e143a7fe93201266004c211aa195df2bd0f34391 [file] [log] [blame]
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000022#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
32#include <net/ip6_checksum.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000033#include <linux/microchipphy.h>
Phil Elwella1b53b12018-04-19 17:59:38 +010034#include <linux/of_net.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000035#include "lan78xx.h"
36
37#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
38#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
39#define DRIVER_NAME "lan78xx"
Woojung Huh20ff5562016-03-16 22:10:40 +000040#define DRIVER_VERSION "1.0.4"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000041
42#define TX_TIMEOUT_JIFFIES (5 * HZ)
43#define THROTTLE_JIFFIES (HZ / 8)
44#define UNLINK_TIMEOUT_MS 3
45
46#define RX_MAX_QUEUE_MEMORY (60 * 1518)
47
48#define SS_USB_PKT_SIZE (1024)
49#define HS_USB_PKT_SIZE (512)
50#define FS_USB_PKT_SIZE (64)
51
52#define MAX_RX_FIFO_SIZE (12 * 1024)
53#define MAX_TX_FIFO_SIZE (12 * 1024)
54#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
55#define DEFAULT_BULK_IN_DELAY (0x0800)
56#define MAX_SINGLE_PACKET_SIZE (9000)
57#define DEFAULT_TX_CSUM_ENABLE (true)
58#define DEFAULT_RX_CSUM_ENABLE (true)
59#define DEFAULT_TSO_CSUM_ENABLE (true)
60#define DEFAULT_VLAN_FILTER_ENABLE (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000061#define TX_OVERHEAD (8)
62#define RXW_PADDING 2
63
64#define LAN78XX_USB_VENDOR_ID (0x0424)
65#define LAN7800_USB_PRODUCT_ID (0x7800)
66#define LAN7850_USB_PRODUCT_ID (0x7850)
67#define LAN78XX_EEPROM_MAGIC (0x78A5)
68#define LAN78XX_OTP_MAGIC (0x78F3)
69
70#define MII_READ 1
71#define MII_WRITE 0
72
73#define EEPROM_INDICATOR (0xA5)
74#define EEPROM_MAC_OFFSET (0x01)
75#define MAX_EEPROM_SIZE 512
76#define OTP_INDICATOR_1 (0xF3)
77#define OTP_INDICATOR_2 (0xF7)
78
79#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
80 WAKE_MCAST | WAKE_BCAST | \
81 WAKE_ARP | WAKE_MAGIC)
82
83/* USB related defines */
84#define BULK_IN_PIPE 1
85#define BULK_OUT_PIPE 2
86
87/* default autosuspend delay (mSec)*/
88#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
89
Woojung Huh20ff5562016-03-16 22:10:40 +000090/* statistic update interval (mSec) */
91#define STAT_UPDATE_TIMER (1 * 1000)
92
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000093static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
94 "RX FCS Errors",
95 "RX Alignment Errors",
96 "Rx Fragment Errors",
97 "RX Jabber Errors",
98 "RX Undersize Frame Errors",
99 "RX Oversize Frame Errors",
100 "RX Dropped Frames",
101 "RX Unicast Byte Count",
102 "RX Broadcast Byte Count",
103 "RX Multicast Byte Count",
104 "RX Unicast Frames",
105 "RX Broadcast Frames",
106 "RX Multicast Frames",
107 "RX Pause Frames",
108 "RX 64 Byte Frames",
109 "RX 65 - 127 Byte Frames",
110 "RX 128 - 255 Byte Frames",
111 "RX 256 - 511 Bytes Frames",
112 "RX 512 - 1023 Byte Frames",
113 "RX 1024 - 1518 Byte Frames",
114 "RX Greater 1518 Byte Frames",
115 "EEE RX LPI Transitions",
116 "EEE RX LPI Time",
117 "TX FCS Errors",
118 "TX Excess Deferral Errors",
119 "TX Carrier Errors",
120 "TX Bad Byte Count",
121 "TX Single Collisions",
122 "TX Multiple Collisions",
123 "TX Excessive Collision",
124 "TX Late Collisions",
125 "TX Unicast Byte Count",
126 "TX Broadcast Byte Count",
127 "TX Multicast Byte Count",
128 "TX Unicast Frames",
129 "TX Broadcast Frames",
130 "TX Multicast Frames",
131 "TX Pause Frames",
132 "TX 64 Byte Frames",
133 "TX 65 - 127 Byte Frames",
134 "TX 128 - 255 Byte Frames",
135 "TX 256 - 511 Bytes Frames",
136 "TX 512 - 1023 Byte Frames",
137 "TX 1024 - 1518 Byte Frames",
138 "TX Greater 1518 Byte Frames",
139 "EEE TX LPI Transitions",
140 "EEE TX LPI Time",
141};
142
143struct lan78xx_statstage {
144 u32 rx_fcs_errors;
145 u32 rx_alignment_errors;
146 u32 rx_fragment_errors;
147 u32 rx_jabber_errors;
148 u32 rx_undersize_frame_errors;
149 u32 rx_oversize_frame_errors;
150 u32 rx_dropped_frames;
151 u32 rx_unicast_byte_count;
152 u32 rx_broadcast_byte_count;
153 u32 rx_multicast_byte_count;
154 u32 rx_unicast_frames;
155 u32 rx_broadcast_frames;
156 u32 rx_multicast_frames;
157 u32 rx_pause_frames;
158 u32 rx_64_byte_frames;
159 u32 rx_65_127_byte_frames;
160 u32 rx_128_255_byte_frames;
161 u32 rx_256_511_bytes_frames;
162 u32 rx_512_1023_byte_frames;
163 u32 rx_1024_1518_byte_frames;
164 u32 rx_greater_1518_byte_frames;
165 u32 eee_rx_lpi_transitions;
166 u32 eee_rx_lpi_time;
167 u32 tx_fcs_errors;
168 u32 tx_excess_deferral_errors;
169 u32 tx_carrier_errors;
170 u32 tx_bad_byte_count;
171 u32 tx_single_collisions;
172 u32 tx_multiple_collisions;
173 u32 tx_excessive_collision;
174 u32 tx_late_collisions;
175 u32 tx_unicast_byte_count;
176 u32 tx_broadcast_byte_count;
177 u32 tx_multicast_byte_count;
178 u32 tx_unicast_frames;
179 u32 tx_broadcast_frames;
180 u32 tx_multicast_frames;
181 u32 tx_pause_frames;
182 u32 tx_64_byte_frames;
183 u32 tx_65_127_byte_frames;
184 u32 tx_128_255_byte_frames;
185 u32 tx_256_511_bytes_frames;
186 u32 tx_512_1023_byte_frames;
187 u32 tx_1024_1518_byte_frames;
188 u32 tx_greater_1518_byte_frames;
189 u32 eee_tx_lpi_transitions;
190 u32 eee_tx_lpi_time;
191};
192
Woojung Huh20ff5562016-03-16 22:10:40 +0000193struct lan78xx_statstage64 {
194 u64 rx_fcs_errors;
195 u64 rx_alignment_errors;
196 u64 rx_fragment_errors;
197 u64 rx_jabber_errors;
198 u64 rx_undersize_frame_errors;
199 u64 rx_oversize_frame_errors;
200 u64 rx_dropped_frames;
201 u64 rx_unicast_byte_count;
202 u64 rx_broadcast_byte_count;
203 u64 rx_multicast_byte_count;
204 u64 rx_unicast_frames;
205 u64 rx_broadcast_frames;
206 u64 rx_multicast_frames;
207 u64 rx_pause_frames;
208 u64 rx_64_byte_frames;
209 u64 rx_65_127_byte_frames;
210 u64 rx_128_255_byte_frames;
211 u64 rx_256_511_bytes_frames;
212 u64 rx_512_1023_byte_frames;
213 u64 rx_1024_1518_byte_frames;
214 u64 rx_greater_1518_byte_frames;
215 u64 eee_rx_lpi_transitions;
216 u64 eee_rx_lpi_time;
217 u64 tx_fcs_errors;
218 u64 tx_excess_deferral_errors;
219 u64 tx_carrier_errors;
220 u64 tx_bad_byte_count;
221 u64 tx_single_collisions;
222 u64 tx_multiple_collisions;
223 u64 tx_excessive_collision;
224 u64 tx_late_collisions;
225 u64 tx_unicast_byte_count;
226 u64 tx_broadcast_byte_count;
227 u64 tx_multicast_byte_count;
228 u64 tx_unicast_frames;
229 u64 tx_broadcast_frames;
230 u64 tx_multicast_frames;
231 u64 tx_pause_frames;
232 u64 tx_64_byte_frames;
233 u64 tx_65_127_byte_frames;
234 u64 tx_128_255_byte_frames;
235 u64 tx_256_511_bytes_frames;
236 u64 tx_512_1023_byte_frames;
237 u64 tx_1024_1518_byte_frames;
238 u64 tx_greater_1518_byte_frames;
239 u64 eee_tx_lpi_transitions;
240 u64 eee_tx_lpi_time;
241};
242
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000243struct lan78xx_net;
244
245struct lan78xx_priv {
246 struct lan78xx_net *dev;
247 u32 rfe_ctl;
248 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
249 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
250 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
251 struct mutex dataport_mutex; /* for dataport access */
252 spinlock_t rfe_ctl_lock; /* for rfe register access */
253 struct work_struct set_multicast;
254 struct work_struct set_vlan;
255 u32 wol;
256};
257
258enum skb_state {
259 illegal = 0,
260 tx_start,
261 tx_done,
262 rx_start,
263 rx_done,
264 rx_cleanup,
265 unlink_start
266};
267
268struct skb_data { /* skb->cb is one of these */
269 struct urb *urb;
270 struct lan78xx_net *dev;
271 enum skb_state state;
272 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000273 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000274};
275
276struct usb_context {
277 struct usb_ctrlrequest req;
278 struct lan78xx_net *dev;
279};
280
281#define EVENT_TX_HALT 0
282#define EVENT_RX_HALT 1
283#define EVENT_RX_MEMORY 2
284#define EVENT_STS_SPLIT 3
285#define EVENT_LINK_RESET 4
286#define EVENT_RX_PAUSED 5
287#define EVENT_DEV_WAKING 6
288#define EVENT_DEV_ASLEEP 7
289#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000290#define EVENT_STAT_UPDATE 9
291
292struct statstage {
293 struct mutex access_lock; /* for stats access */
294 struct lan78xx_statstage saved;
295 struct lan78xx_statstage rollover_count;
296 struct lan78xx_statstage rollover_max;
297 struct lan78xx_statstage64 curr_stat;
298};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000299
300struct lan78xx_net {
301 struct net_device *net;
302 struct usb_device *udev;
303 struct usb_interface *intf;
304 void *driver_priv;
305
306 int rx_qlen;
307 int tx_qlen;
308 struct sk_buff_head rxq;
309 struct sk_buff_head txq;
310 struct sk_buff_head done;
311 struct sk_buff_head rxq_pause;
312 struct sk_buff_head txq_pend;
313
314 struct tasklet_struct bh;
315 struct delayed_work wq;
316
317 struct usb_host_endpoint *ep_blkin;
318 struct usb_host_endpoint *ep_blkout;
319 struct usb_host_endpoint *ep_intr;
320
321 int msg_enable;
322
323 struct urb *urb_intr;
324 struct usb_anchor deferred;
325
326 struct mutex phy_mutex; /* for phy access */
327 unsigned pipe_in, pipe_out, pipe_intr;
328
329 u32 hard_mtu; /* count any extra framing */
330 size_t rx_urb_size; /* size for rx urbs */
331
332 unsigned long flags;
333
334 wait_queue_head_t *wait;
335 unsigned char suspend_count;
336
337 unsigned maxpacket;
338 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000339 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000340
341 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000342
343 int link_on;
344 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000345
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000346 u32 chipid;
347 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000348 struct mii_bus *mdiobus;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000349
350 int fc_autoneg;
351 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000352
353 int delta;
354 struct statstage stats;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000355};
356
357/* use ethtool to change the level for any given device */
358static int msg_level = -1;
359module_param(msg_level, int, 0);
360MODULE_PARM_DESC(msg_level, "Override default message level");
361
362static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
363{
364 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
365 int ret;
366
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000367 if (!buf)
368 return -ENOMEM;
369
370 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
371 USB_VENDOR_REQUEST_READ_REGISTER,
372 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
373 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
374 if (likely(ret >= 0)) {
375 le32_to_cpus(buf);
376 *data = *buf;
377 } else {
378 netdev_warn(dev->net,
379 "Failed to read register index 0x%08x. ret = %d",
380 index, ret);
381 }
382
383 kfree(buf);
384
385 return ret;
386}
387
388static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
389{
390 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
391 int ret;
392
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000393 if (!buf)
394 return -ENOMEM;
395
396 *buf = data;
397 cpu_to_le32s(buf);
398
399 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
400 USB_VENDOR_REQUEST_WRITE_REGISTER,
401 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
402 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
403 if (unlikely(ret < 0)) {
404 netdev_warn(dev->net,
405 "Failed to write register index 0x%08x. ret = %d",
406 index, ret);
407 }
408
409 kfree(buf);
410
411 return ret;
412}
413
414static int lan78xx_read_stats(struct lan78xx_net *dev,
415 struct lan78xx_statstage *data)
416{
417 int ret = 0;
418 int i;
419 struct lan78xx_statstage *stats;
420 u32 *src;
421 u32 *dst;
422
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000423 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
424 if (!stats)
425 return -ENOMEM;
426
427 ret = usb_control_msg(dev->udev,
428 usb_rcvctrlpipe(dev->udev, 0),
429 USB_VENDOR_REQUEST_GET_STATS,
430 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
431 0,
432 0,
433 (void *)stats,
434 sizeof(*stats),
435 USB_CTRL_SET_TIMEOUT);
436 if (likely(ret >= 0)) {
437 src = (u32 *)stats;
438 dst = (u32 *)data;
439 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
440 le32_to_cpus(&src[i]);
441 dst[i] = src[i];
442 }
443 } else {
444 netdev_warn(dev->net,
445 "Failed to read stat ret = 0x%x", ret);
446 }
447
448 kfree(stats);
449
450 return ret;
451}
452
Woojung Huh20ff5562016-03-16 22:10:40 +0000453#define check_counter_rollover(struct1, dev_stats, member) { \
454 if (struct1->member < dev_stats.saved.member) \
455 dev_stats.rollover_count.member++; \
456 }
457
458static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
459 struct lan78xx_statstage *stats)
460{
461 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
462 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
463 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
464 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
465 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
466 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
467 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
468 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
469 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
470 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
471 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
472 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
473 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
474 check_counter_rollover(stats, dev->stats, rx_pause_frames);
475 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
476 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
477 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
478 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
479 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
480 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
481 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
482 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
483 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
484 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
485 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
486 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
487 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
488 check_counter_rollover(stats, dev->stats, tx_single_collisions);
489 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
490 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
491 check_counter_rollover(stats, dev->stats, tx_late_collisions);
492 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
493 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
494 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
495 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
496 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
497 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
498 check_counter_rollover(stats, dev->stats, tx_pause_frames);
499 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
500 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
501 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
502 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
503 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
504 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
505 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
506 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
507 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
508
509 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
510}
511
512static void lan78xx_update_stats(struct lan78xx_net *dev)
513{
514 u32 *p, *count, *max;
515 u64 *data;
516 int i;
517 struct lan78xx_statstage lan78xx_stats;
518
519 if (usb_autopm_get_interface(dev->intf) < 0)
520 return;
521
522 p = (u32 *)&lan78xx_stats;
523 count = (u32 *)&dev->stats.rollover_count;
524 max = (u32 *)&dev->stats.rollover_max;
525 data = (u64 *)&dev->stats.curr_stat;
526
527 mutex_lock(&dev->stats.access_lock);
528
529 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
530 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
531
532 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
533 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
534
535 mutex_unlock(&dev->stats.access_lock);
536
537 usb_autopm_put_interface(dev->intf);
538}
539
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000540/* Loop until the read is completed with timeout called with phy_mutex held */
541static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
542{
543 unsigned long start_time = jiffies;
544 u32 val;
545 int ret;
546
547 do {
548 ret = lan78xx_read_reg(dev, MII_ACC, &val);
549 if (unlikely(ret < 0))
550 return -EIO;
551
552 if (!(val & MII_ACC_MII_BUSY_))
553 return 0;
554 } while (!time_after(jiffies, start_time + HZ));
555
556 return -EIO;
557}
558
559static inline u32 mii_access(int id, int index, int read)
560{
561 u32 ret;
562
563 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
564 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
565 if (read)
566 ret |= MII_ACC_MII_READ_;
567 else
568 ret |= MII_ACC_MII_WRITE_;
569 ret |= MII_ACC_MII_BUSY_;
570
571 return ret;
572}
573
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000574static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
575{
576 unsigned long start_time = jiffies;
577 u32 val;
578 int ret;
579
580 do {
581 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
582 if (unlikely(ret < 0))
583 return -EIO;
584
585 if (!(val & E2P_CMD_EPC_BUSY_) ||
586 (val & E2P_CMD_EPC_TIMEOUT_))
587 break;
588 usleep_range(40, 100);
589 } while (!time_after(jiffies, start_time + HZ));
590
591 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
592 netdev_warn(dev->net, "EEPROM read operation timeout");
593 return -EIO;
594 }
595
596 return 0;
597}
598
599static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
600{
601 unsigned long start_time = jiffies;
602 u32 val;
603 int ret;
604
605 do {
606 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
607 if (unlikely(ret < 0))
608 return -EIO;
609
610 if (!(val & E2P_CMD_EPC_BUSY_))
611 return 0;
612
613 usleep_range(40, 100);
614 } while (!time_after(jiffies, start_time + HZ));
615
616 netdev_warn(dev->net, "EEPROM is busy");
617 return -EIO;
618}
619
620static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
621 u32 length, u8 *data)
622{
623 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000624 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000625 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000626 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000627
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000628 /* depends on chip, some EEPROM pins are muxed with LED function.
629 * disable & restore LED function to access EEPROM.
630 */
631 ret = lan78xx_read_reg(dev, HW_CFG, &val);
632 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000633 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000634 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
635 ret = lan78xx_write_reg(dev, HW_CFG, val);
636 }
637
638 retval = lan78xx_eeprom_confirm_not_busy(dev);
639 if (retval)
640 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000641
642 for (i = 0; i < length; i++) {
643 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
644 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
645 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000646 if (unlikely(ret < 0)) {
647 retval = -EIO;
648 goto exit;
649 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000650
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000651 retval = lan78xx_wait_eeprom(dev);
652 if (retval < 0)
653 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000654
655 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000656 if (unlikely(ret < 0)) {
657 retval = -EIO;
658 goto exit;
659 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000660
661 data[i] = val & 0xFF;
662 offset++;
663 }
664
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000665 retval = 0;
666exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000667 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000668 ret = lan78xx_write_reg(dev, HW_CFG, saved);
669
670 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000671}
672
673static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
674 u32 length, u8 *data)
675{
676 u8 sig;
677 int ret;
678
679 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
680 if ((ret == 0) && (sig == EEPROM_INDICATOR))
681 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
682 else
683 ret = -EINVAL;
684
685 return ret;
686}
687
688static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
689 u32 length, u8 *data)
690{
691 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000692 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000693 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000694 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000695
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000696 /* depends on chip, some EEPROM pins are muxed with LED function.
697 * disable & restore LED function to access EEPROM.
698 */
699 ret = lan78xx_read_reg(dev, HW_CFG, &val);
700 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000701 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000702 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
703 ret = lan78xx_write_reg(dev, HW_CFG, val);
704 }
705
706 retval = lan78xx_eeprom_confirm_not_busy(dev);
707 if (retval)
708 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000709
710 /* Issue write/erase enable command */
711 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
712 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000713 if (unlikely(ret < 0)) {
714 retval = -EIO;
715 goto exit;
716 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000717
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000718 retval = lan78xx_wait_eeprom(dev);
719 if (retval < 0)
720 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000721
722 for (i = 0; i < length; i++) {
723 /* Fill data register */
724 val = data[i];
725 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000726 if (ret < 0) {
727 retval = -EIO;
728 goto exit;
729 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000730
731 /* Send "write" command */
732 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
733 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
734 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000735 if (ret < 0) {
736 retval = -EIO;
737 goto exit;
738 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000739
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000740 retval = lan78xx_wait_eeprom(dev);
741 if (retval < 0)
742 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000743
744 offset++;
745 }
746
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000747 retval = 0;
748exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000749 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000750 ret = lan78xx_write_reg(dev, HW_CFG, saved);
751
752 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000753}
754
755static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
756 u32 length, u8 *data)
757{
758 int i;
759 int ret;
760 u32 buf;
761 unsigned long timeout;
762
763 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
764
765 if (buf & OTP_PWR_DN_PWRDN_N_) {
766 /* clear it and wait to be cleared */
767 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
768
769 timeout = jiffies + HZ;
770 do {
771 usleep_range(1, 10);
772 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
773 if (time_after(jiffies, timeout)) {
774 netdev_warn(dev->net,
775 "timeout on OTP_PWR_DN");
776 return -EIO;
777 }
778 } while (buf & OTP_PWR_DN_PWRDN_N_);
779 }
780
781 for (i = 0; i < length; i++) {
782 ret = lan78xx_write_reg(dev, OTP_ADDR1,
783 ((offset + i) >> 8) & OTP_ADDR1_15_11);
784 ret = lan78xx_write_reg(dev, OTP_ADDR2,
785 ((offset + i) & OTP_ADDR2_10_3));
786
787 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
788 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
789
790 timeout = jiffies + HZ;
791 do {
792 udelay(1);
793 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
794 if (time_after(jiffies, timeout)) {
795 netdev_warn(dev->net,
796 "timeout on OTP_STATUS");
797 return -EIO;
798 }
799 } while (buf & OTP_STATUS_BUSY_);
800
801 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
802
803 data[i] = (u8)(buf & 0xFF);
804 }
805
806 return 0;
807}
808
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000809static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
810 u32 length, u8 *data)
811{
812 int i;
813 int ret;
814 u32 buf;
815 unsigned long timeout;
816
817 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
818
819 if (buf & OTP_PWR_DN_PWRDN_N_) {
820 /* clear it and wait to be cleared */
821 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
822
823 timeout = jiffies + HZ;
824 do {
825 udelay(1);
826 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
827 if (time_after(jiffies, timeout)) {
828 netdev_warn(dev->net,
829 "timeout on OTP_PWR_DN completion");
830 return -EIO;
831 }
832 } while (buf & OTP_PWR_DN_PWRDN_N_);
833 }
834
835 /* set to BYTE program mode */
836 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
837
838 for (i = 0; i < length; i++) {
839 ret = lan78xx_write_reg(dev, OTP_ADDR1,
840 ((offset + i) >> 8) & OTP_ADDR1_15_11);
841 ret = lan78xx_write_reg(dev, OTP_ADDR2,
842 ((offset + i) & OTP_ADDR2_10_3));
843 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
844 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
845 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
846
847 timeout = jiffies + HZ;
848 do {
849 udelay(1);
850 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
851 if (time_after(jiffies, timeout)) {
852 netdev_warn(dev->net,
853 "Timeout on OTP_STATUS completion");
854 return -EIO;
855 }
856 } while (buf & OTP_STATUS_BUSY_);
857 }
858
859 return 0;
860}
861
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000862static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
863 u32 length, u8 *data)
864{
865 u8 sig;
866 int ret;
867
868 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
869
870 if (ret == 0) {
871 if (sig == OTP_INDICATOR_1)
872 offset = offset;
873 else if (sig == OTP_INDICATOR_2)
874 offset += 0x100;
875 else
876 ret = -EINVAL;
Phil Elwell82236562018-04-11 10:59:17 +0100877 if (!ret)
878 ret = lan78xx_read_raw_otp(dev, offset, length, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000879 }
880
881 return ret;
882}
883
884static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
885{
886 int i, ret;
887
888 for (i = 0; i < 100; i++) {
889 u32 dp_sel;
890
891 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
892 if (unlikely(ret < 0))
893 return -EIO;
894
895 if (dp_sel & DP_SEL_DPRDY_)
896 return 0;
897
898 usleep_range(40, 100);
899 }
900
901 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
902
903 return -EIO;
904}
905
906static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
907 u32 addr, u32 length, u32 *buf)
908{
909 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
910 u32 dp_sel;
911 int i, ret;
912
913 if (usb_autopm_get_interface(dev->intf) < 0)
914 return 0;
915
916 mutex_lock(&pdata->dataport_mutex);
917
918 ret = lan78xx_dataport_wait_not_busy(dev);
919 if (ret < 0)
920 goto done;
921
922 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
923
924 dp_sel &= ~DP_SEL_RSEL_MASK_;
925 dp_sel |= ram_select;
926 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
927
928 for (i = 0; i < length; i++) {
929 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
930
931 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
932
933 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
934
935 ret = lan78xx_dataport_wait_not_busy(dev);
936 if (ret < 0)
937 goto done;
938 }
939
940done:
941 mutex_unlock(&pdata->dataport_mutex);
942 usb_autopm_put_interface(dev->intf);
943
944 return ret;
945}
946
947static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
948 int index, u8 addr[ETH_ALEN])
949{
950 u32 temp;
951
952 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
953 temp = addr[3];
954 temp = addr[2] | (temp << 8);
955 temp = addr[1] | (temp << 8);
956 temp = addr[0] | (temp << 8);
957 pdata->pfilter_table[index][1] = temp;
958 temp = addr[5];
959 temp = addr[4] | (temp << 8);
960 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
961 pdata->pfilter_table[index][0] = temp;
962 }
963}
964
965/* returns hash bit number for given MAC address */
966static inline u32 lan78xx_hash(char addr[ETH_ALEN])
967{
968 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
969}
970
971static void lan78xx_deferred_multicast_write(struct work_struct *param)
972{
973 struct lan78xx_priv *pdata =
974 container_of(param, struct lan78xx_priv, set_multicast);
975 struct lan78xx_net *dev = pdata->dev;
976 int i;
977 int ret;
978
979 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
980 pdata->rfe_ctl);
981
982 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
983 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
984
985 for (i = 1; i < NUM_OF_MAF; i++) {
986 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
987 ret = lan78xx_write_reg(dev, MAF_LO(i),
988 pdata->pfilter_table[i][1]);
989 ret = lan78xx_write_reg(dev, MAF_HI(i),
990 pdata->pfilter_table[i][0]);
991 }
992
993 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
994}
995
996static void lan78xx_set_multicast(struct net_device *netdev)
997{
998 struct lan78xx_net *dev = netdev_priv(netdev);
999 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1000 unsigned long flags;
1001 int i;
1002
1003 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1004
1005 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1006 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1007
1008 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1009 pdata->mchash_table[i] = 0;
1010 /* pfilter_table[0] has own HW address */
1011 for (i = 1; i < NUM_OF_MAF; i++) {
1012 pdata->pfilter_table[i][0] =
1013 pdata->pfilter_table[i][1] = 0;
1014 }
1015
1016 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1017
1018 if (dev->net->flags & IFF_PROMISC) {
1019 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1020 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1021 } else {
1022 if (dev->net->flags & IFF_ALLMULTI) {
1023 netif_dbg(dev, drv, dev->net,
1024 "receive all multicast enabled");
1025 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1026 }
1027 }
1028
1029 if (netdev_mc_count(dev->net)) {
1030 struct netdev_hw_addr *ha;
1031 int i;
1032
1033 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1034
1035 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1036
1037 i = 1;
1038 netdev_for_each_mc_addr(ha, netdev) {
1039 /* set first 32 into Perfect Filter */
1040 if (i < 33) {
1041 lan78xx_set_addr_filter(pdata, i, ha->addr);
1042 } else {
1043 u32 bitnum = lan78xx_hash(ha->addr);
1044
1045 pdata->mchash_table[bitnum / 32] |=
1046 (1 << (bitnum % 32));
1047 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1048 }
1049 i++;
1050 }
1051 }
1052
1053 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1054
1055 /* defer register writes to a sleepable context */
1056 schedule_work(&pdata->set_multicast);
1057}
1058
1059static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1060 u16 lcladv, u16 rmtadv)
1061{
1062 u32 flow = 0, fct_flow = 0;
1063 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001064 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001065
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001066 if (dev->fc_autoneg)
1067 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1068 else
1069 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001070
1071 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001072 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001073
1074 if (cap & FLOW_CTRL_RX)
1075 flow |= FLOW_CR_RX_FCEN_;
1076
1077 if (dev->udev->speed == USB_SPEED_SUPER)
1078 fct_flow = 0x817;
1079 else if (dev->udev->speed == USB_SPEED_HIGH)
1080 fct_flow = 0x211;
1081
1082 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1083 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1084 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1085
1086 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1087
1088 /* threshold value should be set before enabling flow */
1089 ret = lan78xx_write_reg(dev, FLOW, flow);
1090
1091 return 0;
1092}
1093
1094static int lan78xx_link_reset(struct lan78xx_net *dev)
1095{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001096 struct phy_device *phydev = dev->net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001097 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001098 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001099 u32 buf;
1100
1101 /* clear PHY interrupt status */
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +00001102 ret = phy_read(phydev, LAN88XX_INT_STS);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001103 if (unlikely(ret < 0))
1104 return -EIO;
1105
1106 /* clear LAN78xx interrupt status */
1107 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1108 if (unlikely(ret < 0))
1109 return -EIO;
1110
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001111 phy_read_status(phydev);
1112
1113 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001114 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001115
1116 /* reset MAC */
1117 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1118 if (unlikely(ret < 0))
1119 return -EIO;
1120 buf |= MAC_CR_RST_;
1121 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1122 if (unlikely(ret < 0))
1123 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001124
1125 phy_mac_interrupt(phydev, 0);
Woojung Huh20ff5562016-03-16 22:10:40 +00001126
1127 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001128 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001129 dev->link_on = true;
1130
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001131 phy_ethtool_gset(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001132
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +00001133 ret = phy_read(phydev, LAN88XX_INT_STS);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001134
1135 if (dev->udev->speed == USB_SPEED_SUPER) {
1136 if (ethtool_cmd_speed(&ecmd) == 1000) {
1137 /* disable U2 */
1138 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1139 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1140 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1141 /* enable U1 */
1142 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1143 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1144 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1145 } else {
1146 /* enable U1 & U2 */
1147 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1148 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1149 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1150 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1151 }
1152 }
1153
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001154 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001155 if (ladv < 0)
1156 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001157
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001158 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001159 if (radv < 0)
1160 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001161
1162 netif_dbg(dev, link, dev->net,
1163 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
1164 ethtool_cmd_speed(&ecmd), ecmd.duplex, ladv, radv);
1165
1166 ret = lan78xx_update_flowcontrol(dev, ecmd.duplex, ladv, radv);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001167 phy_mac_interrupt(phydev, 1);
Woojung Huh20ff5562016-03-16 22:10:40 +00001168
1169 if (!timer_pending(&dev->stat_monitor)) {
1170 dev->delta = 1;
1171 mod_timer(&dev->stat_monitor,
1172 jiffies + STAT_UPDATE_TIMER);
1173 }
Stefan Wahrena9deaa12018-07-28 09:52:10 +02001174
1175 tasklet_schedule(&dev->bh);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001176 }
1177
1178 return ret;
1179}
1180
1181/* some work can't be done in tasklets, so we use keventd
1182 *
1183 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1184 * but tasklet_schedule() doesn't. hope the failure is rare.
1185 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001186static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001187{
1188 set_bit(work, &dev->flags);
1189 if (!schedule_delayed_work(&dev->wq, 0))
1190 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1191}
1192
1193static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1194{
1195 u32 intdata;
1196
1197 if (urb->actual_length != 4) {
1198 netdev_warn(dev->net,
1199 "unexpected urb length %d", urb->actual_length);
1200 return;
1201 }
1202
1203 memcpy(&intdata, urb->transfer_buffer, 4);
1204 le32_to_cpus(&intdata);
1205
1206 if (intdata & INT_ENP_PHY_INT) {
1207 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
1208 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1209 } else
1210 netdev_warn(dev->net,
1211 "unexpected interrupt: 0x%08x\n", intdata);
1212}
1213
1214static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1215{
1216 return MAX_EEPROM_SIZE;
1217}
1218
1219static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1220 struct ethtool_eeprom *ee, u8 *data)
1221{
1222 struct lan78xx_net *dev = netdev_priv(netdev);
1223
1224 ee->magic = LAN78XX_EEPROM_MAGIC;
1225
1226 return lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1227}
1228
1229static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1230 struct ethtool_eeprom *ee, u8 *data)
1231{
1232 struct lan78xx_net *dev = netdev_priv(netdev);
1233
1234 /* Allow entire eeprom update only */
1235 if ((ee->magic == LAN78XX_EEPROM_MAGIC) &&
1236 (ee->offset == 0) &&
1237 (ee->len == 512) &&
1238 (data[0] == EEPROM_INDICATOR))
1239 return lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
1240 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1241 (ee->offset == 0) &&
1242 (ee->len == 512) &&
1243 (data[0] == OTP_INDICATOR_1))
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +00001244 return lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001245
1246 return -EINVAL;
1247}
1248
1249static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1250 u8 *data)
1251{
1252 if (stringset == ETH_SS_STATS)
1253 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1254}
1255
1256static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1257{
1258 if (sset == ETH_SS_STATS)
1259 return ARRAY_SIZE(lan78xx_gstrings);
1260 else
1261 return -EOPNOTSUPP;
1262}
1263
1264static void lan78xx_get_stats(struct net_device *netdev,
1265 struct ethtool_stats *stats, u64 *data)
1266{
1267 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001268
Woojung Huh20ff5562016-03-16 22:10:40 +00001269 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001270
Woojung Huh20ff5562016-03-16 22:10:40 +00001271 mutex_lock(&dev->stats.access_lock);
1272 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1273 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001274}
1275
1276static void lan78xx_get_wol(struct net_device *netdev,
1277 struct ethtool_wolinfo *wol)
1278{
1279 struct lan78xx_net *dev = netdev_priv(netdev);
1280 int ret;
1281 u32 buf;
1282 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1283
1284 if (usb_autopm_get_interface(dev->intf) < 0)
1285 return;
1286
1287 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1288 if (unlikely(ret < 0)) {
1289 wol->supported = 0;
1290 wol->wolopts = 0;
1291 } else {
1292 if (buf & USB_CFG_RMT_WKP_) {
1293 wol->supported = WAKE_ALL;
1294 wol->wolopts = pdata->wol;
1295 } else {
1296 wol->supported = 0;
1297 wol->wolopts = 0;
1298 }
1299 }
1300
1301 usb_autopm_put_interface(dev->intf);
1302}
1303
1304static int lan78xx_set_wol(struct net_device *netdev,
1305 struct ethtool_wolinfo *wol)
1306{
1307 struct lan78xx_net *dev = netdev_priv(netdev);
1308 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1309 int ret;
1310
1311 ret = usb_autopm_get_interface(dev->intf);
1312 if (ret < 0)
1313 return ret;
1314
Florian Fainelli6226d312018-09-28 16:18:52 -07001315 if (wol->wolopts & ~WAKE_ALL)
1316 return -EINVAL;
1317
1318 pdata->wol = wol->wolopts;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001319
1320 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1321
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001322 phy_ethtool_set_wol(netdev->phydev, wol);
1323
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001324 usb_autopm_put_interface(dev->intf);
1325
1326 return ret;
1327}
1328
1329static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1330{
1331 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001332 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001333 int ret;
1334 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001335
1336 ret = usb_autopm_get_interface(dev->intf);
1337 if (ret < 0)
1338 return ret;
1339
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001340 ret = phy_ethtool_get_eee(phydev, edata);
1341 if (ret < 0)
1342 goto exit;
1343
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001344 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1345 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001346 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001347 edata->eee_active = !!(edata->advertised &
1348 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001349 edata->tx_lpi_enabled = true;
1350 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1351 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1352 edata->tx_lpi_timer = buf;
1353 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001354 edata->eee_enabled = false;
1355 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001356 edata->tx_lpi_enabled = false;
1357 edata->tx_lpi_timer = 0;
1358 }
1359
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001360 ret = 0;
1361exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001362 usb_autopm_put_interface(dev->intf);
1363
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001364 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001365}
1366
1367static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1368{
1369 struct lan78xx_net *dev = netdev_priv(net);
1370 int ret;
1371 u32 buf;
1372
1373 ret = usb_autopm_get_interface(dev->intf);
1374 if (ret < 0)
1375 return ret;
1376
1377 if (edata->eee_enabled) {
1378 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1379 buf |= MAC_CR_EEE_EN_;
1380 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1381
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001382 phy_ethtool_set_eee(net->phydev, edata);
1383
1384 buf = (u32)edata->tx_lpi_timer;
1385 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001386 } else {
1387 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1388 buf &= ~MAC_CR_EEE_EN_;
1389 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1390 }
1391
1392 usb_autopm_put_interface(dev->intf);
1393
1394 return 0;
1395}
1396
1397static u32 lan78xx_get_link(struct net_device *net)
1398{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001399 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001400
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001401 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001402}
1403
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001404static int lan78xx_nway_reset(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001405{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001406 return phy_start_aneg(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001407}
1408
1409static void lan78xx_get_drvinfo(struct net_device *net,
1410 struct ethtool_drvinfo *info)
1411{
1412 struct lan78xx_net *dev = netdev_priv(net);
1413
1414 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
1415 strncpy(info->version, DRIVER_VERSION, sizeof(info->version));
1416 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1417}
1418
1419static u32 lan78xx_get_msglevel(struct net_device *net)
1420{
1421 struct lan78xx_net *dev = netdev_priv(net);
1422
1423 return dev->msg_enable;
1424}
1425
1426static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1427{
1428 struct lan78xx_net *dev = netdev_priv(net);
1429
1430 dev->msg_enable = level;
1431}
1432
Woojung.Huh@microchip.com758c5c12015-09-16 23:41:14 +00001433static int lan78xx_get_mdix_status(struct net_device *net)
1434{
1435 struct phy_device *phydev = net->phydev;
1436 int buf;
1437
1438 phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, LAN88XX_EXT_PAGE_SPACE_1);
1439 buf = phy_read(phydev, LAN88XX_EXT_MODE_CTRL);
1440 phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, LAN88XX_EXT_PAGE_SPACE_0);
1441
1442 return buf;
1443}
1444
1445static void lan78xx_set_mdix_status(struct net_device *net, __u8 mdix_ctrl)
1446{
1447 struct lan78xx_net *dev = netdev_priv(net);
1448 struct phy_device *phydev = net->phydev;
1449 int buf;
1450
1451 if (mdix_ctrl == ETH_TP_MDI) {
1452 phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS,
1453 LAN88XX_EXT_PAGE_SPACE_1);
1454 buf = phy_read(phydev, LAN88XX_EXT_MODE_CTRL);
1455 buf &= ~LAN88XX_EXT_MODE_CTRL_MDIX_MASK_;
1456 phy_write(phydev, LAN88XX_EXT_MODE_CTRL,
1457 buf | LAN88XX_EXT_MODE_CTRL_MDI_);
1458 phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS,
1459 LAN88XX_EXT_PAGE_SPACE_0);
1460 } else if (mdix_ctrl == ETH_TP_MDI_X) {
1461 phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS,
1462 LAN88XX_EXT_PAGE_SPACE_1);
1463 buf = phy_read(phydev, LAN88XX_EXT_MODE_CTRL);
1464 buf &= ~LAN88XX_EXT_MODE_CTRL_MDIX_MASK_;
1465 phy_write(phydev, LAN88XX_EXT_MODE_CTRL,
1466 buf | LAN88XX_EXT_MODE_CTRL_MDI_X_);
1467 phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS,
1468 LAN88XX_EXT_PAGE_SPACE_0);
1469 } else if (mdix_ctrl == ETH_TP_MDI_AUTO) {
1470 phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS,
1471 LAN88XX_EXT_PAGE_SPACE_1);
1472 buf = phy_read(phydev, LAN88XX_EXT_MODE_CTRL);
1473 buf &= ~LAN88XX_EXT_MODE_CTRL_MDIX_MASK_;
1474 phy_write(phydev, LAN88XX_EXT_MODE_CTRL,
1475 buf | LAN88XX_EXT_MODE_CTRL_AUTO_MDIX_);
1476 phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS,
1477 LAN88XX_EXT_PAGE_SPACE_0);
1478 }
1479 dev->mdix_ctrl = mdix_ctrl;
1480}
1481
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001482static int lan78xx_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
1483{
1484 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001485 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001486 int ret;
1487 int buf;
1488
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001489 ret = usb_autopm_get_interface(dev->intf);
1490 if (ret < 0)
1491 return ret;
1492
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001493 ret = phy_ethtool_gset(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001494
Woojung.Huh@microchip.com758c5c12015-09-16 23:41:14 +00001495 buf = lan78xx_get_mdix_status(net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001496
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +00001497 buf &= LAN88XX_EXT_MODE_CTRL_MDIX_MASK_;
1498 if (buf == LAN88XX_EXT_MODE_CTRL_AUTO_MDIX_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001499 cmd->eth_tp_mdix = ETH_TP_MDI_AUTO;
1500 cmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +00001501 } else if (buf == LAN88XX_EXT_MODE_CTRL_MDI_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001502 cmd->eth_tp_mdix = ETH_TP_MDI;
1503 cmd->eth_tp_mdix_ctrl = ETH_TP_MDI;
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +00001504 } else if (buf == LAN88XX_EXT_MODE_CTRL_MDI_X_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001505 cmd->eth_tp_mdix = ETH_TP_MDI_X;
1506 cmd->eth_tp_mdix_ctrl = ETH_TP_MDI_X;
1507 }
1508
1509 usb_autopm_put_interface(dev->intf);
1510
1511 return ret;
1512}
1513
1514static int lan78xx_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
1515{
1516 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001517 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001518 int ret = 0;
1519 int temp;
1520
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001521 ret = usb_autopm_get_interface(dev->intf);
1522 if (ret < 0)
1523 return ret;
1524
1525 if (dev->mdix_ctrl != cmd->eth_tp_mdix_ctrl) {
Woojung.Huh@microchip.com758c5c12015-09-16 23:41:14 +00001526 lan78xx_set_mdix_status(net, cmd->eth_tp_mdix_ctrl);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001527 }
1528
1529 /* change speed & duplex */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001530 ret = phy_ethtool_sset(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001531
1532 if (!cmd->autoneg) {
1533 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001534 temp = phy_read(phydev, MII_BMCR);
1535 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001536 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001537 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001538 }
1539
1540 usb_autopm_put_interface(dev->intf);
1541
1542 return ret;
1543}
1544
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001545static void lan78xx_get_pause(struct net_device *net,
1546 struct ethtool_pauseparam *pause)
1547{
1548 struct lan78xx_net *dev = netdev_priv(net);
1549 struct phy_device *phydev = net->phydev;
1550 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1551
1552 phy_ethtool_gset(phydev, &ecmd);
1553
1554 pause->autoneg = dev->fc_autoneg;
1555
1556 if (dev->fc_request_control & FLOW_CTRL_TX)
1557 pause->tx_pause = 1;
1558
1559 if (dev->fc_request_control & FLOW_CTRL_RX)
1560 pause->rx_pause = 1;
1561}
1562
1563static int lan78xx_set_pause(struct net_device *net,
1564 struct ethtool_pauseparam *pause)
1565{
1566 struct lan78xx_net *dev = netdev_priv(net);
1567 struct phy_device *phydev = net->phydev;
1568 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1569 int ret;
1570
1571 phy_ethtool_gset(phydev, &ecmd);
1572
1573 if (pause->autoneg && !ecmd.autoneg) {
1574 ret = -EINVAL;
1575 goto exit;
1576 }
1577
1578 dev->fc_request_control = 0;
1579 if (pause->rx_pause)
1580 dev->fc_request_control |= FLOW_CTRL_RX;
1581
1582 if (pause->tx_pause)
1583 dev->fc_request_control |= FLOW_CTRL_TX;
1584
1585 if (ecmd.autoneg) {
1586 u32 mii_adv;
1587
1588 ecmd.advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
1589 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
1590 ecmd.advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1591 phy_ethtool_sset(phydev, &ecmd);
1592 }
1593
1594 dev->fc_autoneg = pause->autoneg;
1595
1596 ret = 0;
1597exit:
1598 return ret;
1599}
1600
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001601static const struct ethtool_ops lan78xx_ethtool_ops = {
1602 .get_link = lan78xx_get_link,
1603 .nway_reset = lan78xx_nway_reset,
1604 .get_drvinfo = lan78xx_get_drvinfo,
1605 .get_msglevel = lan78xx_get_msglevel,
1606 .set_msglevel = lan78xx_set_msglevel,
1607 .get_settings = lan78xx_get_settings,
1608 .set_settings = lan78xx_set_settings,
1609 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1610 .get_eeprom = lan78xx_ethtool_get_eeprom,
1611 .set_eeprom = lan78xx_ethtool_set_eeprom,
1612 .get_ethtool_stats = lan78xx_get_stats,
1613 .get_sset_count = lan78xx_get_sset_count,
1614 .get_strings = lan78xx_get_strings,
1615 .get_wol = lan78xx_get_wol,
1616 .set_wol = lan78xx_set_wol,
1617 .get_eee = lan78xx_get_eee,
1618 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001619 .get_pauseparam = lan78xx_get_pause,
1620 .set_pauseparam = lan78xx_set_pause,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001621};
1622
1623static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1624{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001625 if (!netif_running(netdev))
1626 return -EINVAL;
1627
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001628 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001629}
1630
1631static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1632{
1633 u32 addr_lo, addr_hi;
1634 int ret;
1635 u8 addr[6];
1636
1637 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1638 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1639
1640 addr[0] = addr_lo & 0xFF;
1641 addr[1] = (addr_lo >> 8) & 0xFF;
1642 addr[2] = (addr_lo >> 16) & 0xFF;
1643 addr[3] = (addr_lo >> 24) & 0xFF;
1644 addr[4] = addr_hi & 0xFF;
1645 addr[5] = (addr_hi >> 8) & 0xFF;
1646
1647 if (!is_valid_ether_addr(addr)) {
Phil Elwella1b53b12018-04-19 17:59:38 +01001648 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) {
1649 /* valid address present in Device Tree */
1650 netif_dbg(dev, ifup, dev->net,
1651 "MAC address read from Device Tree");
1652 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET,
1653 ETH_ALEN, addr) == 0) ||
1654 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET,
1655 ETH_ALEN, addr) == 0)) &&
1656 is_valid_ether_addr(addr)) {
1657 /* eeprom values are valid so use them */
1658 netif_dbg(dev, ifup, dev->net,
1659 "MAC address read from EEPROM");
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001660 } else {
1661 /* generate random MAC */
1662 random_ether_addr(addr);
1663 netif_dbg(dev, ifup, dev->net,
1664 "MAC address set to random addr");
1665 }
Phil Elwella1b53b12018-04-19 17:59:38 +01001666
1667 addr_lo = addr[0] | (addr[1] << 8) |
1668 (addr[2] << 16) | (addr[3] << 24);
1669 addr_hi = addr[4] | (addr[5] << 8);
1670
1671 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1672 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001673 }
1674
1675 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1676 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1677
1678 ether_addr_copy(dev->net->dev_addr, addr);
1679}
1680
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001681/* MDIO read and write wrappers for phylib */
1682static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001683{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001684 struct lan78xx_net *dev = bus->priv;
1685 u32 val, addr;
1686 int ret;
1687
1688 ret = usb_autopm_get_interface(dev->intf);
1689 if (ret < 0)
1690 return ret;
1691
1692 mutex_lock(&dev->phy_mutex);
1693
1694 /* confirm MII not busy */
1695 ret = lan78xx_phy_wait_not_busy(dev);
1696 if (ret < 0)
1697 goto done;
1698
1699 /* set the address, index & direction (read from PHY) */
1700 addr = mii_access(phy_id, idx, MII_READ);
1701 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1702
1703 ret = lan78xx_phy_wait_not_busy(dev);
1704 if (ret < 0)
1705 goto done;
1706
1707 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1708
1709 ret = (int)(val & 0xFFFF);
1710
1711done:
1712 mutex_unlock(&dev->phy_mutex);
1713 usb_autopm_put_interface(dev->intf);
1714 return ret;
1715}
1716
1717static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1718 u16 regval)
1719{
1720 struct lan78xx_net *dev = bus->priv;
1721 u32 val, addr;
1722 int ret;
1723
1724 ret = usb_autopm_get_interface(dev->intf);
1725 if (ret < 0)
1726 return ret;
1727
1728 mutex_lock(&dev->phy_mutex);
1729
1730 /* confirm MII not busy */
1731 ret = lan78xx_phy_wait_not_busy(dev);
1732 if (ret < 0)
1733 goto done;
1734
1735 val = (u32)regval;
1736 ret = lan78xx_write_reg(dev, MII_DATA, val);
1737
1738 /* set the address, index & direction (write to PHY) */
1739 addr = mii_access(phy_id, idx, MII_WRITE);
1740 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1741
1742 ret = lan78xx_phy_wait_not_busy(dev);
1743 if (ret < 0)
1744 goto done;
1745
1746done:
1747 mutex_unlock(&dev->phy_mutex);
1748 usb_autopm_put_interface(dev->intf);
1749 return 0;
1750}
1751
1752static int lan78xx_mdio_init(struct lan78xx_net *dev)
1753{
1754 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001755
1756 dev->mdiobus = mdiobus_alloc();
1757 if (!dev->mdiobus) {
1758 netdev_err(dev->net, "can't allocate MDIO bus\n");
1759 return -ENOMEM;
1760 }
1761
1762 dev->mdiobus->priv = (void *)dev;
1763 dev->mdiobus->read = lan78xx_mdiobus_read;
1764 dev->mdiobus->write = lan78xx_mdiobus_write;
1765 dev->mdiobus->name = "lan78xx-mdiobus";
1766
1767 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1768 dev->udev->bus->busnum, dev->udev->devnum);
1769
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001770 switch (dev->chipid) {
1771 case ID_REV_CHIP_ID_7800_:
1772 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001773 /* set to internal PHY id */
1774 dev->mdiobus->phy_mask = ~(1 << 1);
1775 break;
1776 }
1777
1778 ret = mdiobus_register(dev->mdiobus);
1779 if (ret) {
1780 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001781 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001782 }
1783
1784 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1785 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001786exit1:
1787 mdiobus_free(dev->mdiobus);
1788 return ret;
1789}
1790
1791static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1792{
1793 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001794 mdiobus_free(dev->mdiobus);
1795}
1796
1797static void lan78xx_link_status_change(struct net_device *net)
1798{
Woojung Huh14437e32016-04-25 22:22:36 +00001799 struct phy_device *phydev = net->phydev;
1800 int ret, temp;
1801
1802 /* At forced 100 F/H mode, chip may fail to set mode correctly
1803 * when cable is switched between long(~50+m) and short one.
1804 * As workaround, set to 10 before setting to 100
1805 * at forced 100 F/H mode.
1806 */
1807 if (!phydev->autoneg && (phydev->speed == 100)) {
1808 /* disable phy interrupt */
1809 temp = phy_read(phydev, LAN88XX_INT_MASK);
1810 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1811 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1812
1813 temp = phy_read(phydev, MII_BMCR);
1814 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1815 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1816 temp |= BMCR_SPEED100;
1817 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1818
1819 /* clear pending interrupt generated while workaround */
1820 temp = phy_read(phydev, LAN88XX_INT_STS);
1821
1822 /* enable phy interrupt back */
1823 temp = phy_read(phydev, LAN88XX_INT_MASK);
1824 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1825 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1826 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001827}
1828
1829static int lan78xx_phy_init(struct lan78xx_net *dev)
1830{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001831 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001832 u32 mii_adv;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001833 struct phy_device *phydev = dev->net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001834
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001835 phydev = phy_find_first(dev->mdiobus);
1836 if (!phydev) {
1837 netdev_err(dev->net, "no PHY found\n");
1838 return -EIO;
1839 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001840
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001841 /* Enable PHY interrupts.
1842 * We handle our own interrupt
1843 */
1844 ret = phy_read(phydev, LAN88XX_INT_STS);
1845 ret = phy_write(phydev, LAN88XX_INT_MASK,
1846 LAN88XX_INT_MASK_MDINTPIN_EN_ |
1847 LAN88XX_INT_MASK_LINK_CHANGE_);
1848
1849 phydev->irq = PHY_IGNORE_INTERRUPT;
1850
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001851 ret = phy_connect_direct(dev->net, phydev,
1852 lan78xx_link_status_change,
1853 PHY_INTERFACE_MODE_GMII);
1854 if (ret) {
1855 netdev_err(dev->net, "can't attach PHY to %s\n",
1856 dev->mdiobus->id);
1857 return -EIO;
1858 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001859
1860 /* set to AUTOMDIX */
Woojung.Huh@microchip.com758c5c12015-09-16 23:41:14 +00001861 lan78xx_set_mdix_status(dev->net, ETH_TP_MDI_AUTO);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001862
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001863 /* MAC doesn't support 1000T Half */
1864 phydev->supported &= ~SUPPORTED_1000baseT_Half;
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00001865
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001866 /* support both flow controls */
1867 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
1868 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
1869 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
1870 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1871
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001872 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001873
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001874 dev->fc_autoneg = phydev->autoneg;
1875
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001876 phy_start(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001877
1878 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
1879
1880 return 0;
1881}
1882
1883static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
1884{
1885 int ret = 0;
1886 u32 buf;
1887 bool rxenabled;
1888
1889 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
1890
1891 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
1892
1893 if (rxenabled) {
1894 buf &= ~MAC_RX_RXEN_;
1895 ret = lan78xx_write_reg(dev, MAC_RX, buf);
1896 }
1897
1898 /* add 4 to size for FCS */
1899 buf &= ~MAC_RX_MAX_SIZE_MASK_;
1900 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
1901
1902 ret = lan78xx_write_reg(dev, MAC_RX, buf);
1903
1904 if (rxenabled) {
1905 buf |= MAC_RX_RXEN_;
1906 ret = lan78xx_write_reg(dev, MAC_RX, buf);
1907 }
1908
1909 return 0;
1910}
1911
1912static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
1913{
1914 struct sk_buff *skb;
1915 unsigned long flags;
1916 int count = 0;
1917
1918 spin_lock_irqsave(&q->lock, flags);
1919 while (!skb_queue_empty(q)) {
1920 struct skb_data *entry;
1921 struct urb *urb;
1922 int ret;
1923
1924 skb_queue_walk(q, skb) {
1925 entry = (struct skb_data *)skb->cb;
1926 if (entry->state != unlink_start)
1927 goto found;
1928 }
1929 break;
1930found:
1931 entry->state = unlink_start;
1932 urb = entry->urb;
1933
1934 /* Get reference count of the URB to avoid it to be
1935 * freed during usb_unlink_urb, which may trigger
1936 * use-after-free problem inside usb_unlink_urb since
1937 * usb_unlink_urb is always racing with .complete
1938 * handler(include defer_bh).
1939 */
1940 usb_get_urb(urb);
1941 spin_unlock_irqrestore(&q->lock, flags);
1942 /* during some PM-driven resume scenarios,
1943 * these (async) unlinks complete immediately
1944 */
1945 ret = usb_unlink_urb(urb);
1946 if (ret != -EINPROGRESS && ret != 0)
1947 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
1948 else
1949 count++;
1950 usb_put_urb(urb);
1951 spin_lock_irqsave(&q->lock, flags);
1952 }
1953 spin_unlock_irqrestore(&q->lock, flags);
1954 return count;
1955}
1956
1957static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
1958{
1959 struct lan78xx_net *dev = netdev_priv(netdev);
1960 int ll_mtu = new_mtu + netdev->hard_header_len;
1961 int old_hard_mtu = dev->hard_mtu;
1962 int old_rx_urb_size = dev->rx_urb_size;
1963 int ret;
1964
1965 if (new_mtu > MAX_SINGLE_PACKET_SIZE)
1966 return -EINVAL;
1967
1968 if (new_mtu <= 0)
1969 return -EINVAL;
1970 /* no second zero-length packet read wanted after mtu-sized packets */
1971 if ((ll_mtu % dev->maxpacket) == 0)
1972 return -EDOM;
1973
1974 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
1975
1976 netdev->mtu = new_mtu;
1977
1978 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
1979 if (dev->rx_urb_size == old_hard_mtu) {
1980 dev->rx_urb_size = dev->hard_mtu;
1981 if (dev->rx_urb_size > old_rx_urb_size) {
1982 if (netif_running(dev->net)) {
1983 unlink_urbs(dev, &dev->rxq);
1984 tasklet_schedule(&dev->bh);
1985 }
1986 }
1987 }
1988
1989 return 0;
1990}
1991
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001992static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001993{
1994 struct lan78xx_net *dev = netdev_priv(netdev);
1995 struct sockaddr *addr = p;
1996 u32 addr_lo, addr_hi;
1997 int ret;
1998
1999 if (netif_running(netdev))
2000 return -EBUSY;
2001
2002 if (!is_valid_ether_addr(addr->sa_data))
2003 return -EADDRNOTAVAIL;
2004
2005 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2006
2007 addr_lo = netdev->dev_addr[0] |
2008 netdev->dev_addr[1] << 8 |
2009 netdev->dev_addr[2] << 16 |
2010 netdev->dev_addr[3] << 24;
2011 addr_hi = netdev->dev_addr[4] |
2012 netdev->dev_addr[5] << 8;
2013
2014 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2015 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2016
Jason Martinsen253b9442018-12-18 05:38:22 +00002017 /* Added to support MAC address changes */
2018 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
2019 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
2020
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002021 return 0;
2022}
2023
2024/* Enable or disable Rx checksum offload engine */
2025static int lan78xx_set_features(struct net_device *netdev,
2026 netdev_features_t features)
2027{
2028 struct lan78xx_net *dev = netdev_priv(netdev);
2029 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2030 unsigned long flags;
2031 int ret;
2032
2033 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2034
2035 if (features & NETIF_F_RXCSUM) {
2036 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2037 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2038 } else {
2039 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2040 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2041 }
2042
2043 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2044 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2045 else
2046 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2047
2048 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2049
2050 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2051
2052 return 0;
2053}
2054
2055static void lan78xx_deferred_vlan_write(struct work_struct *param)
2056{
2057 struct lan78xx_priv *pdata =
2058 container_of(param, struct lan78xx_priv, set_vlan);
2059 struct lan78xx_net *dev = pdata->dev;
2060
2061 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2062 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2063}
2064
2065static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2066 __be16 proto, u16 vid)
2067{
2068 struct lan78xx_net *dev = netdev_priv(netdev);
2069 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2070 u16 vid_bit_index;
2071 u16 vid_dword_index;
2072
2073 vid_dword_index = (vid >> 5) & 0x7F;
2074 vid_bit_index = vid & 0x1F;
2075
2076 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2077
2078 /* defer register writes to a sleepable context */
2079 schedule_work(&pdata->set_vlan);
2080
2081 return 0;
2082}
2083
2084static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2085 __be16 proto, u16 vid)
2086{
2087 struct lan78xx_net *dev = netdev_priv(netdev);
2088 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2089 u16 vid_bit_index;
2090 u16 vid_dword_index;
2091
2092 vid_dword_index = (vid >> 5) & 0x7F;
2093 vid_bit_index = vid & 0x1F;
2094
2095 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2096
2097 /* defer register writes to a sleepable context */
2098 schedule_work(&pdata->set_vlan);
2099
2100 return 0;
2101}
2102
2103static void lan78xx_init_ltm(struct lan78xx_net *dev)
2104{
2105 int ret;
2106 u32 buf;
2107 u32 regs[6] = { 0 };
2108
2109 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2110 if (buf & USB_CFG1_LTM_ENABLE_) {
2111 u8 temp[2];
2112 /* Get values from EEPROM first */
2113 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2114 if (temp[0] == 24) {
2115 ret = lan78xx_read_raw_eeprom(dev,
2116 temp[1] * 2,
2117 24,
2118 (u8 *)regs);
2119 if (ret < 0)
2120 return;
2121 }
2122 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2123 if (temp[0] == 24) {
2124 ret = lan78xx_read_raw_otp(dev,
2125 temp[1] * 2,
2126 24,
2127 (u8 *)regs);
2128 if (ret < 0)
2129 return;
2130 }
2131 }
2132 }
2133
2134 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2135 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2136 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2137 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2138 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2139 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2140}
2141
2142static int lan78xx_reset(struct lan78xx_net *dev)
2143{
2144 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2145 u32 buf;
2146 int ret = 0;
2147 unsigned long timeout;
2148
2149 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2150 buf |= HW_CFG_LRST_;
2151 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2152
2153 timeout = jiffies + HZ;
2154 do {
2155 mdelay(1);
2156 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2157 if (time_after(jiffies, timeout)) {
2158 netdev_warn(dev->net,
2159 "timeout on completion of LiteReset");
2160 return -EIO;
2161 }
2162 } while (buf & HW_CFG_LRST_);
2163
2164 lan78xx_init_mac_address(dev);
2165
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002166 /* save DEVID for later usage */
2167 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002168 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2169 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002170
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002171 /* Respond to the IN token with a NAK */
2172 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2173 buf |= USB_CFG_BIR_;
2174 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2175
2176 /* Init LTM */
2177 lan78xx_init_ltm(dev);
2178
2179 dev->net->hard_header_len += TX_OVERHEAD;
2180 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2181
2182 if (dev->udev->speed == USB_SPEED_SUPER) {
2183 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2184 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2185 dev->rx_qlen = 4;
2186 dev->tx_qlen = 4;
2187 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2188 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2189 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2190 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2191 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2192 } else {
2193 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2194 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2195 dev->rx_qlen = 4;
Yuiko Oshino283498b2018-01-15 13:24:28 -05002196 dev->tx_qlen = 4;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002197 }
2198
2199 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2200 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2201
2202 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2203 buf |= HW_CFG_MEF_;
2204 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2205
2206 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2207 buf |= USB_CFG_BCE_;
2208 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2209
2210 /* set FIFO sizes */
2211 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2212 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2213
2214 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2215 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2216
2217 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2218 ret = lan78xx_write_reg(dev, FLOW, 0);
2219 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2220
2221 /* Don't need rfe_ctl_lock during initialisation */
2222 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2223 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2224 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2225
2226 /* Enable or disable checksum offload engines */
2227 lan78xx_set_features(dev->net, dev->net->features);
2228
2229 lan78xx_set_multicast(dev->net);
2230
2231 /* reset PHY */
2232 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2233 buf |= PMT_CTL_PHY_RST_;
2234 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2235
2236 timeout = jiffies + HZ;
2237 do {
2238 mdelay(1);
2239 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2240 if (time_after(jiffies, timeout)) {
2241 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2242 return -EIO;
2243 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002244 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002245
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002246 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002247 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002248 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2249
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002250 /* enable PHY interrupts */
2251 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
2252 buf |= INT_ENP_PHY_INT;
2253 ret = lan78xx_write_reg(dev, INT_EP_CTL, buf);
2254
2255 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2256 buf |= MAC_TX_TXEN_;
2257 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2258
2259 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2260 buf |= FCT_TX_CTL_EN_;
2261 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2262
2263 ret = lan78xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
2264
2265 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2266 buf |= MAC_RX_RXEN_;
2267 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2268
2269 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2270 buf |= FCT_RX_CTL_EN_;
2271 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2272
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002273 return 0;
2274}
2275
Woojung Huh20ff5562016-03-16 22:10:40 +00002276static void lan78xx_init_stats(struct lan78xx_net *dev)
2277{
2278 u32 *p;
2279 int i;
2280
2281 /* initialize for stats update
2282 * some counters are 20bits and some are 32bits
2283 */
2284 p = (u32 *)&dev->stats.rollover_max;
2285 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2286 p[i] = 0xFFFFF;
2287
2288 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2289 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2290 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2291 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2292 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2293 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2294 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2295 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2296 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2297 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2298
2299 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
2300}
2301
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002302static int lan78xx_open(struct net_device *net)
2303{
2304 struct lan78xx_net *dev = netdev_priv(net);
2305 int ret;
2306
2307 ret = usb_autopm_get_interface(dev->intf);
2308 if (ret < 0)
2309 goto out;
2310
2311 ret = lan78xx_reset(dev);
2312 if (ret < 0)
2313 goto done;
2314
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002315 ret = lan78xx_phy_init(dev);
2316 if (ret < 0)
2317 goto done;
2318
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002319 /* for Link Check */
2320 if (dev->urb_intr) {
2321 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2322 if (ret < 0) {
2323 netif_err(dev, ifup, dev->net,
2324 "intr submit %d\n", ret);
2325 goto done;
2326 }
2327 }
2328
Woojung Huh20ff5562016-03-16 22:10:40 +00002329 lan78xx_init_stats(dev);
2330
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002331 set_bit(EVENT_DEV_OPEN, &dev->flags);
2332
2333 netif_start_queue(net);
2334
2335 dev->link_on = false;
2336
2337 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2338done:
2339 usb_autopm_put_interface(dev->intf);
2340
2341out:
2342 return ret;
2343}
2344
2345static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2346{
2347 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2348 DECLARE_WAITQUEUE(wait, current);
2349 int temp;
2350
2351 /* ensure there are no more active urbs */
2352 add_wait_queue(&unlink_wakeup, &wait);
2353 set_current_state(TASK_UNINTERRUPTIBLE);
2354 dev->wait = &unlink_wakeup;
2355 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2356
2357 /* maybe wait for deletions to finish. */
2358 while (!skb_queue_empty(&dev->rxq) &&
2359 !skb_queue_empty(&dev->txq) &&
2360 !skb_queue_empty(&dev->done)) {
2361 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2362 set_current_state(TASK_UNINTERRUPTIBLE);
2363 netif_dbg(dev, ifdown, dev->net,
2364 "waited for %d urb completions\n", temp);
2365 }
2366 set_current_state(TASK_RUNNING);
2367 dev->wait = NULL;
2368 remove_wait_queue(&unlink_wakeup, &wait);
2369}
2370
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002371static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002372{
2373 struct lan78xx_net *dev = netdev_priv(net);
2374
Woojung Huh20ff5562016-03-16 22:10:40 +00002375 if (timer_pending(&dev->stat_monitor))
2376 del_timer_sync(&dev->stat_monitor);
2377
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002378 phy_stop(net->phydev);
2379 phy_disconnect(net->phydev);
2380 net->phydev = NULL;
2381
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002382 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2383 netif_stop_queue(net);
2384
2385 netif_info(dev, ifdown, dev->net,
2386 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2387 net->stats.rx_packets, net->stats.tx_packets,
2388 net->stats.rx_errors, net->stats.tx_errors);
2389
2390 lan78xx_terminate_urbs(dev);
2391
2392 usb_kill_urb(dev->urb_intr);
2393
2394 skb_queue_purge(&dev->rxq_pause);
2395
2396 /* deferred work (task, timer, softirq) must also stop.
2397 * can't flush_scheduled_work() until we drop rtnl (later),
2398 * else workers could deadlock; so make workers a NOP.
2399 */
2400 dev->flags = 0;
2401 cancel_delayed_work_sync(&dev->wq);
2402 tasklet_kill(&dev->bh);
2403
2404 usb_autopm_put_interface(dev->intf);
2405
2406 return 0;
2407}
2408
2409static int lan78xx_linearize(struct sk_buff *skb)
2410{
2411 return skb_linearize(skb);
2412}
2413
2414static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2415 struct sk_buff *skb, gfp_t flags)
2416{
2417 u32 tx_cmd_a, tx_cmd_b;
2418
Eric Dumazet542bcc542017-04-19 09:59:24 -07002419 if (skb_cow_head(skb, TX_OVERHEAD)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002420 dev_kfree_skb_any(skb);
Eric Dumazet542bcc542017-04-19 09:59:24 -07002421 return NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002422 }
2423
2424 if (lan78xx_linearize(skb) < 0)
2425 return NULL;
2426
2427 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2428
2429 if (skb->ip_summed == CHECKSUM_PARTIAL)
2430 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2431
2432 tx_cmd_b = 0;
2433 if (skb_is_gso(skb)) {
2434 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2435
2436 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2437
2438 tx_cmd_a |= TX_CMD_A_LSO_;
2439 }
2440
2441 if (skb_vlan_tag_present(skb)) {
2442 tx_cmd_a |= TX_CMD_A_IVTG_;
2443 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2444 }
2445
2446 skb_push(skb, 4);
2447 cpu_to_le32s(&tx_cmd_b);
2448 memcpy(skb->data, &tx_cmd_b, 4);
2449
2450 skb_push(skb, 4);
2451 cpu_to_le32s(&tx_cmd_a);
2452 memcpy(skb->data, &tx_cmd_a, 4);
2453
2454 return skb;
2455}
2456
2457static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2458 struct sk_buff_head *list, enum skb_state state)
2459{
2460 unsigned long flags;
2461 enum skb_state old_state;
2462 struct skb_data *entry = (struct skb_data *)skb->cb;
2463
2464 spin_lock_irqsave(&list->lock, flags);
2465 old_state = entry->state;
2466 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002467
2468 __skb_unlink(skb, list);
2469 spin_unlock(&list->lock);
2470 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002471
2472 __skb_queue_tail(&dev->done, skb);
2473 if (skb_queue_len(&dev->done) == 1)
2474 tasklet_schedule(&dev->bh);
2475 spin_unlock_irqrestore(&dev->done.lock, flags);
2476
2477 return old_state;
2478}
2479
2480static void tx_complete(struct urb *urb)
2481{
2482 struct sk_buff *skb = (struct sk_buff *)urb->context;
2483 struct skb_data *entry = (struct skb_data *)skb->cb;
2484 struct lan78xx_net *dev = entry->dev;
2485
2486 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002487 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002488 dev->net->stats.tx_bytes += entry->length;
2489 } else {
2490 dev->net->stats.tx_errors++;
2491
2492 switch (urb->status) {
2493 case -EPIPE:
2494 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2495 break;
2496
2497 /* software-driven interface shutdown */
2498 case -ECONNRESET:
2499 case -ESHUTDOWN:
2500 break;
2501
2502 case -EPROTO:
2503 case -ETIME:
2504 case -EILSEQ:
2505 netif_stop_queue(dev->net);
2506 break;
2507 default:
2508 netif_dbg(dev, tx_err, dev->net,
2509 "tx err %d\n", entry->urb->status);
2510 break;
2511 }
2512 }
2513
2514 usb_autopm_put_interface_async(dev->intf);
2515
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002516 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002517}
2518
2519static void lan78xx_queue_skb(struct sk_buff_head *list,
2520 struct sk_buff *newsk, enum skb_state state)
2521{
2522 struct skb_data *entry = (struct skb_data *)newsk->cb;
2523
2524 __skb_queue_tail(list, newsk);
2525 entry->state = state;
2526}
2527
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002528static netdev_tx_t
2529lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002530{
2531 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002532 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002533
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002534 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002535 skb_tx_timestamp(skb);
2536 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2537 }
2538
2539 if (skb2) {
2540 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002541
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002542 /* throttle TX patch at slower than SUPER SPEED USB */
2543 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2544 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002545 netif_stop_queue(net);
2546 } else {
2547 netif_dbg(dev, tx_err, dev->net,
2548 "lan78xx_tx_prep return NULL\n");
2549 dev->net->stats.tx_errors++;
2550 dev->net->stats.tx_dropped++;
2551 }
2552
2553 tasklet_schedule(&dev->bh);
2554
2555 return NETDEV_TX_OK;
2556}
2557
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002558static int
2559lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002560{
2561 int tmp;
2562 struct usb_host_interface *alt = NULL;
2563 struct usb_host_endpoint *in = NULL, *out = NULL;
2564 struct usb_host_endpoint *status = NULL;
2565
2566 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2567 unsigned ep;
2568
2569 in = NULL;
2570 out = NULL;
2571 status = NULL;
2572 alt = intf->altsetting + tmp;
2573
2574 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2575 struct usb_host_endpoint *e;
2576 int intr = 0;
2577
2578 e = alt->endpoint + ep;
2579 switch (e->desc.bmAttributes) {
2580 case USB_ENDPOINT_XFER_INT:
2581 if (!usb_endpoint_dir_in(&e->desc))
2582 continue;
2583 intr = 1;
2584 /* FALLTHROUGH */
2585 case USB_ENDPOINT_XFER_BULK:
2586 break;
2587 default:
2588 continue;
2589 }
2590 if (usb_endpoint_dir_in(&e->desc)) {
2591 if (!intr && !in)
2592 in = e;
2593 else if (intr && !status)
2594 status = e;
2595 } else {
2596 if (!out)
2597 out = e;
2598 }
2599 }
2600 if (in && out)
2601 break;
2602 }
2603 if (!alt || !in || !out)
2604 return -EINVAL;
2605
2606 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2607 in->desc.bEndpointAddress &
2608 USB_ENDPOINT_NUMBER_MASK);
2609 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2610 out->desc.bEndpointAddress &
2611 USB_ENDPOINT_NUMBER_MASK);
2612 dev->ep_intr = status;
2613
2614 return 0;
2615}
2616
2617static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2618{
2619 struct lan78xx_priv *pdata = NULL;
2620 int ret;
2621 int i;
2622
2623 ret = lan78xx_get_endpoints(dev, intf);
2624
2625 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2626
2627 pdata = (struct lan78xx_priv *)(dev->data[0]);
2628 if (!pdata) {
2629 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2630 return -ENOMEM;
2631 }
2632
2633 pdata->dev = dev;
2634
2635 spin_lock_init(&pdata->rfe_ctl_lock);
2636 mutex_init(&pdata->dataport_mutex);
2637
2638 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2639
2640 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2641 pdata->vlan_table[i] = 0;
2642
2643 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2644
2645 dev->net->features = 0;
2646
2647 if (DEFAULT_TX_CSUM_ENABLE)
2648 dev->net->features |= NETIF_F_HW_CSUM;
2649
2650 if (DEFAULT_RX_CSUM_ENABLE)
2651 dev->net->features |= NETIF_F_RXCSUM;
2652
2653 if (DEFAULT_TSO_CSUM_ENABLE)
2654 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2655
2656 dev->net->hw_features = dev->net->features;
2657
2658 /* Init all registers */
2659 ret = lan78xx_reset(dev);
2660
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002661 lan78xx_mdio_init(dev);
2662
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002663 dev->net->flags |= IFF_MULTICAST;
2664
2665 pdata->wol = WAKE_MAGIC;
2666
2667 return 0;
2668}
2669
2670static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
2671{
2672 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2673
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002674 lan78xx_remove_mdio(dev);
2675
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002676 if (pdata) {
2677 netif_dbg(dev, ifdown, dev->net, "free pdata");
2678 kfree(pdata);
2679 pdata = NULL;
2680 dev->data[0] = 0;
2681 }
2682}
2683
2684static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
2685 struct sk_buff *skb,
2686 u32 rx_cmd_a, u32 rx_cmd_b)
2687{
2688 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2689 unlikely(rx_cmd_a & RX_CMD_A_ICSM_)) {
2690 skb->ip_summed = CHECKSUM_NONE;
2691 } else {
2692 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
2693 skb->ip_summed = CHECKSUM_COMPLETE;
2694 }
2695}
2696
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002697static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002698{
2699 int status;
2700
2701 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
2702 skb_queue_tail(&dev->rxq_pause, skb);
2703 return;
2704 }
2705
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002706 dev->net->stats.rx_packets++;
2707 dev->net->stats.rx_bytes += skb->len;
2708
Woojung Huh74d79a22016-04-25 22:22:32 +00002709 skb->protocol = eth_type_trans(skb, dev->net);
2710
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002711 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
2712 skb->len + sizeof(struct ethhdr), skb->protocol);
2713 memset(skb->cb, 0, sizeof(struct skb_data));
2714
2715 if (skb_defer_rx_timestamp(skb))
2716 return;
2717
2718 status = netif_rx(skb);
2719 if (status != NET_RX_SUCCESS)
2720 netif_dbg(dev, rx_err, dev->net,
2721 "netif_rx status %d\n", status);
2722}
2723
2724static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
2725{
2726 if (skb->len < dev->net->hard_header_len)
2727 return 0;
2728
2729 while (skb->len > 0) {
2730 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2731 u16 rx_cmd_c;
2732 struct sk_buff *skb2;
2733 unsigned char *packet;
2734
2735 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
2736 le32_to_cpus(&rx_cmd_a);
2737 skb_pull(skb, sizeof(rx_cmd_a));
2738
2739 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
2740 le32_to_cpus(&rx_cmd_b);
2741 skb_pull(skb, sizeof(rx_cmd_b));
2742
2743 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
2744 le16_to_cpus(&rx_cmd_c);
2745 skb_pull(skb, sizeof(rx_cmd_c));
2746
2747 packet = skb->data;
2748
2749 /* get the packet length */
2750 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
2751 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2752
2753 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
2754 netif_dbg(dev, rx_err, dev->net,
2755 "Error rx_cmd_a=0x%08x", rx_cmd_a);
2756 } else {
2757 /* last frame in this batch */
2758 if (skb->len == size) {
2759 lan78xx_rx_csum_offload(dev, skb,
2760 rx_cmd_a, rx_cmd_b);
2761
2762 skb_trim(skb, skb->len - 4); /* remove fcs */
2763 skb->truesize = size + sizeof(struct sk_buff);
2764
2765 return 1;
2766 }
2767
2768 skb2 = skb_clone(skb, GFP_ATOMIC);
2769 if (unlikely(!skb2)) {
2770 netdev_warn(dev->net, "Error allocating skb");
2771 return 0;
2772 }
2773
2774 skb2->len = size;
2775 skb2->data = packet;
2776 skb_set_tail_pointer(skb2, size);
2777
2778 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
2779
2780 skb_trim(skb2, skb2->len - 4); /* remove fcs */
2781 skb2->truesize = size + sizeof(struct sk_buff);
2782
2783 lan78xx_skb_return(dev, skb2);
2784 }
2785
2786 skb_pull(skb, size);
2787
2788 /* padding bytes before the next frame starts */
2789 if (skb->len)
2790 skb_pull(skb, align_count);
2791 }
2792
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002793 return 1;
2794}
2795
2796static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
2797{
2798 if (!lan78xx_rx(dev, skb)) {
2799 dev->net->stats.rx_errors++;
2800 goto done;
2801 }
2802
2803 if (skb->len) {
2804 lan78xx_skb_return(dev, skb);
2805 return;
2806 }
2807
2808 netif_dbg(dev, rx_err, dev->net, "drop\n");
2809 dev->net->stats.rx_errors++;
2810done:
2811 skb_queue_tail(&dev->done, skb);
2812}
2813
2814static void rx_complete(struct urb *urb);
2815
2816static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
2817{
2818 struct sk_buff *skb;
2819 struct skb_data *entry;
2820 unsigned long lockflags;
2821 size_t size = dev->rx_urb_size;
2822 int ret = 0;
2823
2824 skb = netdev_alloc_skb_ip_align(dev->net, size);
2825 if (!skb) {
2826 usb_free_urb(urb);
2827 return -ENOMEM;
2828 }
2829
2830 entry = (struct skb_data *)skb->cb;
2831 entry->urb = urb;
2832 entry->dev = dev;
2833 entry->length = 0;
2834
2835 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
2836 skb->data, size, rx_complete, skb);
2837
2838 spin_lock_irqsave(&dev->rxq.lock, lockflags);
2839
2840 if (netif_device_present(dev->net) &&
2841 netif_running(dev->net) &&
2842 !test_bit(EVENT_RX_HALT, &dev->flags) &&
2843 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
2844 ret = usb_submit_urb(urb, GFP_ATOMIC);
2845 switch (ret) {
2846 case 0:
2847 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
2848 break;
2849 case -EPIPE:
2850 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
2851 break;
2852 case -ENODEV:
2853 netif_dbg(dev, ifdown, dev->net, "device gone\n");
2854 netif_device_detach(dev->net);
2855 break;
2856 case -EHOSTUNREACH:
2857 ret = -ENOLINK;
2858 break;
2859 default:
2860 netif_dbg(dev, rx_err, dev->net,
2861 "rx submit, %d\n", ret);
2862 tasklet_schedule(&dev->bh);
2863 }
2864 } else {
2865 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
2866 ret = -ENOLINK;
2867 }
2868 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
2869 if (ret) {
2870 dev_kfree_skb_any(skb);
2871 usb_free_urb(urb);
2872 }
2873 return ret;
2874}
2875
2876static void rx_complete(struct urb *urb)
2877{
2878 struct sk_buff *skb = (struct sk_buff *)urb->context;
2879 struct skb_data *entry = (struct skb_data *)skb->cb;
2880 struct lan78xx_net *dev = entry->dev;
2881 int urb_status = urb->status;
2882 enum skb_state state;
2883
2884 skb_put(skb, urb->actual_length);
2885 state = rx_done;
2886 entry->urb = NULL;
2887
2888 switch (urb_status) {
2889 case 0:
2890 if (skb->len < dev->net->hard_header_len) {
2891 state = rx_cleanup;
2892 dev->net->stats.rx_errors++;
2893 dev->net->stats.rx_length_errors++;
2894 netif_dbg(dev, rx_err, dev->net,
2895 "rx length %d\n", skb->len);
2896 }
2897 usb_mark_last_busy(dev->udev);
2898 break;
2899 case -EPIPE:
2900 dev->net->stats.rx_errors++;
2901 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
2902 /* FALLTHROUGH */
2903 case -ECONNRESET: /* async unlink */
2904 case -ESHUTDOWN: /* hardware gone */
2905 netif_dbg(dev, ifdown, dev->net,
2906 "rx shutdown, code %d\n", urb_status);
2907 state = rx_cleanup;
2908 entry->urb = urb;
2909 urb = NULL;
2910 break;
2911 case -EPROTO:
2912 case -ETIME:
2913 case -EILSEQ:
2914 dev->net->stats.rx_errors++;
2915 state = rx_cleanup;
2916 entry->urb = urb;
2917 urb = NULL;
2918 break;
2919
2920 /* data overrun ... flush fifo? */
2921 case -EOVERFLOW:
2922 dev->net->stats.rx_over_errors++;
2923 /* FALLTHROUGH */
2924
2925 default:
2926 state = rx_cleanup;
2927 dev->net->stats.rx_errors++;
2928 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
2929 break;
2930 }
2931
2932 state = defer_bh(dev, skb, &dev->rxq, state);
2933
2934 if (urb) {
2935 if (netif_running(dev->net) &&
2936 !test_bit(EVENT_RX_HALT, &dev->flags) &&
2937 state != unlink_start) {
2938 rx_submit(dev, urb, GFP_ATOMIC);
2939 return;
2940 }
2941 usb_free_urb(urb);
2942 }
2943 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
2944}
2945
2946static void lan78xx_tx_bh(struct lan78xx_net *dev)
2947{
2948 int length;
2949 struct urb *urb = NULL;
2950 struct skb_data *entry;
2951 unsigned long flags;
2952 struct sk_buff_head *tqp = &dev->txq_pend;
2953 struct sk_buff *skb, *skb2;
2954 int ret;
2955 int count, pos;
2956 int skb_totallen, pkt_cnt;
2957
2958 skb_totallen = 0;
2959 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00002960 count = 0;
2961 length = 0;
Stefan Wahrenf6ed63b2018-07-15 21:53:20 +02002962 spin_lock_irqsave(&tqp->lock, flags);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002963 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
2964 if (skb_is_gso(skb)) {
2965 if (pkt_cnt) {
2966 /* handle previous packets first */
2967 break;
2968 }
Woojung Huh74d79a22016-04-25 22:22:32 +00002969 count = 1;
2970 length = skb->len - TX_OVERHEAD;
Stefan Wahrenf6ed63b2018-07-15 21:53:20 +02002971 __skb_unlink(skb, tqp);
2972 spin_unlock_irqrestore(&tqp->lock, flags);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002973 goto gso_skb;
2974 }
2975
2976 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
2977 break;
2978 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
2979 pkt_cnt++;
2980 }
Stefan Wahrenf6ed63b2018-07-15 21:53:20 +02002981 spin_unlock_irqrestore(&tqp->lock, flags);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002982
2983 /* copy to a single skb */
2984 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
2985 if (!skb)
2986 goto drop;
2987
2988 skb_put(skb, skb_totallen);
2989
2990 for (count = pos = 0; count < pkt_cnt; count++) {
2991 skb2 = skb_dequeue(tqp);
2992 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002993 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002994 memcpy(skb->data + pos, skb2->data, skb2->len);
2995 pos += roundup(skb2->len, sizeof(u32));
2996 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002997 }
2998 }
2999
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003000gso_skb:
3001 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003002 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003003 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003004
3005 entry = (struct skb_data *)skb->cb;
3006 entry->urb = urb;
3007 entry->dev = dev;
3008 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003009 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003010
3011 spin_lock_irqsave(&dev->txq.lock, flags);
3012 ret = usb_autopm_get_interface_async(dev->intf);
3013 if (ret < 0) {
3014 spin_unlock_irqrestore(&dev->txq.lock, flags);
3015 goto drop;
3016 }
3017
3018 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3019 skb->data, skb->len, tx_complete, skb);
3020
3021 if (length % dev->maxpacket == 0) {
3022 /* send USB_ZERO_PACKET */
3023 urb->transfer_flags |= URB_ZERO_PACKET;
3024 }
3025
3026#ifdef CONFIG_PM
3027 /* if this triggers the device is still a sleep */
3028 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3029 /* transmission will be done in resume */
3030 usb_anchor_urb(urb, &dev->deferred);
3031 /* no use to process more packets */
3032 netif_stop_queue(dev->net);
3033 usb_put_urb(urb);
3034 spin_unlock_irqrestore(&dev->txq.lock, flags);
3035 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3036 return;
3037 }
3038#endif
3039
3040 ret = usb_submit_urb(urb, GFP_ATOMIC);
3041 switch (ret) {
3042 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003043 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003044 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3045 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3046 netif_stop_queue(dev->net);
3047 break;
3048 case -EPIPE:
3049 netif_stop_queue(dev->net);
3050 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3051 usb_autopm_put_interface_async(dev->intf);
3052 break;
3053 default:
3054 usb_autopm_put_interface_async(dev->intf);
3055 netif_dbg(dev, tx_err, dev->net,
3056 "tx: submit urb err %d\n", ret);
3057 break;
3058 }
3059
3060 spin_unlock_irqrestore(&dev->txq.lock, flags);
3061
3062 if (ret) {
3063 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3064drop:
3065 dev->net->stats.tx_dropped++;
3066 if (skb)
3067 dev_kfree_skb_any(skb);
3068 usb_free_urb(urb);
3069 } else
3070 netif_dbg(dev, tx_queued, dev->net,
3071 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3072}
3073
3074static void lan78xx_rx_bh(struct lan78xx_net *dev)
3075{
3076 struct urb *urb;
3077 int i;
3078
3079 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3080 for (i = 0; i < 10; i++) {
3081 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3082 break;
3083 urb = usb_alloc_urb(0, GFP_ATOMIC);
3084 if (urb)
3085 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3086 return;
3087 }
3088
3089 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3090 tasklet_schedule(&dev->bh);
3091 }
3092 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3093 netif_wake_queue(dev->net);
3094}
3095
3096static void lan78xx_bh(unsigned long param)
3097{
3098 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3099 struct sk_buff *skb;
3100 struct skb_data *entry;
3101
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003102 while ((skb = skb_dequeue(&dev->done))) {
3103 entry = (struct skb_data *)(skb->cb);
3104 switch (entry->state) {
3105 case rx_done:
3106 entry->state = rx_cleanup;
3107 rx_process(dev, skb);
3108 continue;
3109 case tx_done:
3110 usb_free_urb(entry->urb);
3111 dev_kfree_skb(skb);
3112 continue;
3113 case rx_cleanup:
3114 usb_free_urb(entry->urb);
3115 dev_kfree_skb(skb);
3116 continue;
3117 default:
3118 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3119 return;
3120 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003121 }
3122
3123 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003124 /* reset update timer delta */
3125 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3126 dev->delta = 1;
3127 mod_timer(&dev->stat_monitor,
3128 jiffies + STAT_UPDATE_TIMER);
3129 }
3130
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003131 if (!skb_queue_empty(&dev->txq_pend))
3132 lan78xx_tx_bh(dev);
3133
3134 if (!timer_pending(&dev->delay) &&
3135 !test_bit(EVENT_RX_HALT, &dev->flags))
3136 lan78xx_rx_bh(dev);
3137 }
3138}
3139
3140static void lan78xx_delayedwork(struct work_struct *work)
3141{
3142 int status;
3143 struct lan78xx_net *dev;
3144
3145 dev = container_of(work, struct lan78xx_net, wq.work);
3146
3147 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3148 unlink_urbs(dev, &dev->txq);
3149 status = usb_autopm_get_interface(dev->intf);
3150 if (status < 0)
3151 goto fail_pipe;
3152 status = usb_clear_halt(dev->udev, dev->pipe_out);
3153 usb_autopm_put_interface(dev->intf);
3154 if (status < 0 &&
3155 status != -EPIPE &&
3156 status != -ESHUTDOWN) {
3157 if (netif_msg_tx_err(dev))
3158fail_pipe:
3159 netdev_err(dev->net,
3160 "can't clear tx halt, status %d\n",
3161 status);
3162 } else {
3163 clear_bit(EVENT_TX_HALT, &dev->flags);
3164 if (status != -ESHUTDOWN)
3165 netif_wake_queue(dev->net);
3166 }
3167 }
3168 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3169 unlink_urbs(dev, &dev->rxq);
3170 status = usb_autopm_get_interface(dev->intf);
3171 if (status < 0)
3172 goto fail_halt;
3173 status = usb_clear_halt(dev->udev, dev->pipe_in);
3174 usb_autopm_put_interface(dev->intf);
3175 if (status < 0 &&
3176 status != -EPIPE &&
3177 status != -ESHUTDOWN) {
3178 if (netif_msg_rx_err(dev))
3179fail_halt:
3180 netdev_err(dev->net,
3181 "can't clear rx halt, status %d\n",
3182 status);
3183 } else {
3184 clear_bit(EVENT_RX_HALT, &dev->flags);
3185 tasklet_schedule(&dev->bh);
3186 }
3187 }
3188
3189 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3190 int ret = 0;
3191
3192 clear_bit(EVENT_LINK_RESET, &dev->flags);
3193 status = usb_autopm_get_interface(dev->intf);
3194 if (status < 0)
3195 goto skip_reset;
3196 if (lan78xx_link_reset(dev) < 0) {
3197 usb_autopm_put_interface(dev->intf);
3198skip_reset:
3199 netdev_info(dev->net, "link reset failed (%d)\n",
3200 ret);
3201 } else {
3202 usb_autopm_put_interface(dev->intf);
3203 }
3204 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003205
3206 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3207 lan78xx_update_stats(dev);
3208
3209 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3210
3211 mod_timer(&dev->stat_monitor,
3212 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3213
3214 dev->delta = min((dev->delta * 2), 50);
3215 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003216}
3217
3218static void intr_complete(struct urb *urb)
3219{
3220 struct lan78xx_net *dev = urb->context;
3221 int status = urb->status;
3222
3223 switch (status) {
3224 /* success */
3225 case 0:
3226 lan78xx_status(dev, urb);
3227 break;
3228
3229 /* software-driven interface shutdown */
3230 case -ENOENT: /* urb killed */
3231 case -ESHUTDOWN: /* hardware gone */
3232 netif_dbg(dev, ifdown, dev->net,
3233 "intr shutdown, code %d\n", status);
3234 return;
3235
3236 /* NOTE: not throttling like RX/TX, since this endpoint
3237 * already polls infrequently
3238 */
3239 default:
3240 netdev_dbg(dev->net, "intr status %d\n", status);
3241 break;
3242 }
3243
3244 if (!netif_running(dev->net))
3245 return;
3246
3247 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3248 status = usb_submit_urb(urb, GFP_ATOMIC);
3249 if (status != 0)
3250 netif_err(dev, timer, dev->net,
3251 "intr resubmit --> %d\n", status);
3252}
3253
3254static void lan78xx_disconnect(struct usb_interface *intf)
3255{
3256 struct lan78xx_net *dev;
3257 struct usb_device *udev;
3258 struct net_device *net;
3259
3260 dev = usb_get_intfdata(intf);
3261 usb_set_intfdata(intf, NULL);
3262 if (!dev)
3263 return;
3264
3265 udev = interface_to_usbdev(intf);
3266
3267 net = dev->net;
3268 unregister_netdev(net);
3269
3270 cancel_delayed_work_sync(&dev->wq);
3271
3272 usb_scuttle_anchored_urbs(&dev->deferred);
3273
3274 lan78xx_unbind(dev, intf);
3275
3276 usb_kill_urb(dev->urb_intr);
3277 usb_free_urb(dev->urb_intr);
3278
3279 free_netdev(net);
3280 usb_put_dev(udev);
3281}
3282
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003283static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003284{
3285 struct lan78xx_net *dev = netdev_priv(net);
3286
3287 unlink_urbs(dev, &dev->txq);
3288 tasklet_schedule(&dev->bh);
3289}
3290
3291static const struct net_device_ops lan78xx_netdev_ops = {
3292 .ndo_open = lan78xx_open,
3293 .ndo_stop = lan78xx_stop,
3294 .ndo_start_xmit = lan78xx_start_xmit,
3295 .ndo_tx_timeout = lan78xx_tx_timeout,
3296 .ndo_change_mtu = lan78xx_change_mtu,
3297 .ndo_set_mac_address = lan78xx_set_mac_addr,
3298 .ndo_validate_addr = eth_validate_addr,
3299 .ndo_do_ioctl = lan78xx_ioctl,
3300 .ndo_set_rx_mode = lan78xx_set_multicast,
3301 .ndo_set_features = lan78xx_set_features,
3302 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3303 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3304};
3305
Woojung Huh20ff5562016-03-16 22:10:40 +00003306static void lan78xx_stat_monitor(unsigned long param)
3307{
3308 struct lan78xx_net *dev;
3309
3310 dev = (struct lan78xx_net *)param;
3311
3312 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3313}
3314
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003315static int lan78xx_probe(struct usb_interface *intf,
3316 const struct usb_device_id *id)
3317{
3318 struct lan78xx_net *dev;
3319 struct net_device *netdev;
3320 struct usb_device *udev;
3321 int ret;
3322 unsigned maxp;
3323 unsigned period;
3324 u8 *buf = NULL;
3325
3326 udev = interface_to_usbdev(intf);
3327 udev = usb_get_dev(udev);
3328
3329 ret = -ENOMEM;
3330 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3331 if (!netdev) {
3332 dev_err(&intf->dev, "Error: OOM\n");
3333 goto out1;
3334 }
3335
3336 /* netdev_printk() needs this */
3337 SET_NETDEV_DEV(netdev, &intf->dev);
3338
3339 dev = netdev_priv(netdev);
3340 dev->udev = udev;
3341 dev->intf = intf;
3342 dev->net = netdev;
3343 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3344 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3345
3346 skb_queue_head_init(&dev->rxq);
3347 skb_queue_head_init(&dev->txq);
3348 skb_queue_head_init(&dev->done);
3349 skb_queue_head_init(&dev->rxq_pause);
3350 skb_queue_head_init(&dev->txq_pend);
3351 mutex_init(&dev->phy_mutex);
3352
3353 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3354 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3355 init_usb_anchor(&dev->deferred);
3356
3357 netdev->netdev_ops = &lan78xx_netdev_ops;
3358 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3359 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3360
Woojung Huh20ff5562016-03-16 22:10:40 +00003361 dev->stat_monitor.function = lan78xx_stat_monitor;
3362 dev->stat_monitor.data = (unsigned long)dev;
3363 dev->delta = 1;
3364 init_timer(&dev->stat_monitor);
3365
3366 mutex_init(&dev->stats.access_lock);
3367
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003368 ret = lan78xx_bind(dev, intf);
3369 if (ret < 0)
3370 goto out2;
3371 strcpy(netdev->name, "eth%d");
3372
3373 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3374 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3375
3376 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3377 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3378 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3379
3380 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3381 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3382
3383 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3384 dev->ep_intr->desc.bEndpointAddress &
3385 USB_ENDPOINT_NUMBER_MASK);
3386 period = dev->ep_intr->desc.bInterval;
3387
3388 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3389 buf = kmalloc(maxp, GFP_KERNEL);
3390 if (buf) {
3391 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3392 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003393 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003394 kfree(buf);
3395 goto out3;
3396 } else {
3397 usb_fill_int_urb(dev->urb_intr, dev->udev,
3398 dev->pipe_intr, buf, maxp,
3399 intr_complete, dev, period);
3400 }
3401 }
3402
3403 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3404
3405 /* driver requires remote-wakeup capability during autosuspend. */
3406 intf->needs_remote_wakeup = 1;
3407
3408 ret = register_netdev(netdev);
3409 if (ret != 0) {
3410 netif_err(dev, probe, netdev, "couldn't register the device\n");
3411 goto out2;
3412 }
3413
3414 usb_set_intfdata(intf, dev);
3415
3416 ret = device_set_wakeup_enable(&udev->dev, true);
3417
3418 /* Default delay of 2sec has more overhead than advantage.
3419 * Set to 10sec as default.
3420 */
3421 pm_runtime_set_autosuspend_delay(&udev->dev,
3422 DEFAULT_AUTOSUSPEND_DELAY);
3423
3424 return 0;
3425
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003426out3:
3427 lan78xx_unbind(dev, intf);
3428out2:
3429 free_netdev(netdev);
3430out1:
3431 usb_put_dev(udev);
3432
3433 return ret;
3434}
3435
3436static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3437{
3438 const u16 crc16poly = 0x8005;
3439 int i;
3440 u16 bit, crc, msb;
3441 u8 data;
3442
3443 crc = 0xFFFF;
3444 for (i = 0; i < len; i++) {
3445 data = *buf++;
3446 for (bit = 0; bit < 8; bit++) {
3447 msb = crc >> 15;
3448 crc <<= 1;
3449
3450 if (msb ^ (u16)(data & 1)) {
3451 crc ^= crc16poly;
3452 crc |= (u16)0x0001U;
3453 }
3454 data >>= 1;
3455 }
3456 }
3457
3458 return crc;
3459}
3460
3461static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3462{
3463 u32 buf;
3464 int ret;
3465 int mask_index;
3466 u16 crc;
3467 u32 temp_wucsr;
3468 u32 temp_pmt_ctl;
3469 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3470 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3471 const u8 arp_type[2] = { 0x08, 0x06 };
3472
3473 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3474 buf &= ~MAC_TX_TXEN_;
3475 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3476 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3477 buf &= ~MAC_RX_RXEN_;
3478 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3479
3480 ret = lan78xx_write_reg(dev, WUCSR, 0);
3481 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3482 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3483
3484 temp_wucsr = 0;
3485
3486 temp_pmt_ctl = 0;
3487 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3488 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3489 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3490
3491 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3492 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3493
3494 mask_index = 0;
3495 if (wol & WAKE_PHY) {
3496 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3497
3498 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3499 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3500 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3501 }
3502 if (wol & WAKE_MAGIC) {
3503 temp_wucsr |= WUCSR_MPEN_;
3504
3505 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3506 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3507 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3508 }
3509 if (wol & WAKE_BCAST) {
3510 temp_wucsr |= WUCSR_BCST_EN_;
3511
3512 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3513 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3514 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3515 }
3516 if (wol & WAKE_MCAST) {
3517 temp_wucsr |= WUCSR_WAKE_EN_;
3518
3519 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3520 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3521 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3522 WUF_CFGX_EN_ |
3523 WUF_CFGX_TYPE_MCAST_ |
3524 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3525 (crc & WUF_CFGX_CRC16_MASK_));
3526
3527 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3528 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3529 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3530 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3531 mask_index++;
3532
3533 /* for IPv6 Multicast */
3534 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3535 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3536 WUF_CFGX_EN_ |
3537 WUF_CFGX_TYPE_MCAST_ |
3538 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3539 (crc & WUF_CFGX_CRC16_MASK_));
3540
3541 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3542 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3543 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3544 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3545 mask_index++;
3546
3547 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3548 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3549 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3550 }
3551 if (wol & WAKE_UCAST) {
3552 temp_wucsr |= WUCSR_PFDA_EN_;
3553
3554 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3555 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3556 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3557 }
3558 if (wol & WAKE_ARP) {
3559 temp_wucsr |= WUCSR_WAKE_EN_;
3560
3561 /* set WUF_CFG & WUF_MASK
3562 * for packettype (offset 12,13) = ARP (0x0806)
3563 */
3564 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3565 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3566 WUF_CFGX_EN_ |
3567 WUF_CFGX_TYPE_ALL_ |
3568 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3569 (crc & WUF_CFGX_CRC16_MASK_));
3570
3571 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3572 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3573 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3574 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3575 mask_index++;
3576
3577 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3578 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3579 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3580 }
3581
3582 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3583
3584 /* when multiple WOL bits are set */
3585 if (hweight_long((unsigned long)wol) > 1) {
3586 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3587 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3588 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3589 }
3590 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3591
3592 /* clear WUPS */
3593 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3594 buf |= PMT_CTL_WUPS_MASK_;
3595 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3596
3597 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3598 buf |= MAC_RX_RXEN_;
3599 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3600
3601 return 0;
3602}
3603
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003604static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003605{
3606 struct lan78xx_net *dev = usb_get_intfdata(intf);
3607 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3608 u32 buf;
3609 int ret;
3610 int event;
3611
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003612 event = message.event;
3613
3614 if (!dev->suspend_count++) {
3615 spin_lock_irq(&dev->txq.lock);
3616 /* don't autosuspend while transmitting */
3617 if ((skb_queue_len(&dev->txq) ||
3618 skb_queue_len(&dev->txq_pend)) &&
3619 PMSG_IS_AUTO(message)) {
3620 spin_unlock_irq(&dev->txq.lock);
3621 ret = -EBUSY;
3622 goto out;
3623 } else {
3624 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
3625 spin_unlock_irq(&dev->txq.lock);
3626 }
3627
3628 /* stop TX & RX */
3629 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3630 buf &= ~MAC_TX_TXEN_;
3631 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3632 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3633 buf &= ~MAC_RX_RXEN_;
3634 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3635
3636 /* empty out the rx and queues */
3637 netif_device_detach(dev->net);
3638 lan78xx_terminate_urbs(dev);
3639 usb_kill_urb(dev->urb_intr);
3640
3641 /* reattach */
3642 netif_device_attach(dev->net);
3643 }
3644
3645 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003646 del_timer(&dev->stat_monitor);
3647
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003648 if (PMSG_IS_AUTO(message)) {
3649 /* auto suspend (selective suspend) */
3650 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3651 buf &= ~MAC_TX_TXEN_;
3652 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3653 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3654 buf &= ~MAC_RX_RXEN_;
3655 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3656
3657 ret = lan78xx_write_reg(dev, WUCSR, 0);
3658 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3659 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3660
3661 /* set goodframe wakeup */
3662 ret = lan78xx_read_reg(dev, WUCSR, &buf);
3663
3664 buf |= WUCSR_RFE_WAKE_EN_;
3665 buf |= WUCSR_STORE_WAKE_;
3666
3667 ret = lan78xx_write_reg(dev, WUCSR, buf);
3668
3669 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3670
3671 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
3672 buf |= PMT_CTL_RES_CLR_WKP_STS_;
3673
3674 buf |= PMT_CTL_PHY_WAKE_EN_;
3675 buf |= PMT_CTL_WOL_EN_;
3676 buf &= ~PMT_CTL_SUS_MODE_MASK_;
3677 buf |= PMT_CTL_SUS_MODE_3_;
3678
3679 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3680
3681 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3682
3683 buf |= PMT_CTL_WUPS_MASK_;
3684
3685 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3686
3687 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3688 buf |= MAC_RX_RXEN_;
3689 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3690 } else {
3691 lan78xx_set_suspend(dev, pdata->wol);
3692 }
3693 }
3694
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00003695 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003696out:
3697 return ret;
3698}
3699
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003700static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003701{
3702 struct lan78xx_net *dev = usb_get_intfdata(intf);
3703 struct sk_buff *skb;
3704 struct urb *res;
3705 int ret;
3706 u32 buf;
3707
Woojung Huh20ff5562016-03-16 22:10:40 +00003708 if (!timer_pending(&dev->stat_monitor)) {
3709 dev->delta = 1;
3710 mod_timer(&dev->stat_monitor,
3711 jiffies + STAT_UPDATE_TIMER);
3712 }
3713
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003714 if (!--dev->suspend_count) {
3715 /* resume interrupt URBs */
3716 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
3717 usb_submit_urb(dev->urb_intr, GFP_NOIO);
3718
3719 spin_lock_irq(&dev->txq.lock);
3720 while ((res = usb_get_from_anchor(&dev->deferred))) {
3721 skb = (struct sk_buff *)res->context;
3722 ret = usb_submit_urb(res, GFP_ATOMIC);
3723 if (ret < 0) {
3724 dev_kfree_skb_any(skb);
3725 usb_free_urb(res);
3726 usb_autopm_put_interface_async(dev->intf);
3727 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02003728 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003729 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3730 }
3731 }
3732
3733 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
3734 spin_unlock_irq(&dev->txq.lock);
3735
3736 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
3737 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
3738 netif_start_queue(dev->net);
3739 tasklet_schedule(&dev->bh);
3740 }
3741 }
3742
3743 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3744 ret = lan78xx_write_reg(dev, WUCSR, 0);
3745 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3746
3747 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
3748 WUCSR2_ARP_RCD_ |
3749 WUCSR2_IPV6_TCPSYN_RCD_ |
3750 WUCSR2_IPV4_TCPSYN_RCD_);
3751
3752 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
3753 WUCSR_EEE_RX_WAKE_ |
3754 WUCSR_PFDA_FR_ |
3755 WUCSR_RFE_WAKE_FR_ |
3756 WUCSR_WUFR_ |
3757 WUCSR_MPR_ |
3758 WUCSR_BCST_FR_);
3759
3760 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3761 buf |= MAC_TX_TXEN_;
3762 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3763
3764 return 0;
3765}
3766
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003767static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003768{
3769 struct lan78xx_net *dev = usb_get_intfdata(intf);
3770
3771 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003772
3773 lan78xx_phy_init(dev);
3774
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003775 return lan78xx_resume(intf);
3776}
3777
3778static const struct usb_device_id products[] = {
3779 {
3780 /* LAN7800 USB Gigabit Ethernet Device */
3781 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
3782 },
3783 {
3784 /* LAN7850 USB Gigabit Ethernet Device */
3785 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
3786 },
3787 {},
3788};
3789MODULE_DEVICE_TABLE(usb, products);
3790
3791static struct usb_driver lan78xx_driver = {
3792 .name = DRIVER_NAME,
3793 .id_table = products,
3794 .probe = lan78xx_probe,
3795 .disconnect = lan78xx_disconnect,
3796 .suspend = lan78xx_suspend,
3797 .resume = lan78xx_resume,
3798 .reset_resume = lan78xx_reset_resume,
3799 .supports_autosuspend = 1,
3800 .disable_hub_initiated_lpm = 1,
3801};
3802
3803module_usb_driver(lan78xx_driver);
3804
3805MODULE_AUTHOR(DRIVER_AUTHOR);
3806MODULE_DESCRIPTION(DRIVER_DESC);
3807MODULE_LICENSE("GPL");