blob: 3fa335405b317c9926c6bfe5fac4c6a16ffcbfdb [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
9#include <linux/device.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080010#include <linux/kernel.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011#include <linux/platform_device.h>
Barry Song6e364752009-09-29 03:01:40 +000012#include <linux/io.h>
Bryan Wu1394f032007-05-06 14:50:22 -070013#include <linux/mtd/mtd.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080014#include <linux/mtd/nand.h>
Bryan Wu1394f032007-05-06 14:50:22 -070015#include <linux/mtd/partitions.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080016#include <linux/mtd/plat-ram.h>
Mike Frysingerde8c43f2008-01-24 17:14:04 +080017#include <linux/mtd/physmap.h>
Bryan Wu1394f032007-05-06 14:50:22 -070018#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
Mike Frysingerf02bcec2007-11-15 21:29:15 +080021#include <linux/usb/isp1362.h>
Bryan Wu1394f032007-05-06 14:50:22 -070022#endif
Sonic Zhang7a9cc482009-12-22 04:47:04 +000023#include <linux/i2c.h>
24#include <linux/i2c/adp5588.h>
Mike Frysinger0531c462010-01-19 07:04:29 +000025#include <linux/etherdevice.h>
Jeff Garzik0a87e3e2008-02-01 18:02:30 -050026#include <linux/ata_platform.h>
Bryan Wu1394f032007-05-06 14:50:22 -070027#include <linux/irq.h>
28#include <linux/interrupt.h>
David Brownell27f5d752007-10-04 18:06:16 -070029#include <linux/usb/sl811.h>
Yi Lif79ea4c2009-01-07 23:14:38 +080030#include <linux/spi/mmc_spi.h>
Michael Hennerich78756c62009-10-13 15:28:33 +000031#include <linux/leds.h>
32#include <linux/input.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080033#include <asm/dma.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080034#include <asm/bfin5xx_spi.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080035#include <asm/reboot.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080036#include <asm/portmux.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080037#include <asm/dpmc.h>
Sonic Zhang1b04cbe2010-06-02 05:00:21 +000038#ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
39#include <linux/regulator/fixed.h>
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +000040#endif
Sonic Zhang1b04cbe2010-06-02 05:00:21 +000041#include <linux/regulator/machine.h>
Sonic Zhangf32792d2010-02-09 02:47:09 +000042#include <linux/regulator/consumer.h>
43#include <linux/regulator/userspace-consumer.h>
Bryan Wu1394f032007-05-06 14:50:22 -070044
45/*
46 * Name the Board for the /proc/cpuinfo
47 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080048const char bfin_board_name[] = "ADI BF537-STAMP";
Bryan Wu1394f032007-05-06 14:50:22 -070049
50/*
51 * Driver needs to know address, irq and flag pin.
52 */
53
Bryan Wu1394f032007-05-06 14:50:22 -070054#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
Michael Hennerich3f375692008-11-18 17:48:22 +080055#include <linux/usb/isp1760.h>
56static struct resource bfin_isp1760_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -070057 [0] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080058 .start = 0x203C0000,
59 .end = 0x203C0000 + 0x000fffff,
Bryan Wu1394f032007-05-06 14:50:22 -070060 .flags = IORESOURCE_MEM,
61 },
62 [1] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080063 .start = IRQ_PF7,
64 .end = IRQ_PF7,
Michael Hennerich6a6be3d2009-01-07 23:14:39 +080065 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Bryan Wu1394f032007-05-06 14:50:22 -070066 },
67};
68
Michael Hennerich3f375692008-11-18 17:48:22 +080069static struct isp1760_platform_data isp1760_priv = {
70 .is_isp1761 = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080071 .bus_width_16 = 1,
72 .port1_otg = 0,
73 .analog_oc = 0,
74 .dack_polarity_high = 0,
75 .dreq_polarity_high = 0,
76};
77
78static struct platform_device bfin_isp1760_device = {
Michael Hennerichc6feb762009-10-15 10:37:33 +000079 .name = "isp1760",
Bryan Wu1394f032007-05-06 14:50:22 -070080 .id = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080081 .dev = {
82 .platform_data = &isp1760_priv,
83 },
84 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
85 .resource = bfin_isp1760_resources,
Bryan Wu1394f032007-05-06 14:50:22 -070086};
Bryan Wu1394f032007-05-06 14:50:22 -070087#endif
88
Michael Hennerich2463ef22008-01-27 16:49:48 +080089#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
Michael Hennerich2463ef22008-01-27 16:49:48 +080090#include <linux/gpio_keys.h>
91
92static struct gpio_keys_button bfin_gpio_keys_table[] = {
93 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
94 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
95 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
96 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
97};
98
99static struct gpio_keys_platform_data bfin_gpio_keys_data = {
100 .buttons = bfin_gpio_keys_table,
101 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
102};
103
104static struct platform_device bfin_device_gpiokeys = {
105 .name = "gpio-keys",
106 .dev = {
107 .platform_data = &bfin_gpio_keys_data,
108 },
109};
110#endif
111
Bryan Wu1394f032007-05-06 14:50:22 -0700112#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
113static struct resource bfin_pcmcia_cf_resources[] = {
114 {
115 .start = 0x20310000, /* IO PORT */
116 .end = 0x20312000,
117 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800118 }, {
Simon Arlottd2d50aa2007-06-11 15:31:30 +0800119 .start = 0x20311000, /* Attribute Memory */
Bryan Wu1394f032007-05-06 14:50:22 -0700120 .end = 0x20311FFF,
121 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800122 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700123 .start = IRQ_PF4,
124 .end = IRQ_PF4,
125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800126 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700127 .start = 6, /* Card Detect PF6 */
128 .end = 6,
129 .flags = IORESOURCE_IRQ,
130 },
131};
132
133static struct platform_device bfin_pcmcia_cf_device = {
134 .name = "bfin_cf_pcmcia",
135 .id = -1,
136 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
137 .resource = bfin_pcmcia_cf_resources,
138};
139#endif
140
141#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
142static struct platform_device rtc_device = {
143 .name = "rtc-bfin",
144 .id = -1,
145};
146#endif
147
148#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000149#include <linux/smc91x.h>
150
151static struct smc91x_platdata smc91x_info = {
152 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
153 .leda = RPC_LED_100_10,
154 .ledb = RPC_LED_TX_RX,
155};
156
Bryan Wu1394f032007-05-06 14:50:22 -0700157static struct resource smc91x_resources[] = {
158 {
159 .name = "smc91x-regs",
160 .start = 0x20300300,
161 .end = 0x20300300 + 16,
162 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800163 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700164
165 .start = IRQ_PF7,
166 .end = IRQ_PF7,
167 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
168 },
169};
170static struct platform_device smc91x_device = {
171 .name = "smc91x",
172 .id = 0,
173 .num_resources = ARRAY_SIZE(smc91x_resources),
174 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000175 .dev = {
176 .platform_data = &smc91x_info,
177 },
Bryan Wu1394f032007-05-06 14:50:22 -0700178};
179#endif
180
Alex Landauf40d24d2007-07-12 12:11:48 +0800181#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
182static struct resource dm9000_resources[] = {
183 [0] = {
184 .start = 0x203FB800,
Barry Songb3dec4a2009-07-27 06:42:50 +0000185 .end = 0x203FB800 + 1,
Alex Landauf40d24d2007-07-12 12:11:48 +0800186 .flags = IORESOURCE_MEM,
187 },
188 [1] = {
Barry Songb3dec4a2009-07-27 06:42:50 +0000189 .start = 0x203FB804,
190 .end = 0x203FB804 + 1,
191 .flags = IORESOURCE_MEM,
192 },
193 [2] = {
Alex Landauf40d24d2007-07-12 12:11:48 +0800194 .start = IRQ_PF9,
195 .end = IRQ_PF9,
196 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
197 },
198};
199
200static struct platform_device dm9000_device = {
201 .name = "dm9000",
202 .id = -1,
203 .num_resources = ARRAY_SIZE(dm9000_resources),
204 .resource = dm9000_resources,
205};
206#endif
207
Bryan Wu1394f032007-05-06 14:50:22 -0700208#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
209static struct resource sl811_hcd_resources[] = {
210 {
211 .start = 0x20340000,
212 .end = 0x20340000,
213 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800214 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700215 .start = 0x20340004,
216 .end = 0x20340004,
217 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800218 }, {
Mike Frysinger01218652009-12-21 15:07:43 +0000219 .start = IRQ_PF4,
220 .end = IRQ_PF4,
Bryan Wu1394f032007-05-06 14:50:22 -0700221 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
222 },
223};
224
225#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
226void sl811_port_power(struct device *dev, int is_on)
227{
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800228 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
Michael Hennerichacbcd262008-01-22 18:36:20 +0800229 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
Bryan Wu1394f032007-05-06 14:50:22 -0700230}
231#endif
232
233static struct sl811_platform_data sl811_priv = {
234 .potpg = 10,
235 .power = 250, /* == 500mA */
236#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
237 .port_power = &sl811_port_power,
238#endif
239};
240
241static struct platform_device sl811_hcd_device = {
242 .name = "sl811-hcd",
243 .id = 0,
244 .dev = {
245 .platform_data = &sl811_priv,
246 },
247 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
248 .resource = sl811_hcd_resources,
249};
250#endif
251
252#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
253static struct resource isp1362_hcd_resources[] = {
254 {
255 .start = 0x20360000,
256 .end = 0x20360000,
257 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800258 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700259 .start = 0x20360004,
260 .end = 0x20360004,
261 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800262 }, {
Mike Frysinger21b03cf2009-09-24 05:44:36 +0000263 .start = IRQ_PF3,
264 .end = IRQ_PF3,
Michael Hennerich9e758942010-03-18 12:51:49 +0000265 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
Bryan Wu1394f032007-05-06 14:50:22 -0700266 },
267};
268
269static struct isp1362_platform_data isp1362_priv = {
270 .sel15Kres = 1,
271 .clknotstop = 0,
272 .oc_enable = 0,
273 .int_act_high = 0,
274 .int_edge_triggered = 0,
275 .remote_wakeup_connected = 0,
276 .no_power_switching = 1,
277 .power_switching_mode = 0,
278};
279
280static struct platform_device isp1362_hcd_device = {
281 .name = "isp1362-hcd",
282 .id = 0,
283 .dev = {
284 .platform_data = &isp1362_priv,
285 },
286 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
287 .resource = isp1362_hcd_resources,
288};
289#endif
290
Barry Song706a01b2009-11-02 07:29:07 +0000291#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000292static unsigned short bfin_can_peripherals[] = {
Barry Song706a01b2009-11-02 07:29:07 +0000293 P_CAN0_RX, P_CAN0_TX, 0
294};
295
296static struct resource bfin_can_resources[] = {
297 {
298 .start = 0xFFC02A00,
299 .end = 0xFFC02FFF,
300 .flags = IORESOURCE_MEM,
301 },
302 {
303 .start = IRQ_CAN_RX,
304 .end = IRQ_CAN_RX,
305 .flags = IORESOURCE_IRQ,
306 },
307 {
308 .start = IRQ_CAN_TX,
309 .end = IRQ_CAN_TX,
310 .flags = IORESOURCE_IRQ,
311 },
312 {
313 .start = IRQ_CAN_ERROR,
314 .end = IRQ_CAN_ERROR,
315 .flags = IORESOURCE_IRQ,
316 },
317};
318
319static struct platform_device bfin_can_device = {
320 .name = "bfin_can",
321 .num_resources = ARRAY_SIZE(bfin_can_resources),
322 .resource = bfin_can_resources,
323 .dev = {
324 .platform_data = &bfin_can_peripherals, /* Passed to driver */
325 },
326};
327#endif
328
Bryan Wu1394f032007-05-06 14:50:22 -0700329#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Sonic Zhang02460d02010-06-11 10:44:22 +0000330#include <linux/bfin_mac.h>
331static const unsigned short bfin_mac_peripherals[] = P_MII0;
332
333static struct bfin_phydev_platform_data bfin_phydev_data[] = {
334 {
335 .addr = 1,
336 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
337 },
338};
339
340static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
341 .phydev_number = 1,
342 .phydev_data = bfin_phydev_data,
343 .phy_mode = PHY_INTERFACE_MODE_MII,
344 .mac_peripherals = bfin_mac_peripherals,
345};
346
Graf Yang65319622009-02-04 16:49:45 +0800347static struct platform_device bfin_mii_bus = {
348 .name = "bfin_mii_bus",
Sonic Zhang02460d02010-06-11 10:44:22 +0000349 .dev = {
350 .platform_data = &bfin_mii_bus_data,
351 }
Graf Yang65319622009-02-04 16:49:45 +0800352};
353
Bryan Wu1394f032007-05-06 14:50:22 -0700354static struct platform_device bfin_mac_device = {
355 .name = "bfin_mac",
Sonic Zhang02460d02010-06-11 10:44:22 +0000356 .dev = {
357 .platform_data = &bfin_mii_bus,
358 }
Bryan Wu1394f032007-05-06 14:50:22 -0700359};
360#endif
361
362#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
363static struct resource net2272_bfin_resources[] = {
364 {
365 .start = 0x20300000,
366 .end = 0x20300000 + 0x100,
367 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800368 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700369 .start = IRQ_PF7,
370 .end = IRQ_PF7,
371 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
372 },
373};
374
375static struct platform_device net2272_bfin_device = {
376 .name = "net2272",
377 .id = -1,
378 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
379 .resource = net2272_bfin_resources,
380};
381#endif
382
Mike Frysingerfc689112008-06-25 11:41:42 +0800383#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
384#ifdef CONFIG_MTD_PARTITIONS
385const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
386
387static struct mtd_partition bfin_plat_nand_partitions[] = {
388 {
Robin Getzaa582972008-08-05 17:47:29 +0800389 .name = "linux kernel(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800390 .size = 0x400000,
391 .offset = 0,
392 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800393 .name = "file system(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800394 .size = MTDPART_SIZ_FULL,
395 .offset = MTDPART_OFS_APPEND,
396 },
397};
398#endif
399
400#define BFIN_NAND_PLAT_CLE 2
401#define BFIN_NAND_PLAT_ALE 1
402static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
403{
404 struct nand_chip *this = mtd->priv;
405
406 if (cmd == NAND_CMD_NONE)
407 return;
408
409 if (ctrl & NAND_CLE)
410 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
411 else
412 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
413}
414
415#define BFIN_NAND_PLAT_READY GPIO_PF3
416static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
417{
418 return gpio_get_value(BFIN_NAND_PLAT_READY);
419}
420
421static struct platform_nand_data bfin_plat_nand_data = {
422 .chip = {
Marek Vasutef566092010-08-12 03:53:54 +0100423 .nr_chips = 1,
Mike Frysingerfc689112008-06-25 11:41:42 +0800424 .chip_delay = 30,
425#ifdef CONFIG_MTD_PARTITIONS
426 .part_probe_types = part_probes,
427 .partitions = bfin_plat_nand_partitions,
428 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
429#endif
430 },
431 .ctrl = {
432 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
433 .dev_ready = bfin_plat_nand_dev_ready,
434 },
435};
436
437#define MAX(x, y) (x > y ? x : y)
438static struct resource bfin_plat_nand_resources = {
439 .start = 0x20212000,
440 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
Mike Frysinger67d99632010-03-16 14:28:44 +0000441 .flags = IORESOURCE_MEM,
Mike Frysingerfc689112008-06-25 11:41:42 +0800442};
443
444static struct platform_device bfin_async_nand_device = {
445 .name = "gen_nand",
446 .id = -1,
447 .num_resources = 1,
448 .resource = &bfin_plat_nand_resources,
449 .dev = {
450 .platform_data = &bfin_plat_nand_data,
451 },
452};
453
454static void bfin_plat_nand_init(void)
455{
456 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
457}
458#else
459static void bfin_plat_nand_init(void) {}
460#endif
461
Mike Frysinger793dc272008-03-26 08:09:12 +0800462#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800463static struct mtd_partition stamp_partitions[] = {
464 {
Robin Getzaa582972008-08-05 17:47:29 +0800465 .name = "bootloader(nor)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800466 .size = 0x40000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800467 .offset = 0,
468 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800469 .name = "linux kernel(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800470 .size = 0x180000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800471 .offset = MTDPART_OFS_APPEND,
472 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800473 .name = "file system(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800474 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800475 .offset = MTDPART_OFS_APPEND,
476 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800477 .name = "MAC Address(nor)",
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800478 .size = MTDPART_SIZ_FULL,
479 .offset = 0x3F0000,
480 .mask_flags = MTD_WRITEABLE,
481 }
482};
483
484static struct physmap_flash_data stamp_flash_data = {
485 .width = 2,
486 .parts = stamp_partitions,
487 .nr_parts = ARRAY_SIZE(stamp_partitions),
Barry Song38e76732010-01-15 03:24:39 +0000488#ifdef CONFIG_ROMKERNEL
489 .probe_type = "map_rom",
490#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800491};
492
493static struct resource stamp_flash_resource = {
494 .start = 0x20000000,
495 .end = 0x203fffff,
496 .flags = IORESOURCE_MEM,
497};
498
499static struct platform_device stamp_flash_device = {
500 .name = "physmap-flash",
501 .id = 0,
502 .dev = {
503 .platform_data = &stamp_flash_data,
504 },
505 .num_resources = 1,
506 .resource = &stamp_flash_resource,
507};
Mike Frysinger793dc272008-03-26 08:09:12 +0800508#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800509
Bryan Wu1394f032007-05-06 14:50:22 -0700510#if defined(CONFIG_MTD_M25P80) \
511 || defined(CONFIG_MTD_M25P80_MODULE)
512static struct mtd_partition bfin_spi_flash_partitions[] = {
513 {
Robin Getzaa582972008-08-05 17:47:29 +0800514 .name = "bootloader(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800515 .size = 0x00040000,
Bryan Wu1394f032007-05-06 14:50:22 -0700516 .offset = 0,
517 .mask_flags = MTD_CAP_ROM
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800518 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800519 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800520 .size = 0x180000,
Mike Frysingeredf05642008-02-25 11:38:11 +0800521 .offset = MTDPART_OFS_APPEND,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800522 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800523 .name = "file system(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800524 .size = MTDPART_SIZ_FULL,
525 .offset = MTDPART_OFS_APPEND,
Bryan Wu1394f032007-05-06 14:50:22 -0700526 }
527};
528
529static struct flash_platform_data bfin_spi_flash_data = {
530 .name = "m25p80",
531 .parts = bfin_spi_flash_partitions,
532 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
Michael Hennerich88a80782008-11-18 17:48:22 +0800533 /* .type = "m25p64", */
Bryan Wu1394f032007-05-06 14:50:22 -0700534};
535
536/* SPI flash chip (m25p64) */
537static struct bfin5xx_spi_chip spi_flash_chip_info = {
538 .enable_dma = 0, /* use dma transfer with this chip*/
539 .bits_per_word = 8,
540};
541#endif
542
Mike Frysingera261eec2009-05-20 14:05:36 +0000543#if defined(CONFIG_BFIN_SPI_ADC) \
544 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700545/* SPI ADC chip */
546static struct bfin5xx_spi_chip spi_adc_chip_info = {
547 .enable_dma = 1, /* use dma transfer with this chip*/
548 .bits_per_word = 16,
549};
550#endif
551
Barry Songd40bd712010-02-22 10:31:06 +0000552#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
553 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700554static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
555 .enable_dma = 0,
556 .bits_per_word = 16,
557};
558#endif
559
Barry Song3b827902010-01-27 09:01:36 +0000560#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
561 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
Barry Songd4b834c2009-06-04 10:14:17 +0000562static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
563 .enable_dma = 0,
564 .bits_per_word = 8,
Barry Songd4b834c2009-06-04 10:14:17 +0000565};
566#endif
567
Yi Lia65912c2010-04-06 05:53:16 +0000568#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \
569 || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
570static struct bfin5xx_spi_chip adav801_spi_chip_info = {
571 .enable_dma = 0,
572 .bits_per_word = 8,
573};
574#endif
575
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000576#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000577#include <linux/input/ad714x.h>
578static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
579 .enable_dma = 0,
580 .bits_per_word = 16,
581};
582
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000583static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000584 {
585 .start_stage = 0,
586 .end_stage = 7,
587 .max_coord = 128,
588 },
589};
590
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000591static struct ad714x_button_plat ad7147_spi_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000592 {
593 .keycode = BTN_FORWARD,
594 .l_mask = 0,
595 .h_mask = 0x600,
596 },
597 {
598 .keycode = BTN_LEFT,
599 .l_mask = 0,
600 .h_mask = 0x500,
601 },
602 {
603 .keycode = BTN_MIDDLE,
604 .l_mask = 0,
605 .h_mask = 0x800,
606 },
607 {
608 .keycode = BTN_RIGHT,
609 .l_mask = 0x100,
610 .h_mask = 0x400,
611 },
612 {
613 .keycode = BTN_BACK,
614 .l_mask = 0x200,
615 .h_mask = 0x400,
616 },
617};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000618static struct ad714x_platform_data ad7147_spi_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000619 .slider_num = 1,
620 .button_num = 5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000621 .slider = ad7147_spi_slider_plat,
622 .button = ad7147_spi_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000623 .stage_cfg_reg = {
624 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
625 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
626 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
627 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
628 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
629 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
630 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
631 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
632 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
633 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
634 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
635 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
636 },
637 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
638};
639#endif
640
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000641#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000642#include <linux/input/ad714x.h>
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000643static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000644 {
645 .keycode = BTN_1,
646 .l_mask = 0,
647 .h_mask = 0x1,
648 },
649 {
650 .keycode = BTN_2,
651 .l_mask = 0,
652 .h_mask = 0x2,
653 },
654 {
655 .keycode = BTN_3,
656 .l_mask = 0,
657 .h_mask = 0x4,
658 },
659 {
660 .keycode = BTN_4,
661 .l_mask = 0x0,
662 .h_mask = 0x8,
663 },
664};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000665static struct ad714x_platform_data ad7142_i2c_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000666 .button_num = 4,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000667 .button = ad7142_i2c_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000668 .stage_cfg_reg = {
669 /* fixme: figure out right setting for all comoponent according
670 * to hardware feature of EVAL-AD7142EB board */
671 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
672 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
673 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
674 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
675 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
676 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
677 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
678 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
679 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
680 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
681 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
682 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
683 },
684 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
685};
686#endif
687
Graf Yangf5f95312010-02-10 07:15:59 +0000688#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
689static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
690 .enable_dma = 0,
691 .bits_per_word = 16,
692};
693#endif
694
Graf Yangdf6a9492010-02-21 10:23:07 +0000695#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000696static unsigned short ad2s120x_platform_data[] = {
Graf Yangdf6a9492010-02-21 10:23:07 +0000697 /* used as SAMPLE and RDVEL */
698 GPIO_PF5, GPIO_PF6, 0
699};
700
701static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
702 .enable_dma = 0,
703 .bits_per_word = 16,
704};
705#endif
706
Graf Yang848c51c2010-02-26 11:49:52 +0000707#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000708static unsigned short ad2s1210_platform_data[] = {
Graf Yang848c51c2010-02-26 11:49:52 +0000709 /* use as SAMPLE, A0, A1 */
710 GPIO_PF7, GPIO_PF8, GPIO_PF9,
711# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
712 /* the RES0 and RES1 pins */
713 GPIO_PF4, GPIO_PF5,
714# endif
715 0,
716};
717
718static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
719 .enable_dma = 0,
720 .bits_per_word = 8,
721};
722#endif
723
Michael Hennerich0891bae2010-03-08 11:58:53 +0000724#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
725static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
726 .enable_dma = 0,
727 .bits_per_word = 16,
728};
729#endif
730
731#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
732static unsigned short ad7816_platform_data[] = {
733 GPIO_PF4, /* rdwr_pin */
734 GPIO_PF5, /* convert_pin */
735 GPIO_PF7, /* busy_pin */
736 0,
737};
738
739static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
740 .enable_dma = 0,
741 .bits_per_word = 8,
742};
743#endif
744
745#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
746static unsigned long adt7310_platform_data[3] = {
747/* INT bound temperature alarm event. line 1 */
748 IRQ_PG4, IRQF_TRIGGER_LOW,
749/* CT bound temperature alarm event irq_flags. line 0 */
750 IRQF_TRIGGER_LOW,
751};
752
753static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
754 .enable_dma = 0,
755 .bits_per_word = 8,
756};
757#endif
758
759#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
760static unsigned short ad7298_platform_data[] = {
761 GPIO_PF7, /* busy_pin */
762 0,
763};
764
765static struct bfin5xx_spi_chip ad7298_spi_chip_info = {
766 .enable_dma = 0,
767 .bits_per_word = 16,
768};
769#endif
770
771#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
772static unsigned long adt7316_spi_data[2] = {
773 IRQF_TRIGGER_LOW, /* interrupt flags */
774 GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
775};
776
777static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
778 .enable_dma = 0,
779 .bits_per_word = 8,
780};
781#endif
782
Yi Lif79ea4c2009-01-07 23:14:38 +0800783#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
784#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
785
786static int bfin_mmc_spi_init(struct device *dev,
787 irqreturn_t (*detect_int)(int, void *), void *data)
788{
789 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
790 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
791}
792
793static void bfin_mmc_spi_exit(struct device *dev, void *data)
794{
795 free_irq(MMC_SPI_CARD_DETECT_INT, data);
796}
797
798static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
799 .init = bfin_mmc_spi_init,
800 .exit = bfin_mmc_spi_exit,
801 .detect_delay = 100, /* msecs */
802};
803
804static struct bfin5xx_spi_chip mmc_spi_chip_info = {
805 .enable_dma = 0,
806 .bits_per_word = 8,
Yi Lie68d1eb2009-06-03 09:46:22 +0000807 .pio_interrupt = 0,
Yi Lif79ea4c2009-01-07 23:14:38 +0800808};
809#endif
810
Bryan Wu1394f032007-05-06 14:50:22 -0700811#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800812#include <linux/spi/ad7877.h>
Bryan Wu1394f032007-05-06 14:50:22 -0700813static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
Bryan Wu1394f032007-05-06 14:50:22 -0700814 .enable_dma = 0,
815 .bits_per_word = 16,
816};
817
818static const struct ad7877_platform_data bfin_ad7877_ts_info = {
819 .model = 7877,
820 .vref_delay_usecs = 50, /* internal, no capacitor */
821 .x_plate_ohms = 419,
822 .y_plate_ohms = 486,
823 .pressure_max = 1000,
824 .pressure_min = 0,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000825 .stopacq_polarity = 1,
826 .first_conversion_delay = 3,
827 .acquisition_time = 1,
828 .averaging = 1,
829 .pen_down_acc_interval = 1,
Bryan Wu1394f032007-05-06 14:50:22 -0700830};
831#endif
832
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800833#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
834#include <linux/spi/ad7879.h>
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800835static const struct ad7879_platform_data bfin_ad7879_ts_info = {
836 .model = 7879, /* Model = AD7879 */
837 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
838 .pressure_max = 10000,
839 .pressure_min = 0,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000840 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
841 .acquisition_time = 1, /* 4us acquisition time per sample */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800842 .median = 2, /* do 8 measurements */
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000843 .averaging = 1, /* take the average of 4 middle samples */
844 .pen_down_acc_interval = 255, /* 9.4 ms */
Michael Hennerich244d3422009-12-18 09:29:39 +0000845 .gpio_export = 1, /* Export GPIO to gpiolib */
846 .gpio_base = -1, /* Dynamic allocation */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800847};
848#endif
849
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000850#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000851#include <linux/input/adxl34x.h>
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000852static const struct adxl34x_platform_data adxl34x_info = {
853 .x_axis_offset = 0,
854 .y_axis_offset = 0,
855 .z_axis_offset = 0,
856 .tap_threshold = 0x31,
857 .tap_duration = 0x10,
858 .tap_latency = 0x60,
859 .tap_window = 0xF0,
860 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
861 .act_axis_control = 0xFF,
862 .activity_threshold = 5,
863 .inactivity_threshold = 3,
864 .inactivity_time = 4,
865 .free_fall_threshold = 0x7,
866 .free_fall_time = 0x20,
867 .data_rate = 0x8,
868 .data_range = ADXL_FULL_RES,
869
870 .ev_type = EV_ABS,
871 .ev_code_x = ABS_X, /* EV_REL */
872 .ev_code_y = ABS_Y, /* EV_REL */
873 .ev_code_z = ABS_Z, /* EV_REL */
874
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000875 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000876
877/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
878/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
879 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
880 .fifo_mode = ADXL_FIFO_STREAM,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000881 .orientation_enable = ADXL_EN_ORIENTATION_3D,
882 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
883 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
884 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
885 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000886};
887#endif
888
Michael Hennerichf5150152008-10-16 23:23:18 +0800889#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
890static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
891 .enable_dma = 0,
892 .bits_per_word = 16,
893};
894#endif
895
Michael Hennerich6e668932008-02-09 01:54:09 +0800896#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
897static struct bfin5xx_spi_chip spidev_chip_info = {
898 .enable_dma = 0,
899 .bits_per_word = 8,
900};
901#endif
902
Michael Hennerich2043f3f2008-10-13 14:46:30 +0800903#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
904static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
905 .enable_dma = 0,
906 .bits_per_word = 8,
907};
908#endif
909
Michael Hennerich85a192e2009-01-07 23:14:38 +0800910#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
911static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
912 .enable_dma = 1,
913 .bits_per_word = 8,
Michael Hennerich85a192e2009-01-07 23:14:38 +0800914};
915#endif
916
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000917#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
918static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
919 .bits_per_word = 16,
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000920};
921
922#include <linux/spi/adf702x.h>
923#define TXREG 0x0160A470
924static const u32 adf7021_regs[] = {
925 0x09608FA0,
926 0x00575011,
927 0x00A7F092,
928 0x2B141563,
929 0x81F29E94,
930 0x00003155,
931 0x050A4F66,
932 0x00000007,
933 0x00000008,
934 0x000231E9,
935 0x3296354A,
936 0x891A2B3B,
937 0x00000D9C,
938 0x0000000D,
939 0x0000000E,
940 0x0000000F,
941};
942
943static struct adf702x_platform_data adf7021_platform_data = {
944 .regs_base = (void *)SPORT1_TCR1,
945 .dma_ch_rx = CH_SPORT1_RX,
946 .dma_ch_tx = CH_SPORT1_TX,
947 .irq_sport_err = IRQ_SPORT1_ERROR,
948 .gpio_int_rfs = GPIO_PF8,
949 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
950 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
951 .adf702x_model = MODEL_ADF7021,
952 .adf702x_regs = adf7021_regs,
953 .tx_reg = TXREG,
954};
Mike Frysinger0531c462010-01-19 07:04:29 +0000955static inline void adf702x_mac_init(void)
956{
957 random_ether_addr(adf7021_platform_data.mac_addr);
958}
959#else
960static inline void adf702x_mac_init(void) {}
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000961#endif
962
Michael Hennerichfe5b25c2010-02-04 14:41:39 +0000963#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
964#include <linux/spi/ads7846.h>
965static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
966 .bits_per_word = 8,
967};
968
969static int ads7873_get_pendown_state(void)
970{
971 return gpio_get_value(GPIO_PF6);
972}
973
974static struct ads7846_platform_data __initdata ad7873_pdata = {
975 .model = 7873, /* AD7873 */
976 .x_max = 0xfff,
977 .y_max = 0xfff,
978 .x_plate_ohms = 620,
979 .debounce_max = 1,
980 .debounce_rep = 0,
981 .debounce_tol = (~0),
982 .get_pendown_state = ads7873_get_pendown_state,
983};
984#endif
985
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800986#if defined(CONFIG_MTD_DATAFLASH) \
987 || defined(CONFIG_MTD_DATAFLASH_MODULE)
Michael Hennerichceac2652008-08-25 17:39:11 +0800988
989static struct mtd_partition bfin_spi_dataflash_partitions[] = {
990 {
991 .name = "bootloader(spi)",
992 .size = 0x00040000,
993 .offset = 0,
994 .mask_flags = MTD_CAP_ROM
995 }, {
996 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800997 .size = 0x180000,
Michael Hennerichceac2652008-08-25 17:39:11 +0800998 .offset = MTDPART_OFS_APPEND,
999 }, {
1000 .name = "file system(spi)",
1001 .size = MTDPART_SIZ_FULL,
1002 .offset = MTDPART_OFS_APPEND,
1003 }
1004};
1005
1006static struct flash_platform_data bfin_spi_dataflash_data = {
1007 .name = "SPI Dataflash",
1008 .parts = bfin_spi_dataflash_partitions,
1009 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
1010};
1011
Michael Hennerich8e9d5c72008-04-24 08:46:19 +08001012/* DataFlash chip */
1013static struct bfin5xx_spi_chip data_flash_chip_info = {
1014 .enable_dma = 0, /* use dma transfer with this chip*/
1015 .bits_per_word = 8,
1016};
1017#endif
1018
Michael Hennerich57af8ed2009-10-16 12:35:20 +00001019#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1020static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
1021 .enable_dma = 0, /* use dma transfer with this chip*/
1022 .bits_per_word = 8,
1023};
1024#endif
1025
Michael Hennerich0891bae2010-03-08 11:58:53 +00001026#if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
1027static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
1028 .enable_dma = 0, /* use dma transfer with this chip*/
1029 .bits_per_word = 8,
1030};
1031#endif
1032
Bryan Wu1394f032007-05-06 14:50:22 -07001033static struct spi_board_info bfin_spi_board_info[] __initdata = {
1034#if defined(CONFIG_MTD_M25P80) \
1035 || defined(CONFIG_MTD_M25P80_MODULE)
1036 {
1037 /* the modalias must be the same as spi device driver name */
1038 .modalias = "m25p80", /* Name of spi_driver for this device */
1039 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001040 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -07001041 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
1042 .platform_data = &bfin_spi_flash_data,
1043 .controller_data = &spi_flash_chip_info,
1044 .mode = SPI_MODE_3,
1045 },
1046#endif
Michael Hennerich8e9d5c72008-04-24 08:46:19 +08001047#if defined(CONFIG_MTD_DATAFLASH) \
1048 || defined(CONFIG_MTD_DATAFLASH_MODULE)
1049 { /* DataFlash chip */
1050 .modalias = "mtd_dataflash",
Michael Hennerichceac2652008-08-25 17:39:11 +08001051 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
Michael Hennerich8e9d5c72008-04-24 08:46:19 +08001052 .bus_num = 0, /* Framework bus number */
1053 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
Michael Hennerichceac2652008-08-25 17:39:11 +08001054 .platform_data = &bfin_spi_dataflash_data,
Michael Hennerich8e9d5c72008-04-24 08:46:19 +08001055 .controller_data = &data_flash_chip_info,
1056 .mode = SPI_MODE_3,
1057 },
1058#endif
Mike Frysingera261eec2009-05-20 14:05:36 +00001059#if defined(CONFIG_BFIN_SPI_ADC) \
1060 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001061 {
1062 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
1063 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001064 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -07001065 .chip_select = 1, /* Framework chip select. */
1066 .platform_data = NULL, /* No spi_driver specific config */
1067 .controller_data = &spi_adc_chip_info,
1068 },
1069#endif
1070
Barry Songd40bd712010-02-22 10:31:06 +00001071#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
1072 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001073 {
Barry Songd40bd712010-02-22 10:31:06 +00001074 .modalias = "ad183x",
Bryan Wu1394f032007-05-06 14:50:22 -07001075 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001076 .bus_num = 0,
Barry Song7ba80062010-01-28 09:37:21 +00001077 .chip_select = 4,
Barry Songd40bd712010-02-22 10:31:06 +00001078 .platform_data = "ad1836", /* only includes chip name for the moment */
Bryan Wu1394f032007-05-06 14:50:22 -07001079 .controller_data = &ad1836_spi_chip_info,
Barry Song83124402009-08-06 21:03:02 +00001080 .mode = SPI_MODE_3,
Bryan Wu1394f032007-05-06 14:50:22 -07001081 },
1082#endif
Barry Songd4b834c2009-06-04 10:14:17 +00001083
Barry Song3b827902010-01-27 09:01:36 +00001084#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
Barry Songd4b834c2009-06-04 10:14:17 +00001085 {
Barry Song3b827902010-01-27 09:01:36 +00001086 .modalias = "ad193x",
Barry Songd4b834c2009-06-04 10:14:17 +00001087 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1088 .bus_num = 0,
Barry Song08a54bf2009-09-18 09:14:38 +00001089 .chip_select = 5,
Barry Songd4b834c2009-06-04 10:14:17 +00001090 .controller_data = &ad1938_spi_chip_info,
1091 .mode = SPI_MODE_3,
1092 },
1093#endif
1094
Yi Lia65912c2010-04-06 05:53:16 +00001095#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
1096 {
1097 .modalias = "adav80x",
1098 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1099 .bus_num = 0,
1100 .chip_select = 1,
1101 .controller_data = &adav801_spi_chip_info,
1102 .mode = SPI_MODE_3,
1103 },
1104#endif
1105
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001106#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +00001107 {
1108 .modalias = "ad714x_captouch",
1109 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1110 .irq = IRQ_PF4,
1111 .bus_num = 0,
1112 .chip_select = 5,
1113 .mode = SPI_MODE_3,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001114 .platform_data = &ad7147_spi_platform_data,
Barry Song427f2772009-07-17 07:04:55 +00001115 .controller_data = &ad7147_spi_chip_info,
1116 },
1117#endif
1118
Graf Yangf5f95312010-02-10 07:15:59 +00001119#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1120 {
1121 .modalias = "ad2s90",
1122 .bus_num = 0,
1123 .chip_select = 3, /* change it for your board */
Barry Song6fbfa0c2010-04-12 05:04:15 +00001124 .mode = SPI_MODE_3,
Graf Yangf5f95312010-02-10 07:15:59 +00001125 .platform_data = NULL,
1126 .controller_data = &ad2s90_spi_chip_info,
1127 },
1128#endif
1129
Graf Yangdf6a9492010-02-21 10:23:07 +00001130#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1131 {
1132 .modalias = "ad2s120x",
1133 .bus_num = 0,
1134 .chip_select = 4, /* CS, change it for your board */
1135 .platform_data = ad2s120x_platform_data,
1136 .controller_data = &ad2s120x_spi_chip_info,
1137 },
1138#endif
1139
Graf Yang848c51c2010-02-26 11:49:52 +00001140#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1141 {
1142 .modalias = "ad2s1210",
1143 .max_speed_hz = 8192000,
1144 .bus_num = 0,
1145 .chip_select = 4, /* CS, change it for your board */
1146 .platform_data = ad2s1210_platform_data,
1147 .controller_data = &ad2s1210_spi_chip_info,
1148 },
1149#endif
1150
Michael Hennerich0891bae2010-03-08 11:58:53 +00001151#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1152 {
1153 .modalias = "ad7314",
1154 .max_speed_hz = 1000000,
1155 .bus_num = 0,
1156 .chip_select = 4, /* CS, change it for your board */
1157 .controller_data = &ad7314_spi_chip_info,
1158 .mode = SPI_MODE_1,
1159 },
1160#endif
1161
1162#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1163 {
1164 .modalias = "ad7818",
1165 .max_speed_hz = 1000000,
1166 .bus_num = 0,
1167 .chip_select = 4, /* CS, change it for your board */
1168 .platform_data = ad7816_platform_data,
1169 .controller_data = &ad7816_spi_chip_info,
1170 .mode = SPI_MODE_3,
1171 },
1172#endif
1173
1174#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1175 {
1176 .modalias = "adt7310",
1177 .max_speed_hz = 1000000,
1178 .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1179 .bus_num = 0,
1180 .chip_select = 4, /* CS, change it for your board */
1181 .platform_data = adt7310_platform_data,
1182 .controller_data = &adt7310_spi_chip_info,
1183 .mode = SPI_MODE_3,
1184 },
1185#endif
1186
1187#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1188 {
1189 .modalias = "ad7298",
1190 .max_speed_hz = 1000000,
1191 .bus_num = 0,
1192 .chip_select = 4, /* CS, change it for your board */
1193 .platform_data = ad7298_platform_data,
1194 .controller_data = &ad7298_spi_chip_info,
1195 .mode = SPI_MODE_3,
1196 },
1197#endif
1198
1199#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1200 {
1201 .modalias = "adt7316",
1202 .max_speed_hz = 1000000,
1203 .irq = IRQ_PG5, /* interrupt line */
1204 .bus_num = 0,
1205 .chip_select = 4, /* CS, change it for your board */
1206 .platform_data = adt7316_spi_data,
1207 .controller_data = &adt7316_spi_chip_info,
1208 .mode = SPI_MODE_3,
1209 },
1210#endif
1211
Yi Lif79ea4c2009-01-07 23:14:38 +08001212#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1213 {
1214 .modalias = "mmc_spi",
1215 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1216 .bus_num = 0,
1217 .chip_select = 4,
1218 .platform_data = &bfin_mmc_spi_pdata,
1219 .controller_data = &mmc_spi_chip_info,
1220 .mode = SPI_MODE_3,
1221 },
1222#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001223#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1224 {
1225 .modalias = "ad7877",
1226 .platform_data = &bfin_ad7877_ts_info,
1227 .irq = IRQ_PF6,
1228 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
Michael Hennerichc7d48962007-11-15 21:33:31 +08001229 .bus_num = 0,
Bryan Wu1394f032007-05-06 14:50:22 -07001230 .chip_select = 1,
1231 .controller_data = &spi_ad7877_chip_info,
1232 },
1233#endif
Michael Hennerichf5150152008-10-16 23:23:18 +08001234#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001235 {
1236 .modalias = "ad7879",
1237 .platform_data = &bfin_ad7879_ts_info,
1238 .irq = IRQ_PF7,
1239 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1240 .bus_num = 0,
1241 .chip_select = 1,
1242 .controller_data = &spi_ad7879_chip_info,
1243 .mode = SPI_CPHA | SPI_CPOL,
1244 },
1245#endif
Michael Hennerich6e668932008-02-09 01:54:09 +08001246#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1247 {
1248 .modalias = "spidev",
1249 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1250 .bus_num = 0,
1251 .chip_select = 1,
1252 .controller_data = &spidev_chip_info,
1253 },
1254#endif
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001255#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1256 {
1257 .modalias = "bfin-lq035q1-spi",
1258 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1259 .bus_num = 0,
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001260 .chip_select = 2,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001261 .controller_data = &lq035q1_spi_chip_info,
1262 .mode = SPI_CPHA | SPI_CPOL,
1263 },
1264#endif
Michael Hennerich85a192e2009-01-07 23:14:38 +08001265#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1266 {
1267 .modalias = "enc28j60",
1268 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1269 .irq = IRQ_PF6,
1270 .bus_num = 0,
Barry Songf9f0e3b2009-11-17 09:45:59 +00001271 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerich85a192e2009-01-07 23:14:38 +08001272 .controller_data = &enc28j60_spi_chip_info,
1273 .mode = SPI_MODE_0,
1274 },
1275#endif
Michael Hennerich57af8ed2009-10-16 12:35:20 +00001276#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1277 {
1278 .modalias = "adxl34x",
1279 .platform_data = &adxl34x_info,
1280 .irq = IRQ_PF6,
1281 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1282 .bus_num = 0,
1283 .chip_select = 2,
1284 .controller_data = &spi_adxl34x_chip_info,
1285 .mode = SPI_MODE_3,
1286 },
1287#endif
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001288#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1289 {
1290 .modalias = "adf702x",
1291 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1292 .bus_num = 0,
Barry Songf9f0e3b2009-11-17 09:45:59 +00001293 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001294 .controller_data = &adf7021_spi_chip_info,
1295 .platform_data = &adf7021_platform_data,
1296 .mode = SPI_MODE_0,
1297 },
1298#endif
Michael Hennerichfe5b25c2010-02-04 14:41:39 +00001299#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1300 {
1301 .modalias = "ads7846",
1302 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1303 .bus_num = 0,
1304 .irq = IRQ_PF6,
1305 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1306 .controller_data = &ad7873_spi_chip_info,
1307 .platform_data = &ad7873_pdata,
1308 .mode = SPI_MODE_0,
1309 },
1310#endif
Michael Hennerich0891bae2010-03-08 11:58:53 +00001311#if defined(CONFIG_AD7476) \
1312 || defined(CONFIG_AD7476_MODULE)
1313 {
1314 .modalias = "ad7476", /* Name of spi_driver for this device */
1315 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1316 .bus_num = 0, /* Framework bus number */
1317 .chip_select = 1, /* Framework chip select. */
1318 .platform_data = NULL, /* No spi_driver specific config */
1319 .controller_data = &spi_ad7476_chip_info,
1320 .mode = SPI_MODE_3,
1321 },
1322#endif
1323#if defined(CONFIG_ADE7753) \
1324 || defined(CONFIG_ADE7753_MODULE)
1325 {
1326 .modalias = "ade7753",
1327 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1328 .bus_num = 0,
1329 .chip_select = 1, /* CS, change it for your board */
1330 .platform_data = NULL, /* No spi_driver specific config */
1331 .mode = SPI_MODE_1,
1332 },
1333#endif
1334#if defined(CONFIG_ADE7754) \
1335 || defined(CONFIG_ADE7754_MODULE)
1336 {
1337 .modalias = "ade7754",
1338 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1339 .bus_num = 0,
1340 .chip_select = 1, /* CS, change it for your board */
1341 .platform_data = NULL, /* No spi_driver specific config */
1342 .mode = SPI_MODE_1,
1343 },
1344#endif
1345#if defined(CONFIG_ADE7758) \
1346 || defined(CONFIG_ADE7758_MODULE)
1347 {
1348 .modalias = "ade7758",
1349 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1350 .bus_num = 0,
1351 .chip_select = 1, /* CS, change it for your board */
1352 .platform_data = NULL, /* No spi_driver specific config */
1353 .mode = SPI_MODE_1,
1354 },
1355#endif
1356#if defined(CONFIG_ADE7759) \
1357 || defined(CONFIG_ADE7759_MODULE)
1358 {
1359 .modalias = "ade7759",
1360 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1361 .bus_num = 0,
1362 .chip_select = 1, /* CS, change it for your board */
1363 .platform_data = NULL, /* No spi_driver specific config */
1364 .mode = SPI_MODE_1,
1365 },
1366#endif
1367#if defined(CONFIG_ADE7854_SPI) \
1368 || defined(CONFIG_ADE7854_SPI_MODULE)
1369 {
1370 .modalias = "ade7854",
1371 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1372 .bus_num = 0,
1373 .chip_select = 1, /* CS, change it for your board */
1374 .platform_data = NULL, /* No spi_driver specific config */
1375 .mode = SPI_MODE_3,
1376 },
1377#endif
1378#if defined(CONFIG_ADIS16060) \
1379 || defined(CONFIG_ADIS16060_MODULE)
1380 {
1381 .modalias = "adis16060_r",
1382 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1383 .bus_num = 0,
1384 .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1385 .platform_data = NULL, /* No spi_driver specific config */
1386 .mode = SPI_MODE_0,
1387 },
1388 {
1389 .modalias = "adis16060_w",
1390 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1391 .bus_num = 0,
1392 .chip_select = 2, /* CS for write, change it for your board */
1393 .platform_data = NULL, /* No spi_driver specific config */
1394 .mode = SPI_MODE_1,
1395 },
1396#endif
1397#if defined(CONFIG_ADIS16130) \
1398 || defined(CONFIG_ADIS16130_MODULE)
1399 {
1400 .modalias = "adis16130",
1401 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1402 .bus_num = 0,
1403 .chip_select = 1, /* CS for read, change it for your board */
1404 .platform_data = NULL, /* No spi_driver specific config */
1405 .mode = SPI_MODE_3,
1406 },
1407#endif
1408#if defined(CONFIG_ADIS16201) \
1409 || defined(CONFIG_ADIS16201_MODULE)
1410 {
1411 .modalias = "adis16201",
1412 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1413 .bus_num = 0,
1414 .chip_select = 5, /* CS, change it for your board */
1415 .platform_data = NULL, /* No spi_driver specific config */
1416 .mode = SPI_MODE_3,
1417 .irq = IRQ_PF4,
1418 },
1419#endif
1420#if defined(CONFIG_ADIS16203) \
1421 || defined(CONFIG_ADIS16203_MODULE)
1422 {
1423 .modalias = "adis16203",
1424 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1425 .bus_num = 0,
1426 .chip_select = 5, /* CS, change it for your board */
1427 .platform_data = NULL, /* No spi_driver specific config */
1428 .mode = SPI_MODE_3,
1429 .irq = IRQ_PF4,
1430 },
1431#endif
1432#if defined(CONFIG_ADIS16204) \
1433 || defined(CONFIG_ADIS16204_MODULE)
1434 {
1435 .modalias = "adis16204",
1436 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1437 .bus_num = 0,
1438 .chip_select = 5, /* CS, change it for your board */
1439 .platform_data = NULL, /* No spi_driver specific config */
1440 .mode = SPI_MODE_3,
1441 .irq = IRQ_PF4,
1442 },
1443#endif
1444#if defined(CONFIG_ADIS16209) \
1445 || defined(CONFIG_ADIS16209_MODULE)
1446 {
1447 .modalias = "adis16209",
1448 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1449 .bus_num = 0,
1450 .chip_select = 5, /* CS, change it for your board */
1451 .platform_data = NULL, /* No spi_driver specific config */
1452 .mode = SPI_MODE_3,
1453 .irq = IRQ_PF4,
1454 },
1455#endif
1456#if defined(CONFIG_ADIS16220) \
1457 || defined(CONFIG_ADIS16220_MODULE)
1458 {
1459 .modalias = "adis16220",
1460 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1461 .bus_num = 0,
1462 .chip_select = 5, /* CS, change it for your board */
1463 .platform_data = NULL, /* No spi_driver specific config */
1464 .mode = SPI_MODE_3,
1465 .irq = IRQ_PF4,
1466 },
1467#endif
1468#if defined(CONFIG_ADIS16240) \
1469 || defined(CONFIG_ADIS16240_MODULE)
1470 {
1471 .modalias = "adis16240",
1472 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1473 .bus_num = 0,
1474 .chip_select = 5, /* CS, change it for your board */
1475 .platform_data = NULL, /* No spi_driver specific config */
1476 .mode = SPI_MODE_3,
1477 .irq = IRQ_PF4,
1478 },
1479#endif
1480#if defined(CONFIG_ADIS16260) \
1481 || defined(CONFIG_ADIS16260_MODULE)
1482 {
1483 .modalias = "adis16260",
1484 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1485 .bus_num = 0,
1486 .chip_select = 5, /* CS, change it for your board */
1487 .platform_data = NULL, /* No spi_driver specific config */
1488 .mode = SPI_MODE_3,
1489 .irq = IRQ_PF4,
1490 },
1491#endif
1492#if defined(CONFIG_ADIS16261) \
1493 || defined(CONFIG_ADIS16261_MODULE)
1494 {
1495 .modalias = "adis16261",
1496 .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1497 .bus_num = 0,
1498 .chip_select = 1, /* CS, change it for your board */
1499 .platform_data = NULL, /* No spi_driver specific config */
1500 .mode = SPI_MODE_3,
1501 },
1502#endif
1503#if defined(CONFIG_ADIS16300) \
1504 || defined(CONFIG_ADIS16300_MODULE)
1505 {
1506 .modalias = "adis16300",
1507 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1508 .bus_num = 0,
1509 .chip_select = 5, /* CS, change it for your board */
1510 .platform_data = NULL, /* No spi_driver specific config */
1511 .mode = SPI_MODE_3,
1512 .irq = IRQ_PF4,
1513 },
1514#endif
1515#if defined(CONFIG_ADIS16350) \
1516 || defined(CONFIG_ADIS16350_MODULE)
1517 {
1518 .modalias = "adis16364",
1519 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1520 .bus_num = 0,
1521 .chip_select = 5, /* CS, change it for your board */
1522 .platform_data = NULL, /* No spi_driver specific config */
1523 .mode = SPI_MODE_3,
1524 .irq = IRQ_PF4,
1525 },
1526#endif
1527#if defined(CONFIG_ADIS16400) \
1528 || defined(CONFIG_ADIS16400_MODULE)
1529 {
1530 .modalias = "adis16400",
1531 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1532 .bus_num = 0,
1533 .chip_select = 1, /* CS, change it for your board */
1534 .platform_data = NULL, /* No spi_driver specific config */
1535 .mode = SPI_MODE_3,
1536 },
1537#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001538};
1539
Mike Frysinger5bda2722008-06-07 15:03:01 +08001540#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001541/* SPI controller data */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001542static struct bfin5xx_spi_master bfin_spi0_info = {
Barry Songf9f0e3b2009-11-17 09:45:59 +00001543 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
Bryan Wu1394f032007-05-06 14:50:22 -07001544 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001545 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wu1394f032007-05-06 14:50:22 -07001546};
1547
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001548/* SPI (0) */
1549static struct resource bfin_spi0_resource[] = {
1550 [0] = {
1551 .start = SPI0_REGBASE,
1552 .end = SPI0_REGBASE + 0xFF,
1553 .flags = IORESOURCE_MEM,
1554 },
1555 [1] = {
1556 .start = CH_SPI,
1557 .end = CH_SPI,
Yi Lie68d1eb2009-06-03 09:46:22 +00001558 .flags = IORESOURCE_DMA,
1559 },
1560 [2] = {
1561 .start = IRQ_SPI,
1562 .end = IRQ_SPI,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001563 .flags = IORESOURCE_IRQ,
1564 },
1565};
1566
1567static struct platform_device bfin_spi0_device = {
1568 .name = "bfin-spi",
1569 .id = 0, /* Bus number */
1570 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1571 .resource = bfin_spi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001572 .dev = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001573 .platform_data = &bfin_spi0_info, /* Passed to driver */
Bryan Wu1394f032007-05-06 14:50:22 -07001574 },
1575};
1576#endif /* spi master and devices */
1577
Cliff Cai1e9aa952009-03-28 23:28:51 +08001578#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1579
1580/* SPORT SPI controller data */
1581static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1582 .num_chipselect = 1, /* master only supports one device */
1583 .enable_dma = 0, /* master don't support DMA */
1584 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1585 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1586};
1587
1588static struct resource bfin_sport_spi0_resource[] = {
1589 [0] = {
1590 .start = SPORT0_TCR1,
1591 .end = SPORT0_TCR1 + 0xFF,
1592 .flags = IORESOURCE_MEM,
1593 },
1594 [1] = {
1595 .start = IRQ_SPORT0_ERROR,
1596 .end = IRQ_SPORT0_ERROR,
1597 .flags = IORESOURCE_IRQ,
1598 },
1599};
1600
1601static struct platform_device bfin_sport_spi0_device = {
1602 .name = "bfin-sport-spi",
1603 .id = 1, /* Bus number */
1604 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1605 .resource = bfin_sport_spi0_resource,
1606 .dev = {
1607 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1608 },
1609};
1610
1611static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1612 .num_chipselect = 1, /* master only supports one device */
1613 .enable_dma = 0, /* master don't support DMA */
1614 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1615 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1616};
1617
1618static struct resource bfin_sport_spi1_resource[] = {
1619 [0] = {
1620 .start = SPORT1_TCR1,
1621 .end = SPORT1_TCR1 + 0xFF,
1622 .flags = IORESOURCE_MEM,
1623 },
1624 [1] = {
1625 .start = IRQ_SPORT1_ERROR,
1626 .end = IRQ_SPORT1_ERROR,
1627 .flags = IORESOURCE_IRQ,
1628 },
1629};
1630
1631static struct platform_device bfin_sport_spi1_device = {
1632 .name = "bfin-sport-spi",
1633 .id = 2, /* Bus number */
1634 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1635 .resource = bfin_sport_spi1_resource,
1636 .dev = {
1637 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1638 },
1639};
1640
1641#endif /* sport spi master and devices */
1642
Bryan Wu1394f032007-05-06 14:50:22 -07001643#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1644static struct platform_device bfin_fb_device = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001645 .name = "bf537-lq035",
1646};
1647#endif
1648
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001649#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1650#include <asm/bfin-lq035q1.h>
1651
1652static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001653 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1654 .ppi_mode = USE_RGB565_16_BIT_PPI,
1655 .use_bl = 0, /* let something else control the LCD Blacklight */
1656 .gpio_bl = GPIO_PF7,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001657};
1658
1659static struct resource bfin_lq035q1_resources[] = {
1660 {
1661 .start = IRQ_PPI_ERROR,
1662 .end = IRQ_PPI_ERROR,
1663 .flags = IORESOURCE_IRQ,
1664 },
1665};
1666
1667static struct platform_device bfin_lq035q1_device = {
1668 .name = "bfin-lq035q1",
1669 .id = -1,
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001670 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1671 .resource = bfin_lq035q1_resources,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001672 .dev = {
1673 .platform_data = &bfin_lq035q1_data,
1674 },
1675};
1676#endif
1677
Bryan Wu1394f032007-05-06 14:50:22 -07001678#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang233b28a2007-11-21 17:04:41 +08001679#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001680static struct resource bfin_uart0_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -07001681 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001682 .start = UART0_THR,
1683 .end = UART0_GCTL+2,
Bryan Wu1394f032007-05-06 14:50:22 -07001684 .flags = IORESOURCE_MEM,
Sonic Zhang233b28a2007-11-21 17:04:41 +08001685 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001686 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001687 .start = IRQ_UART0_RX,
1688 .end = IRQ_UART0_RX+1,
1689 .flags = IORESOURCE_IRQ,
1690 },
1691 {
1692 .start = IRQ_UART0_ERROR,
1693 .end = IRQ_UART0_ERROR,
1694 .flags = IORESOURCE_IRQ,
1695 },
1696 {
1697 .start = CH_UART0_TX,
1698 .end = CH_UART0_TX,
1699 .flags = IORESOURCE_DMA,
1700 },
1701 {
1702 .start = CH_UART0_RX,
1703 .end = CH_UART0_RX,
1704 .flags = IORESOURCE_DMA,
1705 },
1706#ifdef CONFIG_BFIN_UART0_CTSRTS
1707 { /* CTS pin */
1708 .start = GPIO_PG7,
1709 .end = GPIO_PG7,
1710 .flags = IORESOURCE_IO,
1711 },
1712 { /* RTS pin */
1713 .start = GPIO_PG6,
1714 .end = GPIO_PG6,
1715 .flags = IORESOURCE_IO,
Bryan Wu1394f032007-05-06 14:50:22 -07001716 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001717#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001718};
1719
Mike Frysingera8b19882010-11-24 09:23:04 +00001720static unsigned short bfin_uart0_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001721 P_UART0_TX, P_UART0_RX, 0
1722};
1723
1724static struct platform_device bfin_uart0_device = {
1725 .name = "bfin-uart",
1726 .id = 0,
1727 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1728 .resource = bfin_uart0_resources,
1729 .dev = {
1730 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1731 },
1732};
1733#endif
1734#ifdef CONFIG_SERIAL_BFIN_UART1
1735static struct resource bfin_uart1_resources[] = {
1736 {
1737 .start = UART1_THR,
1738 .end = UART1_GCTL+2,
1739 .flags = IORESOURCE_MEM,
1740 },
1741 {
1742 .start = IRQ_UART1_RX,
1743 .end = IRQ_UART1_RX+1,
1744 .flags = IORESOURCE_IRQ,
1745 },
1746 {
1747 .start = IRQ_UART1_ERROR,
1748 .end = IRQ_UART1_ERROR,
1749 .flags = IORESOURCE_IRQ,
1750 },
1751 {
1752 .start = CH_UART1_TX,
1753 .end = CH_UART1_TX,
1754 .flags = IORESOURCE_DMA,
1755 },
1756 {
1757 .start = CH_UART1_RX,
1758 .end = CH_UART1_RX,
1759 .flags = IORESOURCE_DMA,
1760 },
1761};
1762
Mike Frysingera8b19882010-11-24 09:23:04 +00001763static unsigned short bfin_uart1_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001764 P_UART1_TX, P_UART1_RX, 0
1765};
1766
1767static struct platform_device bfin_uart1_device = {
Bryan Wu1394f032007-05-06 14:50:22 -07001768 .name = "bfin-uart",
1769 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001770 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1771 .resource = bfin_uart1_resources,
1772 .dev = {
1773 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1774 },
Bryan Wu1394f032007-05-06 14:50:22 -07001775};
1776#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001777#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001778
Graf Yang5be36d22008-04-25 03:09:15 +08001779#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +08001780#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +08001781static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001782 {
1783 .start = 0xFFC00400,
1784 .end = 0xFFC004FF,
1785 .flags = IORESOURCE_MEM,
1786 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001787 {
1788 .start = IRQ_UART0_RX,
1789 .end = IRQ_UART0_RX+1,
1790 .flags = IORESOURCE_IRQ,
1791 },
1792 {
1793 .start = CH_UART0_RX,
1794 .end = CH_UART0_RX+1,
1795 .flags = IORESOURCE_DMA,
1796 },
1797};
1798
1799static struct platform_device bfin_sir0_device = {
1800 .name = "bfin_sir",
1801 .id = 0,
1802 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1803 .resource = bfin_sir0_resources,
1804};
Graf Yang5be36d22008-04-25 03:09:15 +08001805#endif
1806#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +08001807static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001808 {
1809 .start = 0xFFC02000,
1810 .end = 0xFFC020FF,
1811 .flags = IORESOURCE_MEM,
1812 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001813 {
1814 .start = IRQ_UART1_RX,
1815 .end = IRQ_UART1_RX+1,
1816 .flags = IORESOURCE_IRQ,
1817 },
1818 {
1819 .start = CH_UART1_RX,
1820 .end = CH_UART1_RX+1,
1821 .flags = IORESOURCE_DMA,
1822 },
Graf Yang5be36d22008-04-25 03:09:15 +08001823};
1824
Graf Yang42bd8bc2009-01-07 23:14:39 +08001825static struct platform_device bfin_sir1_device = {
Graf Yang5be36d22008-04-25 03:09:15 +08001826 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +08001827 .id = 1,
1828 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1829 .resource = bfin_sir1_resources,
Graf Yang5be36d22008-04-25 03:09:15 +08001830};
1831#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +08001832#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001833
Bryan Wu1394f032007-05-06 14:50:22 -07001834#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001835static struct resource bfin_twi0_resource[] = {
1836 [0] = {
1837 .start = TWI0_REGBASE,
1838 .end = TWI0_REGBASE,
1839 .flags = IORESOURCE_MEM,
1840 },
1841 [1] = {
1842 .start = IRQ_TWI,
1843 .end = IRQ_TWI,
1844 .flags = IORESOURCE_IRQ,
1845 },
1846};
1847
Bryan Wu1394f032007-05-06 14:50:22 -07001848static struct platform_device i2c_bfin_twi_device = {
1849 .name = "i2c-bfin-twi",
1850 .id = 0,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001851 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1852 .resource = bfin_twi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001853};
1854#endif
1855
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001856#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001857static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1858 [0] = KEY_GRAVE,
1859 [1] = KEY_1,
1860 [2] = KEY_2,
1861 [3] = KEY_3,
1862 [4] = KEY_4,
1863 [5] = KEY_5,
1864 [6] = KEY_6,
1865 [7] = KEY_7,
1866 [8] = KEY_8,
1867 [9] = KEY_9,
1868 [10] = KEY_0,
1869 [11] = KEY_MINUS,
1870 [12] = KEY_EQUAL,
1871 [13] = KEY_BACKSLASH,
1872 [15] = KEY_KP0,
1873 [16] = KEY_Q,
1874 [17] = KEY_W,
1875 [18] = KEY_E,
1876 [19] = KEY_R,
1877 [20] = KEY_T,
1878 [21] = KEY_Y,
1879 [22] = KEY_U,
1880 [23] = KEY_I,
1881 [24] = KEY_O,
1882 [25] = KEY_P,
1883 [26] = KEY_LEFTBRACE,
1884 [27] = KEY_RIGHTBRACE,
1885 [29] = KEY_KP1,
1886 [30] = KEY_KP2,
1887 [31] = KEY_KP3,
1888 [32] = KEY_A,
1889 [33] = KEY_S,
1890 [34] = KEY_D,
1891 [35] = KEY_F,
1892 [36] = KEY_G,
1893 [37] = KEY_H,
1894 [38] = KEY_J,
1895 [39] = KEY_K,
1896 [40] = KEY_L,
1897 [41] = KEY_SEMICOLON,
1898 [42] = KEY_APOSTROPHE,
1899 [43] = KEY_BACKSLASH,
1900 [45] = KEY_KP4,
1901 [46] = KEY_KP5,
1902 [47] = KEY_KP6,
1903 [48] = KEY_102ND,
1904 [49] = KEY_Z,
1905 [50] = KEY_X,
1906 [51] = KEY_C,
1907 [52] = KEY_V,
1908 [53] = KEY_B,
1909 [54] = KEY_N,
1910 [55] = KEY_M,
1911 [56] = KEY_COMMA,
1912 [57] = KEY_DOT,
1913 [58] = KEY_SLASH,
1914 [60] = KEY_KPDOT,
1915 [61] = KEY_KP7,
1916 [62] = KEY_KP8,
1917 [63] = KEY_KP9,
1918 [64] = KEY_SPACE,
1919 [65] = KEY_BACKSPACE,
1920 [66] = KEY_TAB,
1921 [67] = KEY_KPENTER,
1922 [68] = KEY_ENTER,
1923 [69] = KEY_ESC,
1924 [70] = KEY_DELETE,
1925 [74] = KEY_KPMINUS,
1926 [76] = KEY_UP,
1927 [77] = KEY_DOWN,
1928 [78] = KEY_RIGHT,
1929 [79] = KEY_LEFT,
1930};
1931
1932static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1933 .rows = 8,
1934 .cols = 10,
1935 .keymap = adp5588_keymap,
1936 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1937 .repeat = 0,
1938};
1939#endif
1940
Michael Hennerich3ea57212009-03-28 22:15:07 +08001941#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1942#include <linux/mfd/adp5520.h>
1943
1944 /*
1945 * ADP5520/5501 Backlight Data
1946 */
1947
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001948static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1949 .fade_in = ADP5520_FADE_T_1200ms,
1950 .fade_out = ADP5520_FADE_T_1200ms,
1951 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1952 .en_ambl_sens = 1,
1953 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1954 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1955 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1956 .l2_office_max = ADP5520_BL_CUR_mA(7),
1957 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1958 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1959 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1960 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1961 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1962 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1963 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
Michael Hennerich3ea57212009-03-28 22:15:07 +08001964};
1965
1966 /*
1967 * ADP5520/5501 LEDs Data
1968 */
1969
Michael Hennerich3ea57212009-03-28 22:15:07 +08001970static struct led_info adp5520_leds[] = {
1971 {
1972 .name = "adp5520-led1",
1973 .default_trigger = "none",
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001974 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001975 },
1976#ifdef ADP5520_EN_ALL_LEDS
1977 {
1978 .name = "adp5520-led2",
1979 .default_trigger = "none",
1980 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1981 },
1982 {
1983 .name = "adp5520-led3",
1984 .default_trigger = "none",
1985 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1986 },
1987#endif
1988};
1989
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001990static struct adp5520_leds_platform_data adp5520_leds_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001991 .num_leds = ARRAY_SIZE(adp5520_leds),
1992 .leds = adp5520_leds,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001993 .fade_in = ADP5520_FADE_T_600ms,
1994 .fade_out = ADP5520_FADE_T_600ms,
1995 .led_on_time = ADP5520_LED_ONT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001996};
1997
1998 /*
1999 * ADP5520 GPIO Data
2000 */
2001
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002002static struct adp5520_gpio_platform_data adp5520_gpio_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08002003 .gpio_start = 50,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002004 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
2005 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002006};
2007
2008 /*
2009 * ADP5520 Keypad Data
2010 */
2011
Michael Hennerich3ea57212009-03-28 22:15:07 +08002012static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002013 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
2014 [ADP5520_KEY(0, 1)] = KEY_1,
2015 [ADP5520_KEY(0, 2)] = KEY_2,
2016 [ADP5520_KEY(0, 3)] = KEY_3,
2017 [ADP5520_KEY(1, 0)] = KEY_4,
2018 [ADP5520_KEY(1, 1)] = KEY_5,
2019 [ADP5520_KEY(1, 2)] = KEY_6,
2020 [ADP5520_KEY(1, 3)] = KEY_7,
2021 [ADP5520_KEY(2, 0)] = KEY_8,
2022 [ADP5520_KEY(2, 1)] = KEY_9,
2023 [ADP5520_KEY(2, 2)] = KEY_0,
2024 [ADP5520_KEY(2, 3)] = KEY_MINUS,
2025 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
2026 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
2027 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
2028 [ADP5520_KEY(3, 3)] = KEY_ENTER,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002029};
2030
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002031static struct adp5520_keys_platform_data adp5520_keys_data = {
2032 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
2033 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002034 .keymap = adp5520_keymap,
2035 .keymapsize = ARRAY_SIZE(adp5520_keymap),
2036 .repeat = 0,
2037};
2038
2039 /*
Stefan Weileef35c22010-08-06 21:11:15 +02002040 * ADP5520/5501 Multifunction Device Init Data
Michael Hennerich3ea57212009-03-28 22:15:07 +08002041 */
2042
Michael Hennerich3ea57212009-03-28 22:15:07 +08002043static struct adp5520_platform_data adp5520_pdev_data = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002044 .backlight = &adp5520_backlight_data,
2045 .leds = &adp5520_leds_data,
2046 .gpio = &adp5520_gpio_data,
2047 .keys = &adp5520_keys_data,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002048};
2049
2050#endif
2051
Michael Hennerichba877d42009-08-27 04:09:32 +00002052#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002053static struct adp5588_gpio_platform_data adp5588_gpio_data = {
Michael Hennerichba877d42009-08-27 04:09:32 +00002054 .gpio_start = 50,
2055 .pullup_dis_mask = 0,
2056};
2057#endif
2058
Michael Hennerich78756c62009-10-13 15:28:33 +00002059#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2060#include <linux/i2c/adp8870.h>
2061static struct led_info adp8870_leds[] = {
2062 {
2063 .name = "adp8870-led7",
2064 .default_trigger = "none",
2065 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
2066 },
2067};
2068
2069
2070static struct adp8870_backlight_platform_data adp8870_pdata = {
2071 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
2072 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
2073 .pwm_assign = 0, /* 1 = Enables PWM mode */
2074
2075 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
2076 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2077 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2078
2079 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2080 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2081
2082 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2083 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2084 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2085 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2086 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2087 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2088 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2089 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2090 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2091 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2092
2093 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2094 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2095 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2096 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2097 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2098 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2099 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2100 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2101
2102 .leds = adp8870_leds,
2103 .num_leds = ARRAY_SIZE(adp8870_leds),
2104 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2105 .led_fade_in = ADP8870_FADE_T_600ms,
2106 .led_fade_out = ADP8870_FADE_T_600ms,
2107 .led_on_time = ADP8870_LED_ONT_200ms,
2108};
2109#endif
2110
Michael Hennerich72fa2e92010-02-24 21:05:35 +00002111#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2112#include <linux/i2c/adp8860.h>
2113static struct led_info adp8860_leds[] = {
2114 {
2115 .name = "adp8860-led7",
2116 .default_trigger = "none",
2117 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2118 },
2119};
2120
2121static struct adp8860_backlight_platform_data adp8860_pdata = {
2122 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2123 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2124
2125 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2126 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2127 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2128
2129 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2130 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2131
2132 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2133 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2134 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2135 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2136 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2137 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2138
2139 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2140 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2141 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2142 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2143
2144 .leds = adp8860_leds,
2145 .num_leds = ARRAY_SIZE(adp8860_leds),
2146 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2147 .led_fade_in = ADP8860_FADE_T_600ms,
2148 .led_fade_out = ADP8860_FADE_T_600ms,
2149 .led_on_time = ADP8860_LED_ONT_200ms,
2150};
2151#endif
2152
Sonic Zhangf32792d2010-02-09 02:47:09 +00002153#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2154static struct regulator_consumer_supply ad5398_consumer = {
2155 .supply = "current",
2156};
2157
2158static struct regulator_init_data ad5398_regulator_data = {
2159 .constraints = {
2160 .name = "current range",
2161 .max_uA = 120000,
2162 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2163 },
2164 .num_consumer_supplies = 1,
2165 .consumer_supplies = &ad5398_consumer,
2166};
2167
Sonic Zhangf32792d2010-02-09 02:47:09 +00002168#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2169 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2170static struct platform_device ad5398_virt_consumer_device = {
2171 .name = "reg-virt-consumer",
2172 .id = 0,
2173 .dev = {
2174 .platform_data = "current", /* Passed to driver */
2175 },
2176};
2177#endif
2178#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2179 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2180static struct regulator_bulk_data ad5398_bulk_data = {
2181 .supply = "current",
2182};
2183
2184static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2185 .name = "ad5398",
2186 .num_supplies = 1,
2187 .supplies = &ad5398_bulk_data,
2188};
2189
2190static struct platform_device ad5398_userspace_consumer_device = {
2191 .name = "reg-userspace-consumer",
2192 .id = 0,
2193 .dev = {
2194 .platform_data = &ad5398_userspace_comsumer_data,
2195 },
2196};
2197#endif
2198#endif
2199
Michael Hennerich0891bae2010-03-08 11:58:53 +00002200#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2201/* INT bound temperature alarm event. line 1 */
2202static unsigned long adt7410_platform_data[2] = {
2203 IRQ_PG4, IRQF_TRIGGER_LOW,
2204};
2205#endif
2206
2207#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2208/* INT bound temperature alarm event. line 1 */
2209static unsigned long adt7316_i2c_data[2] = {
2210 IRQF_TRIGGER_LOW, /* interrupt flags */
2211 GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2212};
2213#endif
2214
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002215static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
Barry Song92b20f72010-03-17 08:12:30 +00002216#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
2217 {
2218 I2C_BOARD_INFO("ad1937", 0x04),
2219 },
2220#endif
2221
Yi Lia65912c2010-04-06 05:53:16 +00002222#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
2223 {
2224 I2C_BOARD_INFO("adav803", 0x10),
2225 },
2226#endif
2227
Mike Frysinger5b7c5772009-10-12 15:56:58 +00002228#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002229 {
Barry Song427f2772009-07-17 07:04:55 +00002230 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
Barry Song4c94c3e2009-07-07 07:41:50 +00002231 .irq = IRQ_PG5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00002232 .platform_data = (void *)&ad7142_i2c_platform_data,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002233 },
2234#endif
Barry Songad6720c2010-02-03 09:15:31 +00002235
2236#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2237 {
2238 I2C_BOARD_INFO("ad7150", 0x48),
2239 .irq = IRQ_PG5, /* fixme: use real interrupt number */
2240 },
2241#endif
2242
2243#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2244 {
2245 I2C_BOARD_INFO("ad7152", 0x48),
2246 },
2247#endif
2248
2249#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2250 {
2251 I2C_BOARD_INFO("ad774x", 0x48),
2252 },
2253#endif
2254
Sonic Zhang5f022592010-02-24 07:32:50 +00002255#if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
2256 {
2257 I2C_BOARD_INFO("ad7414", 0x9),
2258 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002259 .irq_flags = IRQF_TRIGGER_LOW,
Sonic Zhang5f022592010-02-24 07:32:50 +00002260 },
2261#endif
2262
Sonic Zhangef8873e2010-02-25 10:27:48 +00002263#if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
2264 {
2265 I2C_BOARD_INFO("ad7417", 0xb),
2266 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002267 .irq_flags = IRQF_TRIGGER_LOW,
2268 .platform_data = (void *)GPIO_PF4,
2269 },
2270#endif
2271
2272#if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2273 {
2274 I2C_BOARD_INFO("ade7854", 0x38),
2275 },
2276#endif
2277
2278#if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2279 {
2280 I2C_BOARD_INFO("adt75", 0x9),
2281 .irq = IRQ_PG5,
2282 .irq_flags = IRQF_TRIGGER_LOW,
2283 },
2284#endif
2285
2286#if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)
2287 {
2288 I2C_BOARD_INFO("adt7408", 0x18),
2289 .irq = IRQ_PG5,
2290 .irq_flags = IRQF_TRIGGER_LOW,
2291 },
2292#endif
2293
2294#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2295 {
2296 I2C_BOARD_INFO("adt7410", 0x48),
2297 /* CT critical temperature event. line 0 */
2298 .irq = IRQ_PG5,
2299 .irq_flags = IRQF_TRIGGER_LOW,
2300 .platform_data = (void *)&adt7410_platform_data,
2301 },
2302#endif
2303
2304#if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2305 {
2306 I2C_BOARD_INFO("ad7291", 0x20),
2307 .irq = IRQ_PG5,
2308 .irq_flags = IRQF_TRIGGER_LOW,
2309 },
2310#endif
2311
2312#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2313 {
2314 I2C_BOARD_INFO("adt7316", 0x48),
2315 .irq = IRQ_PG6,
2316 .platform_data = (void *)&adt7316_i2c_data,
Sonic Zhangef8873e2010-02-25 10:27:48 +00002317 },
2318#endif
2319
Michael Hennerichebd58332009-07-02 11:00:38 +00002320#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002321 {
2322 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002323 },
2324#endif
Michael Hennerich204844e2009-06-30 14:57:22 +00002325#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002326 {
2327 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
Michael Hennerichf5150152008-10-16 23:23:18 +08002328 .irq = IRQ_PG6,
2329 },
2330#endif
2331#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2332 {
2333 I2C_BOARD_INFO("ad7879", 0x2F),
2334 .irq = IRQ_PG5,
2335 .platform_data = (void *)&bfin_ad7879_ts_info,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002336 },
2337#endif
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08002338#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2339 {
2340 I2C_BOARD_INFO("adp5588-keys", 0x34),
2341 .irq = IRQ_PG0,
2342 .platform_data = (void *)&adp5588_kpad_data,
2343 },
2344#endif
Michael Hennerich3ea57212009-03-28 22:15:07 +08002345#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2346 {
2347 I2C_BOARD_INFO("pmic-adp5520", 0x32),
Mike Frysinger4f84b6e2009-06-10 20:45:48 -04002348 .irq = IRQ_PG0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002349 .platform_data = (void *)&adp5520_pdev_data,
2350 },
2351#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00002352#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2353 {
2354 I2C_BOARD_INFO("adxl34x", 0x53),
2355 .irq = IRQ_PG3,
2356 .platform_data = (void *)&adxl34x_info,
2357 },
2358#endif
Michael Hennerichba877d42009-08-27 04:09:32 +00002359#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2360 {
2361 I2C_BOARD_INFO("adp5588-gpio", 0x34),
2362 .platform_data = (void *)&adp5588_gpio_data,
2363 },
2364#endif
Michael Hennerich50c4c082009-09-22 13:10:09 +00002365#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2366 {
2367 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2368 },
2369#endif
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00002370#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2371 {
Sonic Zhang948ca1a2010-08-18 09:17:25 +00002372 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00002373 },
2374#endif
Michael Hennerich78756c62009-10-13 15:28:33 +00002375#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2376 {
2377 I2C_BOARD_INFO("adp8870", 0x2B),
2378 .platform_data = (void *)&adp8870_pdata,
2379 },
2380#endif
Cliff Caid53127f2009-10-15 02:33:04 +00002381#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2382 {
2383 I2C_BOARD_INFO("adau1371", 0x1A),
2384 },
2385#endif
Cliff Cai04267632009-10-28 06:50:36 +00002386#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2387 {
2388 I2C_BOARD_INFO("adau1761", 0x38),
2389 },
2390#endif
Cliff Caic48d7672010-02-11 09:27:18 +00002391#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2392 {
2393 I2C_BOARD_INFO("adau1361", 0x38),
2394 },
2395#endif
Michael Hennerich1f13f2f2009-11-17 10:18:27 +00002396#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2397 {
2398 I2C_BOARD_INFO("ad5258", 0x18),
2399 },
2400#endif
Cliff Cai29bb3bc2010-01-14 08:28:38 +00002401#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2402 {
2403 I2C_BOARD_INFO("ssm2602", 0x1b),
2404 },
2405#endif
Sonic Zhangf32792d2010-02-09 02:47:09 +00002406#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2407 {
2408 I2C_BOARD_INFO("ad5398", 0xC),
Sonic Zhang27e9f0b2010-06-02 08:24:18 +00002409 .platform_data = (void *)&ad5398_regulator_data,
Sonic Zhangf32792d2010-02-09 02:47:09 +00002410 },
2411#endif
Michael Hennerich72fa2e92010-02-24 21:05:35 +00002412#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2413 {
2414 I2C_BOARD_INFO("adp8860", 0x2A),
2415 .platform_data = (void *)&adp8860_pdata,
2416 },
2417#endif
Cliff Cai3cbcb1612010-04-22 05:55:56 +00002418#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2419 {
2420 I2C_BOARD_INFO("adau1373", 0x1A),
2421 },
2422#endif
steven miao39d3c1c2010-08-26 08:25:13 +00002423#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2424 {
2425 I2C_BOARD_INFO("ad5252", 0x2e),
2426 },
2427#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002428};
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002429
Bryan Wu1394f032007-05-06 14:50:22 -07002430#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00002431#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2432static struct resource bfin_sport0_uart_resources[] = {
2433 {
2434 .start = SPORT0_TCR1,
2435 .end = SPORT0_MRCS3+4,
2436 .flags = IORESOURCE_MEM,
2437 },
2438 {
2439 .start = IRQ_SPORT0_RX,
2440 .end = IRQ_SPORT0_RX+1,
2441 .flags = IORESOURCE_IRQ,
2442 },
2443 {
2444 .start = IRQ_SPORT0_ERROR,
2445 .end = IRQ_SPORT0_ERROR,
2446 .flags = IORESOURCE_IRQ,
2447 },
2448};
2449
Mike Frysingera8b19882010-11-24 09:23:04 +00002450static unsigned short bfin_sport0_peripherals[] = {
Sonic Zhangdf5de262009-09-23 05:01:56 +00002451 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
Sonic Zhange54b6732010-11-12 02:45:38 +00002452 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Sonic Zhangdf5de262009-09-23 05:01:56 +00002453};
2454
Bryan Wu1394f032007-05-06 14:50:22 -07002455static struct platform_device bfin_sport0_uart_device = {
2456 .name = "bfin-sport-uart",
2457 .id = 0,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002458 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2459 .resource = bfin_sport0_uart_resources,
2460 .dev = {
2461 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2462 },
2463};
2464#endif
2465#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2466static struct resource bfin_sport1_uart_resources[] = {
2467 {
2468 .start = SPORT1_TCR1,
2469 .end = SPORT1_MRCS3+4,
2470 .flags = IORESOURCE_MEM,
2471 },
2472 {
2473 .start = IRQ_SPORT1_RX,
2474 .end = IRQ_SPORT1_RX+1,
2475 .flags = IORESOURCE_IRQ,
2476 },
2477 {
2478 .start = IRQ_SPORT1_ERROR,
2479 .end = IRQ_SPORT1_ERROR,
2480 .flags = IORESOURCE_IRQ,
2481 },
2482};
2483
Mike Frysingera8b19882010-11-24 09:23:04 +00002484static unsigned short bfin_sport1_peripherals[] = {
Sonic Zhangdf5de262009-09-23 05:01:56 +00002485 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
Sonic Zhange54b6732010-11-12 02:45:38 +00002486 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
Bryan Wu1394f032007-05-06 14:50:22 -07002487};
2488
2489static struct platform_device bfin_sport1_uart_device = {
2490 .name = "bfin-sport-uart",
2491 .id = 1,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002492 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2493 .resource = bfin_sport1_uart_resources,
2494 .dev = {
2495 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2496 },
Bryan Wu1394f032007-05-06 14:50:22 -07002497};
2498#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00002499#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002500
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002501#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002502#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2503/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002504
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002505#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2506#define PATA_INT IRQ_PF5
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002507static struct pata_platform_info bfin_pata_platform_data = {
2508 .ioport_shift = 1,
Mike Frysinger64e5c512007-10-30 11:56:13 +08002509 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002510};
2511
2512static struct resource bfin_pata_resources[] = {
2513 {
2514 .start = 0x20314020,
2515 .end = 0x2031403F,
2516 .flags = IORESOURCE_MEM,
2517 },
2518 {
2519 .start = 0x2031401C,
2520 .end = 0x2031401F,
2521 .flags = IORESOURCE_MEM,
2522 },
2523 {
2524 .start = PATA_INT,
2525 .end = PATA_INT,
2526 .flags = IORESOURCE_IRQ,
2527 },
2528};
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002529#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2530static struct pata_platform_info bfin_pata_platform_data = {
2531 .ioport_shift = 0,
2532};
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002533/* CompactFlash Storage Card Memory Mapped Addressing
Michael Hennerich648882d2009-04-21 12:05:50 +00002534 * /REG = A11 = 1
2535 */
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002536static struct resource bfin_pata_resources[] = {
2537 {
Michael Hennerich648882d2009-04-21 12:05:50 +00002538 .start = 0x20211800,
2539 .end = 0x20211807,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002540 .flags = IORESOURCE_MEM,
2541 },
2542 {
Michael Hennerich648882d2009-04-21 12:05:50 +00002543 .start = 0x2021180E, /* Device Ctl */
2544 .end = 0x2021180E,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002545 .flags = IORESOURCE_MEM,
2546 },
2547};
2548#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002549
2550static struct platform_device bfin_pata_device = {
2551 .name = "pata_platform",
2552 .id = -1,
2553 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2554 .resource = bfin_pata_resources,
2555 .dev = {
2556 .platform_data = &bfin_pata_platform_data,
2557 }
2558};
2559#endif
2560
Michael Hennerich14b03202008-05-07 11:41:26 +08002561static const unsigned int cclk_vlev_datasheet[] =
2562{
2563 VRPAIR(VLEV_085, 250000000),
2564 VRPAIR(VLEV_090, 376000000),
2565 VRPAIR(VLEV_095, 426000000),
2566 VRPAIR(VLEV_100, 426000000),
2567 VRPAIR(VLEV_105, 476000000),
2568 VRPAIR(VLEV_110, 476000000),
2569 VRPAIR(VLEV_115, 476000000),
2570 VRPAIR(VLEV_120, 500000000),
2571 VRPAIR(VLEV_125, 533000000),
2572 VRPAIR(VLEV_130, 600000000),
2573};
2574
2575static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2576 .tuple_tab = cclk_vlev_datasheet,
2577 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2578 .vr_settling_time = 25 /* us */,
2579};
2580
2581static struct platform_device bfin_dpmc = {
2582 .name = "bfin dpmc",
2583 .dev = {
2584 .platform_data = &bfin_dmpc_vreg_data,
2585 },
2586};
2587
Barry Song336746e2009-10-13 09:19:18 +00002588#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2589static struct platform_device bfin_i2s = {
2590 .name = "bfin-i2s",
2591 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2592 /* TODO: add platform data here */
2593};
2594#endif
2595
Barry Song83124402009-08-06 21:03:02 +00002596#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2597static struct platform_device bfin_tdm = {
2598 .name = "bfin-tdm",
Barry Song336746e2009-10-13 09:19:18 +00002599 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2600 /* TODO: add platform data here */
2601};
2602#endif
2603
2604#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2605static struct platform_device bfin_ac97 = {
2606 .name = "bfin-ac97",
2607 .id = CONFIG_SND_BF5XX_SPORT_NUM,
Barry Song83124402009-08-06 21:03:02 +00002608 /* TODO: add platform data here */
2609};
2610#endif
2611
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002612#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2613#define REGULATOR_ADP122 "adp122"
2614#define REGULATOR_ADP122_UV 2500000
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002615
2616static struct regulator_consumer_supply adp122_consumers = {
2617 .supply = REGULATOR_ADP122,
2618};
2619
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002620static struct regulator_init_data adp_switch_regulator_data = {
2621 .constraints = {
2622 .name = REGULATOR_ADP122,
2623 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2624 .min_uV = REGULATOR_ADP122_UV,
2625 .max_uV = REGULATOR_ADP122_UV,
2626 .min_uA = 0,
2627 .max_uA = 300000,
2628 },
2629 .num_consumer_supplies = 1, /* only 1 */
2630 .consumer_supplies = &adp122_consumers,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002631};
2632
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002633static struct fixed_voltage_config adp_switch_pdata = {
2634 .supply_name = REGULATOR_ADP122,
2635 .microvolts = REGULATOR_ADP122_UV,
2636 .gpio = GPIO_PF2,
2637 .enable_high = 1,
2638 .enabled_at_boot = 0,
2639 .init_data = &adp_switch_regulator_data,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002640};
2641
2642static struct platform_device adp_switch_device = {
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002643 .name = "reg-fixed-voltage",
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002644 .id = 0,
2645 .dev = {
2646 .platform_data = &adp_switch_pdata,
2647 },
2648};
2649
2650#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2651 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2652static struct regulator_bulk_data adp122_bulk_data = {
2653 .supply = REGULATOR_ADP122,
2654};
2655
2656static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2657 .name = REGULATOR_ADP122,
2658 .num_supplies = 1,
2659 .supplies = &adp122_bulk_data,
2660};
2661
2662static struct platform_device adp122_userspace_consumer_device = {
2663 .name = "reg-userspace-consumer",
2664 .id = 0,
2665 .dev = {
2666 .platform_data = &adp122_userspace_comsumer_data,
2667 },
2668};
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002669#endif
2670#endif
2671
Michael Hennerich0891bae2010-03-08 11:58:53 +00002672#if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2673 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2674
2675static struct resource iio_gpio_trigger_resources[] = {
2676 [0] = {
2677 .start = IRQ_PF5,
2678 .end = IRQ_PF5,
2679 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2680 },
2681};
2682
2683static struct platform_device iio_gpio_trigger = {
2684 .name = "iio_gpio_trigger",
2685 .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2686 .resource = iio_gpio_trigger_resources,
2687};
2688#endif
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002689
Bryan Wu1394f032007-05-06 14:50:22 -07002690static struct platform_device *stamp_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08002691
2692 &bfin_dpmc,
2693
Bryan Wu1394f032007-05-06 14:50:22 -07002694#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2695 &bfin_pcmcia_cf_device,
2696#endif
2697
2698#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2699 &rtc_device,
2700#endif
2701
2702#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2703 &sl811_hcd_device,
2704#endif
2705
2706#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2707 &isp1362_hcd_device,
2708#endif
2709
Michael Hennerich3f375692008-11-18 17:48:22 +08002710#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2711 &bfin_isp1760_device,
2712#endif
2713
Bryan Wu1394f032007-05-06 14:50:22 -07002714#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2715 &smc91x_device,
2716#endif
2717
Alex Landauf40d24d2007-07-12 12:11:48 +08002718#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2719 &dm9000_device,
2720#endif
2721
Barry Song706a01b2009-11-02 07:29:07 +00002722#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2723 &bfin_can_device,
2724#endif
2725
Bryan Wu1394f032007-05-06 14:50:22 -07002726#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +08002727 &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -07002728 &bfin_mac_device,
2729#endif
2730
2731#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2732 &net2272_bfin_device,
2733#endif
2734
2735#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002736 &bfin_spi0_device,
Bryan Wu1394f032007-05-06 14:50:22 -07002737#endif
2738
Cliff Cai1e9aa952009-03-28 23:28:51 +08002739#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2740 &bfin_sport_spi0_device,
2741 &bfin_sport_spi1_device,
2742#endif
2743
Bryan Wu1394f032007-05-06 14:50:22 -07002744#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2745 &bfin_fb_device,
2746#endif
2747
Michael Hennerich2043f3f2008-10-13 14:46:30 +08002748#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2749 &bfin_lq035q1_device,
2750#endif
2751
Bryan Wu1394f032007-05-06 14:50:22 -07002752#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00002753#ifdef CONFIG_SERIAL_BFIN_UART0
2754 &bfin_uart0_device,
2755#endif
2756#ifdef CONFIG_SERIAL_BFIN_UART1
2757 &bfin_uart1_device,
2758#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002759#endif
2760
Graf Yang5be36d22008-04-25 03:09:15 +08002761#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08002762#ifdef CONFIG_BFIN_SIR0
2763 &bfin_sir0_device,
2764#endif
2765#ifdef CONFIG_BFIN_SIR1
2766 &bfin_sir1_device,
2767#endif
Graf Yang5be36d22008-04-25 03:09:15 +08002768#endif
2769
Bryan Wu1394f032007-05-06 14:50:22 -07002770#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2771 &i2c_bfin_twi_device,
2772#endif
2773
2774#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00002775#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
Bryan Wu1394f032007-05-06 14:50:22 -07002776 &bfin_sport0_uart_device,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002777#endif
2778#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
Bryan Wu1394f032007-05-06 14:50:22 -07002779 &bfin_sport1_uart_device,
2780#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00002781#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002782
2783#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2784 &bfin_pata_device,
2785#endif
Michael Hennerich2463ef22008-01-27 16:49:48 +08002786
2787#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2788 &bfin_device_gpiokeys,
2789#endif
Mike Frysingercad2ab62008-02-22 17:01:31 +08002790
Mike Frysingerfc689112008-06-25 11:41:42 +08002791#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2792 &bfin_async_nand_device,
2793#endif
2794
Mike Frysinger793dc272008-03-26 08:09:12 +08002795#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +08002796 &stamp_flash_device,
Mike Frysinger793dc272008-03-26 08:09:12 +08002797#endif
Barry Song83124402009-08-06 21:03:02 +00002798
Barry Song336746e2009-10-13 09:19:18 +00002799#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2800 &bfin_i2s,
2801#endif
2802
Barry Song83124402009-08-06 21:03:02 +00002803#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2804 &bfin_tdm,
2805#endif
Barry Song336746e2009-10-13 09:19:18 +00002806
2807#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2808 &bfin_ac97,
2809#endif
Sonic Zhangf32792d2010-02-09 02:47:09 +00002810#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2811#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2812 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2813 &ad5398_virt_consumer_device,
2814#endif
2815#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2816 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2817 &ad5398_userspace_consumer_device,
2818#endif
2819#endif
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002820
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002821#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002822 &adp_switch_device,
2823#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2824 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2825 &adp122_userspace_consumer_device,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002826#endif
2827#endif
Michael Hennerich0891bae2010-03-08 11:58:53 +00002828
2829#if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2830 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2831 &iio_gpio_trigger,
2832#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002833};
2834
2835static int __init stamp_init(void)
2836{
Harvey Harrisonb85d8582008-04-23 09:39:01 +08002837 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Mike Frysingerfc689112008-06-25 11:41:42 +08002838 bfin_plat_nand_init();
Mike Frysinger0531c462010-01-19 07:04:29 +00002839 adf702x_mac_init();
Bryan Wu1394f032007-05-06 14:50:22 -07002840 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
Sonic Zhangdf5de262009-09-23 05:01:56 +00002841 i2c_register_board_info(0, bfin_i2c_board_info,
2842 ARRAY_SIZE(bfin_i2c_board_info));
Mike Frysinger5bda2722008-06-07 15:03:01 +08002843 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002844
Bryan Wu1394f032007-05-06 14:50:22 -07002845 return 0;
2846}
2847
2848arch_initcall(stamp_init);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002849
Sonic Zhangc13ce9f2009-09-23 09:37:46 +00002850
2851static struct platform_device *stamp_early_devices[] __initdata = {
2852#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2853#ifdef CONFIG_SERIAL_BFIN_UART0
2854 &bfin_uart0_device,
2855#endif
2856#ifdef CONFIG_SERIAL_BFIN_UART1
2857 &bfin_uart1_device,
2858#endif
2859#endif
2860
2861#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2862#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2863 &bfin_sport0_uart_device,
2864#endif
2865#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2866 &bfin_sport1_uart_device,
2867#endif
2868#endif
2869};
2870
2871void __init native_machine_early_platform_add_devices(void)
2872{
2873 printk(KERN_INFO "register early platform devices\n");
2874 early_platform_add_devices(stamp_early_devices,
2875 ARRAY_SIZE(stamp_early_devices));
2876}
2877
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002878void native_machine_restart(char *cmd)
2879{
2880 /* workaround reboot hang when booting from SPI */
2881 if ((bfin_read_SYSCR() & 0x7) == 0x3)
Sonic Zhangb52dae32009-02-04 16:49:45 +08002882 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002883}
Mike Frysinger137b1522007-11-22 16:07:03 +08002884
2885/*
2886 * Currently the MAC address is saved in Flash by U-Boot
2887 */
2888#define FLASH_MAC 0x203f0000
Mike Frysinger9862cc52007-11-15 21:21:20 +08002889void bfin_get_ether_addr(char *addr)
Mike Frysinger137b1522007-11-22 16:07:03 +08002890{
2891 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2892 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2893}
Mike Frysinger9862cc52007-11-15 21:21:20 +08002894EXPORT_SYMBOL(bfin_get_ether_addr);