Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 1 | #ifndef LINUX_MSI_H |
| 2 | #define LINUX_MSI_H |
| 3 | |
Neil Horman | b50cac5 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 4 | #include <linux/kobject.h> |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 5 | #include <linux/list.h> |
| 6 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 7 | struct msi_msg { |
| 8 | u32 address_lo; /* low 32 bits of msi message address */ |
| 9 | u32 address_hi; /* high 32 bits of msi message address */ |
| 10 | u32 data; /* 16 bits of msi message data */ |
| 11 | }; |
| 12 | |
Yijing Wang | 38737d8 | 2014-10-27 10:44:36 +0800 | [diff] [blame] | 13 | extern int pci_msi_ignore_mask; |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 14 | /* Helper functions */ |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 15 | struct irq_data; |
Thomas Gleixner | 39431ac | 2010-09-28 19:09:51 +0200 | [diff] [blame] | 16 | struct msi_desc; |
Jiang Liu | 25a98bd | 2015-07-09 16:00:45 +0800 | [diff] [blame^] | 17 | struct pci_dev; |
Bjorn Helgaas | 2366d06 | 2013-04-18 10:55:46 -0600 | [diff] [blame] | 18 | void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
Bjorn Helgaas | 2366d06 | 2013-04-18 10:55:46 -0600 | [diff] [blame] | 19 | void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); |
Jiang Liu | 891d4a4 | 2014-11-09 23:10:33 +0800 | [diff] [blame] | 20 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 21 | struct msi_desc { |
| 22 | struct { |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 23 | __u8 is_msix : 1; |
Yijing Wang | 31ea5d4 | 2014-06-19 16:30:30 +0800 | [diff] [blame] | 24 | __u8 multiple: 3; /* log2 num of messages allocated */ |
| 25 | __u8 multi_cap : 3; /* log2 num of messages supported */ |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 26 | __u8 maskbit : 1; /* mask-pending bit supported ? */ |
| 27 | __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */ |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 28 | __u16 entry_nr; /* specific enabled entry */ |
| 29 | unsigned default_irq; /* default pre-assigned irq */ |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 30 | } msi_attrib; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 31 | |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 32 | u32 masked; /* mask bits */ |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 33 | unsigned int irq; |
Alexander Gordeev | 65f6ae6 | 2013-05-13 11:05:48 +0200 | [diff] [blame] | 34 | unsigned int nvec_used; /* number of messages */ |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 35 | struct list_head list; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 36 | |
Matthew Wilcox | 264d9ca | 2009-03-17 08:54:08 -0400 | [diff] [blame] | 37 | union { |
| 38 | void __iomem *mask_base; |
| 39 | u8 mask_pos; |
| 40 | }; |
Jiang Liu | 25a98bd | 2015-07-09 16:00:45 +0800 | [diff] [blame^] | 41 | struct device *dev; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 42 | |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 43 | /* Last set MSI message */ |
| 44 | struct msi_msg msg; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 45 | }; |
| 46 | |
Jiang Liu | d31eb34 | 2014-11-15 22:24:03 +0800 | [diff] [blame] | 47 | /* Helpers to hide struct msi_desc implementation details */ |
Jiang Liu | 25a98bd | 2015-07-09 16:00:45 +0800 | [diff] [blame^] | 48 | #define msi_desc_to_dev(desc) ((desc)->dev) |
Jiang Liu | 4a7cc83 | 2015-07-09 16:00:44 +0800 | [diff] [blame] | 49 | #define dev_to_msi_list(dev) (&(dev)->msi_list) |
Jiang Liu | d31eb34 | 2014-11-15 22:24:03 +0800 | [diff] [blame] | 50 | #define first_msi_entry(dev) \ |
| 51 | list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list) |
| 52 | #define for_each_msi_entry(desc, dev) \ |
| 53 | list_for_each_entry((desc), dev_to_msi_list((dev)), list) |
| 54 | |
| 55 | #ifdef CONFIG_PCI_MSI |
| 56 | #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev) |
| 57 | #define for_each_pci_msi_entry(desc, pdev) \ |
| 58 | for_each_msi_entry((desc), &(pdev)->dev) |
| 59 | |
Jiang Liu | 25a98bd | 2015-07-09 16:00:45 +0800 | [diff] [blame^] | 60 | struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc); |
Jiang Liu | c179c9b | 2015-07-09 16:00:36 +0800 | [diff] [blame] | 61 | void *msi_desc_to_pci_sysdata(struct msi_desc *desc); |
| 62 | #else /* CONFIG_PCI_MSI */ |
| 63 | static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc) |
| 64 | { |
| 65 | return NULL; |
| 66 | } |
Jiang Liu | d31eb34 | 2014-11-15 22:24:03 +0800 | [diff] [blame] | 67 | #endif /* CONFIG_PCI_MSI */ |
| 68 | |
Jiang Liu | 891d4a4 | 2014-11-09 23:10:33 +0800 | [diff] [blame] | 69 | void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 70 | void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
| 71 | void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg); |
| 72 | |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 73 | u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag); |
| 74 | u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag); |
| 75 | void pci_msi_mask_irq(struct irq_data *data); |
| 76 | void pci_msi_unmask_irq(struct irq_data *data); |
| 77 | |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 78 | /* Conversion helpers. Should be removed after merging */ |
| 79 | static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
| 80 | { |
| 81 | __pci_write_msi_msg(entry, msg); |
| 82 | } |
| 83 | static inline void write_msi_msg(int irq, struct msi_msg *msg) |
| 84 | { |
| 85 | pci_write_msi_msg(irq, msg); |
| 86 | } |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 87 | static inline void mask_msi_irq(struct irq_data *data) |
| 88 | { |
| 89 | pci_msi_mask_irq(data); |
| 90 | } |
| 91 | static inline void unmask_msi_irq(struct irq_data *data) |
| 92 | { |
| 93 | pci_msi_unmask_irq(data); |
| 94 | } |
Jiang Liu | 891d4a4 | 2014-11-09 23:10:33 +0800 | [diff] [blame] | 95 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 96 | /* |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 97 | * The arch hooks to setup up msi irqs. Those functions are |
| 98 | * implemented as weak symbols so that they /can/ be overriden by |
| 99 | * architecture specific code if needed. |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 100 | */ |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 101 | int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 102 | void arch_teardown_msi_irq(unsigned int irq); |
Bjorn Helgaas | 2366d06 | 2013-04-18 10:55:46 -0600 | [diff] [blame] | 103 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); |
| 104 | void arch_teardown_msi_irqs(struct pci_dev *dev); |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 105 | void arch_restore_msi_irqs(struct pci_dev *dev); |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 106 | |
| 107 | void default_teardown_msi_irqs(struct pci_dev *dev); |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 108 | void default_restore_msi_irqs(struct pci_dev *dev); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 109 | |
Yijing Wang | c2791b8 | 2014-11-11 17:45:45 -0700 | [diff] [blame] | 110 | struct msi_controller { |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 111 | struct module *owner; |
| 112 | struct device *dev; |
Thomas Petazzoni | 0d5a6db | 2013-08-09 22:27:09 +0200 | [diff] [blame] | 113 | struct device_node *of_node; |
| 114 | struct list_head list; |
Marc Zyngier | 020c312 | 2014-11-15 10:49:12 +0000 | [diff] [blame] | 115 | #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN |
| 116 | struct irq_domain *domain; |
| 117 | #endif |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 118 | |
Yijing Wang | c2791b8 | 2014-11-11 17:45:45 -0700 | [diff] [blame] | 119 | int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev, |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 120 | struct msi_desc *desc); |
Yijing Wang | c2791b8 | 2014-11-11 17:45:45 -0700 | [diff] [blame] | 121 | void (*teardown_irq)(struct msi_controller *chip, unsigned int irq); |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 122 | }; |
| 123 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 124 | #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 125 | |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 126 | #include <linux/irqhandler.h> |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 127 | #include <asm/msi.h> |
| 128 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 129 | struct irq_domain; |
| 130 | struct irq_chip; |
| 131 | struct device_node; |
| 132 | struct msi_domain_info; |
| 133 | |
| 134 | /** |
| 135 | * struct msi_domain_ops - MSI interrupt domain callbacks |
| 136 | * @get_hwirq: Retrieve the resulting hw irq number |
| 137 | * @msi_init: Domain specific init function for MSI interrupts |
| 138 | * @msi_free: Domain specific function to free a MSI interrupts |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 139 | * @msi_check: Callback for verification of the domain/info/dev data |
| 140 | * @msi_prepare: Prepare the allocation of the interrupts in the domain |
| 141 | * @msi_finish: Optional callbacl to finalize the allocation |
| 142 | * @set_desc: Set the msi descriptor for an interrupt |
| 143 | * @handle_error: Optional error handler if the allocation fails |
| 144 | * |
| 145 | * @get_hwirq, @msi_init and @msi_free are callbacks used by |
| 146 | * msi_create_irq_domain() and related interfaces |
| 147 | * |
| 148 | * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error |
| 149 | * are callbacks used by msi_irq_domain_alloc_irqs() and related |
| 150 | * interfaces which are based on msi_desc. |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 151 | */ |
| 152 | struct msi_domain_ops { |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 153 | irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, |
| 154 | msi_alloc_info_t *arg); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 155 | int (*msi_init)(struct irq_domain *domain, |
| 156 | struct msi_domain_info *info, |
| 157 | unsigned int virq, irq_hw_number_t hwirq, |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 158 | msi_alloc_info_t *arg); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 159 | void (*msi_free)(struct irq_domain *domain, |
| 160 | struct msi_domain_info *info, |
| 161 | unsigned int virq); |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 162 | int (*msi_check)(struct irq_domain *domain, |
| 163 | struct msi_domain_info *info, |
| 164 | struct device *dev); |
| 165 | int (*msi_prepare)(struct irq_domain *domain, |
| 166 | struct device *dev, int nvec, |
| 167 | msi_alloc_info_t *arg); |
| 168 | void (*msi_finish)(msi_alloc_info_t *arg, int retval); |
| 169 | void (*set_desc)(msi_alloc_info_t *arg, |
| 170 | struct msi_desc *desc); |
| 171 | int (*handle_error)(struct irq_domain *domain, |
| 172 | struct msi_desc *desc, int error); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 173 | }; |
| 174 | |
| 175 | /** |
| 176 | * struct msi_domain_info - MSI interrupt domain data |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 177 | * @flags: Flags to decribe features and capabilities |
| 178 | * @ops: The callback data structure |
| 179 | * @chip: Optional: associated interrupt chip |
| 180 | * @chip_data: Optional: associated interrupt chip data |
| 181 | * @handler: Optional: associated interrupt flow handler |
| 182 | * @handler_data: Optional: associated interrupt flow handler data |
| 183 | * @handler_name: Optional: associated interrupt flow handler name |
| 184 | * @data: Optional: domain specific data |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 185 | */ |
| 186 | struct msi_domain_info { |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 187 | u32 flags; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 188 | struct msi_domain_ops *ops; |
| 189 | struct irq_chip *chip; |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 190 | void *chip_data; |
| 191 | irq_flow_handler_t handler; |
| 192 | void *handler_data; |
| 193 | const char *handler_name; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 194 | void *data; |
| 195 | }; |
| 196 | |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 197 | /* Flags for msi_domain_info */ |
| 198 | enum { |
| 199 | /* |
| 200 | * Init non implemented ops callbacks with default MSI domain |
| 201 | * callbacks. |
| 202 | */ |
| 203 | MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0), |
| 204 | /* |
| 205 | * Init non implemented chip callbacks with default MSI chip |
| 206 | * callbacks. |
| 207 | */ |
| 208 | MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1), |
| 209 | /* Build identity map between hwirq and irq */ |
| 210 | MSI_FLAG_IDENTITY_MAP = (1 << 2), |
| 211 | /* Support multiple PCI MSI interrupts */ |
| 212 | MSI_FLAG_MULTI_PCI_MSI = (1 << 3), |
| 213 | /* Support PCI MSIX interrupts */ |
| 214 | MSI_FLAG_PCI_MSIX = (1 << 4), |
| 215 | }; |
| 216 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 217 | int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, |
| 218 | bool force); |
| 219 | |
| 220 | struct irq_domain *msi_create_irq_domain(struct device_node *of_node, |
| 221 | struct msi_domain_info *info, |
| 222 | struct irq_domain *parent); |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 223 | int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, |
| 224 | int nvec); |
| 225 | void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 226 | struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); |
| 227 | |
| 228 | #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ |
| 229 | |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 230 | #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN |
| 231 | void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg); |
| 232 | struct irq_domain *pci_msi_create_irq_domain(struct device_node *node, |
| 233 | struct msi_domain_info *info, |
| 234 | struct irq_domain *parent); |
| 235 | int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev, |
| 236 | int nvec, int type); |
| 237 | void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev); |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 238 | struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node, |
| 239 | struct msi_domain_info *info, struct irq_domain *parent); |
| 240 | |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 241 | irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev, |
| 242 | struct msi_desc *desc); |
| 243 | int pci_msi_domain_check_cap(struct irq_domain *domain, |
| 244 | struct msi_domain_info *info, struct device *dev); |
| 245 | #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */ |
| 246 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 247 | #endif /* LINUX_MSI_H */ |