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James Hogan30dd9e02014-02-28 20:28:54 -03001/*
2 * ImgTec IR Hardware Decoder found in PowerDown Controller.
3 *
4 * Copyright 2010-2014 Imagination Technologies Ltd.
5 */
6
7#ifndef _IMG_IR_HW_H_
8#define _IMG_IR_HW_H_
9
10#include <linux/kernel.h>
11#include <media/rc-core.h>
12
13/* constants */
14
15#define IMG_IR_CODETYPE_PULSELEN 0x0 /* Sony */
16#define IMG_IR_CODETYPE_PULSEDIST 0x1 /* NEC, Toshiba, Micom, Sharp */
17#define IMG_IR_CODETYPE_BIPHASE 0x2 /* RC-5/6 */
18#define IMG_IR_CODETYPE_2BITPULSEPOS 0x3 /* RC-MM */
19
20
21/* Timing information */
22
23/**
24 * struct img_ir_control - Decoder control settings
25 * @decoden: Primary decoder enable
26 * @code_type: Decode type (see IMG_IR_CODETYPE_*)
27 * @hdrtog: Detect header toggle symbol after leader symbol
28 * @ldrdec: Don't discard leader if maximum width reached
29 * @decodinpol: Decoder input polarity (1=active high)
30 * @bitorien: Bit orientation (1=MSB first)
31 * @d1validsel: Decoder 2 takes over if it detects valid data
32 * @bitinv: Bit inversion switch (1=don't invert)
33 * @decodend2: Secondary decoder enable (no leader symbol)
34 * @bitoriend2: Bit orientation (1=MSB first)
35 * @bitinvd2: Secondary decoder bit inversion switch (1=don't invert)
36 */
37struct img_ir_control {
38 unsigned decoden:1;
39 unsigned code_type:2;
40 unsigned hdrtog:1;
41 unsigned ldrdec:1;
42 unsigned decodinpol:1;
43 unsigned bitorien:1;
44 unsigned d1validsel:1;
45 unsigned bitinv:1;
46 unsigned decodend2:1;
47 unsigned bitoriend2:1;
48 unsigned bitinvd2:1;
49};
50
51/**
52 * struct img_ir_timing_range - range of timing values
53 * @min: Minimum timing value
54 * @max: Maximum timing value (if < @min, this will be set to @min during
55 * preprocessing step, so it is normally not explicitly initialised
56 * and is taken care of by the tolerance)
57 */
58struct img_ir_timing_range {
59 u16 min;
60 u16 max;
61};
62
63/**
64 * struct img_ir_symbol_timing - timing data for a symbol
65 * @pulse: Timing range for the length of the pulse in this symbol
66 * @space: Timing range for the length of the space in this symbol
67 */
68struct img_ir_symbol_timing {
69 struct img_ir_timing_range pulse;
70 struct img_ir_timing_range space;
71};
72
73/**
74 * struct img_ir_free_timing - timing data for free time symbol
75 * @minlen: Minimum number of bits of data
76 * @maxlen: Maximum number of bits of data
77 * @ft_min: Minimum free time after message
78 */
79struct img_ir_free_timing {
80 /* measured in bits */
81 u8 minlen;
82 u8 maxlen;
83 u16 ft_min;
84};
85
86/**
87 * struct img_ir_timings - Timing values.
88 * @ldr: Leader symbol timing data
89 * @s00: Zero symbol timing data for primary decoder
90 * @s01: One symbol timing data for primary decoder
91 * @s10: Zero symbol timing data for secondary (no leader symbol) decoder
92 * @s11: One symbol timing data for secondary (no leader symbol) decoder
93 * @ft: Free time symbol timing data
94 */
95struct img_ir_timings {
96 struct img_ir_symbol_timing ldr, s00, s01, s10, s11;
97 struct img_ir_free_timing ft;
98};
99
100/**
101 * struct img_ir_filter - Filter IR events.
102 * @data: Data to match.
103 * @mask: Mask of bits to compare.
104 * @minlen: Additional minimum number of bits.
105 * @maxlen: Additional maximum number of bits.
106 */
107struct img_ir_filter {
108 u64 data;
109 u64 mask;
110 u8 minlen;
111 u8 maxlen;
112};
113
114/**
115 * struct img_ir_timing_regvals - Calculated timing register values.
116 * @ldr: Leader symbol timing register value
117 * @s00: Zero symbol timing register value for primary decoder
118 * @s01: One symbol timing register value for primary decoder
119 * @s10: Zero symbol timing register value for secondary decoder
120 * @s11: One symbol timing register value for secondary decoder
121 * @ft: Free time symbol timing register value
122 */
123struct img_ir_timing_regvals {
124 u32 ldr, s00, s01, s10, s11, ft;
125};
126
127#define IMG_IR_SCANCODE 0 /* new scancode */
128#define IMG_IR_REPEATCODE 1 /* repeat the previous code */
129
130/**
131 * struct img_ir_decoder - Decoder settings for an IR protocol.
132 * @type: Protocol types bitmap.
133 * @tolerance: Timing tolerance as a percentage (default 10%).
134 * @unit: Unit of timings in nanoseconds (default 1 us).
135 * @timings: Primary timings
136 * @rtimings: Additional override timings while waiting for repeats.
137 * @repeat: Maximum repeat interval (always in milliseconds).
138 * @control: Control flags.
139 *
140 * @scancode: Pointer to function to convert the IR data into a scancode (it
141 * must be safe to execute in interrupt context).
142 * Returns IMG_IR_SCANCODE to emit new scancode.
143 * Returns IMG_IR_REPEATCODE to repeat previous code.
144 * Returns -errno (e.g. -EINVAL) on error.
145 * @filter: Pointer to function to convert scancode filter to raw hardware
146 * filter. The minlen and maxlen fields will have been initialised
147 * to the maximum range.
148 */
149struct img_ir_decoder {
150 /* core description */
151 u64 type;
152 unsigned int tolerance;
153 unsigned int unit;
154 struct img_ir_timings timings;
155 struct img_ir_timings rtimings;
156 unsigned int repeat;
157 struct img_ir_control control;
158
159 /* scancode logic */
160 int (*scancode)(int len, u64 raw, int *scancode, u64 protocols);
161 int (*filter)(const struct rc_scancode_filter *in,
162 struct img_ir_filter *out, u64 protocols);
163};
164
165/**
166 * struct img_ir_reg_timings - Reg values for decoder timings at clock rate.
167 * @ctrl: Processed control register value.
168 * @timings: Processed primary timings.
169 * @rtimings: Processed repeat timings.
170 */
171struct img_ir_reg_timings {
172 u32 ctrl;
173 struct img_ir_timing_regvals timings;
174 struct img_ir_timing_regvals rtimings;
175};
176
177int img_ir_register_decoder(struct img_ir_decoder *dec);
178void img_ir_unregister_decoder(struct img_ir_decoder *dec);
179
180struct img_ir_priv;
181
182#ifdef CONFIG_IR_IMG_HW
183
184enum img_ir_mode {
185 IMG_IR_M_NORMAL,
186 IMG_IR_M_REPEATING,
187#ifdef CONFIG_PM_SLEEP
188 IMG_IR_M_WAKE,
189#endif
190};
191
192/**
193 * struct img_ir_priv_hw - Private driver data for hardware decoder.
194 * @ct_quirks: Quirk bits for each code type.
195 * @rdev: Remote control device
196 * @clk_nb: Notifier block for clock notify events.
197 * @end_timer: Timer until repeat timeout.
198 * @decoder: Current decoder settings.
199 * @enabled_protocols: Currently enabled protocols.
200 * @clk_hz: Current core clock rate in Hz.
201 * @reg_timings: Timing reg values for decoder at clock rate.
202 * @flags: IMG_IR_F_*.
203 * @filters: HW filters (derived from scancode filters).
204 * @mode: Current decode mode.
205 * @suspend_irqen: Saved IRQ enable mask over suspend.
206 */
207struct img_ir_priv_hw {
208 unsigned int ct_quirks[4];
209 struct rc_dev *rdev;
210 struct notifier_block clk_nb;
211 struct timer_list end_timer;
212 const struct img_ir_decoder *decoder;
213 u64 enabled_protocols;
214 unsigned long clk_hz;
215 struct img_ir_reg_timings reg_timings;
216 unsigned int flags;
217 struct img_ir_filter filters[RC_FILTER_MAX];
218
219 enum img_ir_mode mode;
220 u32 suspend_irqen;
221};
222
223static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
224{
225 return hw->rdev;
226};
227
228void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status);
229void img_ir_setup_hw(struct img_ir_priv *priv);
230int img_ir_probe_hw(struct img_ir_priv *priv);
231void img_ir_remove_hw(struct img_ir_priv *priv);
232
233#ifdef CONFIG_PM_SLEEP
234int img_ir_suspend(struct device *dev);
235int img_ir_resume(struct device *dev);
236#else
237#define img_ir_suspend NULL
238#define img_ir_resume NULL
239#endif
240
241#else
242
243struct img_ir_priv_hw {
244};
245
246static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
247{
248 return false;
249};
250static inline void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
251{
252}
253static inline void img_ir_setup_hw(struct img_ir_priv *priv)
254{
255}
256static inline int img_ir_probe_hw(struct img_ir_priv *priv)
257{
258 return -ENODEV;
259}
260static inline void img_ir_remove_hw(struct img_ir_priv *priv)
261{
262}
263
264#define img_ir_suspend NULL
265#define img_ir_resume NULL
266
267#endif /* CONFIG_IR_IMG_HW */
268
269#endif /* _IMG_IR_HW_H_ */