blob: 8b18b3c3bcf066477e4ea96af96e25962a2ed760 [file] [log] [blame]
Anson Huange95dddb2013-03-20 19:39:42 -04001/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <linux/err.h>
13#include <linux/io.h>
14#include <linux/of.h>
15#include <linux/of_address.h>
16#include <linux/mfd/syscon.h>
17#include <linux/regmap.h>
18
19#define REG_SET 0x4
20#define REG_CLR 0x8
21
Anson Huang263475d2013-03-21 10:58:06 -040022#define ANADIG_REG_2P5 0x130
Anson Huange95dddb2013-03-20 19:39:42 -040023#define ANADIG_REG_CORE 0x140
Anson Huang263475d2013-03-21 10:58:06 -040024#define ANADIG_ANA_MISC0 0x150
Anson Huange95dddb2013-03-20 19:39:42 -040025#define ANADIG_USB1_CHRG_DETECT 0x1b0
26#define ANADIG_USB2_CHRG_DETECT 0x210
27#define ANADIG_DIGPROG 0x260
28
Anson Huang263475d2013-03-21 10:58:06 -040029#define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000
Anson Huange95dddb2013-03-20 19:39:42 -040030#define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000
Anson Huang263475d2013-03-21 10:58:06 -040031#define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG 0x1000
Anson Huange95dddb2013-03-20 19:39:42 -040032#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x80000
33#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x100000
34
35static struct regmap *anatop;
36
Anson Huang263475d2013-03-21 10:58:06 -040037static void imx_anatop_enable_weak2p5(bool enable)
38{
39 u32 reg, val;
40
41 regmap_read(anatop, ANADIG_ANA_MISC0, &val);
42
43 /* can only be enabled when stop_mode_config is clear. */
44 reg = ANADIG_REG_2P5;
45 reg += (enable && (val & BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG) == 0) ?
46 REG_SET : REG_CLR;
47 regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG);
48}
49
Anson Huange95dddb2013-03-20 19:39:42 -040050static void imx_anatop_enable_fet_odrive(bool enable)
51{
52 regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR),
53 BM_ANADIG_REG_CORE_FET_ODRIVE);
54}
55
56void imx_anatop_pre_suspend(void)
57{
Anson Huang263475d2013-03-21 10:58:06 -040058 imx_anatop_enable_weak2p5(true);
Anson Huange95dddb2013-03-20 19:39:42 -040059 imx_anatop_enable_fet_odrive(true);
60}
61
62void imx_anatop_post_resume(void)
63{
64 imx_anatop_enable_fet_odrive(false);
Anson Huang263475d2013-03-21 10:58:06 -040065 imx_anatop_enable_weak2p5(false);
Anson Huange95dddb2013-03-20 19:39:42 -040066}
67
68void imx_anatop_usb_chrg_detect_disable(void)
69{
70 regmap_write(anatop, ANADIG_USB1_CHRG_DETECT,
71 BM_ANADIG_USB_CHRG_DETECT_EN_B
72 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
73 regmap_write(anatop, ANADIG_USB2_CHRG_DETECT,
74 BM_ANADIG_USB_CHRG_DETECT_EN_B |
75 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
76}
77
78u32 imx_anatop_get_digprog(void)
79{
80 u32 val;
81
82 regmap_read(anatop, ANADIG_DIGPROG, &val);
83 return val;
84}
85
86void __init imx_anatop_init(void)
87{
88 anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
89 if (IS_ERR(anatop)) {
90 pr_err("%s: failed to find imx6q-anatop regmap!\n", __func__);
91 return;
92 }
93}