| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _M68K_MVME16xHW_H_ |
| 2 | #define _M68K_MVME16xHW_H_ |
| 3 | |
| 4 | #include <asm/irq.h> |
| 5 | |
| 6 | /* Board ID data structure - pointer to this retrieved from Bug by head.S */ |
| 7 | |
| 8 | /* Note, bytes 12 and 13 are board no in BCD (0162,0166,0167,0177,etc) */ |
| 9 | |
| 10 | extern long mvme_bdid_ptr; |
| 11 | |
| 12 | typedef struct { |
| 13 | char bdid[4]; |
| 14 | u_char rev, mth, day, yr; |
| 15 | u_short size, reserved; |
| 16 | u_short brdno; |
| 17 | char brdsuffix[2]; |
| 18 | u_long options; |
| 19 | u_short clun, dlun, ctype, dnum; |
| 20 | u_long option2; |
| 21 | } t_bdid, *p_bdid; |
| 22 | |
| 23 | |
| 24 | typedef struct { |
| 25 | u_char ack_icr, |
| 26 | flt_icr, |
| 27 | sel_icr, |
| 28 | pe_icr, |
| 29 | bsy_icr, |
| 30 | spare1, |
| 31 | isr, |
| 32 | cr, |
| 33 | spare2, |
| 34 | spare3, |
| 35 | spare4, |
| 36 | data; |
| 37 | } MVMElp, *MVMElpPtr; |
| 38 | |
| 39 | #define MVME_LPR_BASE 0xfff42030 |
| 40 | |
| 41 | #define mvmelp ((*(volatile MVMElpPtr)(MVME_LPR_BASE))) |
| 42 | |
| 43 | typedef struct { |
| 44 | unsigned char |
| 45 | ctrl, |
| 46 | bcd_sec, |
| 47 | bcd_min, |
| 48 | bcd_hr, |
| 49 | bcd_dow, |
| 50 | bcd_dom, |
| 51 | bcd_mth, |
| 52 | bcd_year; |
| 53 | } MK48T08_t, *MK48T08ptr_t; |
| 54 | |
| 55 | #define RTC_WRITE 0x80 |
| 56 | #define RTC_READ 0x40 |
| 57 | #define RTC_STOP 0x20 |
| 58 | |
| 59 | #define MVME_RTC_BASE 0xfffc1ff8 |
| 60 | |
| 61 | #define MVME_I596_BASE 0xfff46000 |
| 62 | |
| 63 | #define MVME_SCC_A_ADDR 0xfff45005 |
| 64 | #define MVME_SCC_B_ADDR 0xfff45001 |
| 65 | #define MVME_SCC_PCLK 10000000 |
| 66 | |
| 67 | #define MVME162_IRQ_TYPE_PRIO 0 |
| 68 | |
| 69 | #define MVME167_IRQ_PRN 0x54 |
| 70 | #define MVME16x_IRQ_I596 0x57 |
| 71 | #define MVME16x_IRQ_SCSI 0x55 |
| 72 | #define MVME16x_IRQ_FLY 0x7f |
| 73 | #define MVME167_IRQ_SER_ERR 0x5c |
| 74 | #define MVME167_IRQ_SER_MODEM 0x5d |
| 75 | #define MVME167_IRQ_SER_TX 0x5e |
| 76 | #define MVME167_IRQ_SER_RX 0x5f |
| 77 | #define MVME16x_IRQ_TIMER 0x59 |
| 78 | #define MVME167_IRQ_ABORT 0x6e |
| 79 | #define MVME162_IRQ_ABORT 0x5e |
| 80 | |
| 81 | /* SCC interrupts, for MVME162 */ |
| 82 | #define MVME162_IRQ_SCC_BASE 0x40 |
| 83 | #define MVME162_IRQ_SCCB_TX 0x40 |
| 84 | #define MVME162_IRQ_SCCB_STAT 0x42 |
| 85 | #define MVME162_IRQ_SCCB_RX 0x44 |
| 86 | #define MVME162_IRQ_SCCB_SPCOND 0x46 |
| 87 | #define MVME162_IRQ_SCCA_TX 0x48 |
| 88 | #define MVME162_IRQ_SCCA_STAT 0x4a |
| 89 | #define MVME162_IRQ_SCCA_RX 0x4c |
| 90 | #define MVME162_IRQ_SCCA_SPCOND 0x4e |
| 91 | |
| 92 | /* MVME162 version register */ |
| 93 | |
| 94 | #define MVME162_VERSION_REG 0xfff4202e |
| 95 | |
| 96 | extern unsigned short mvme16x_config; |
| 97 | |
| 98 | /* Lower 8 bits must match the revision register in the MC2 chip */ |
| 99 | |
| 100 | #define MVME16x_CONFIG_SPEED_32 0x0001 |
| 101 | #define MVME16x_CONFIG_NO_VMECHIP2 0x0002 |
| 102 | #define MVME16x_CONFIG_NO_SCSICHIP 0x0004 |
| 103 | #define MVME16x_CONFIG_NO_ETHERNET 0x0008 |
| 104 | #define MVME16x_CONFIG_GOT_FPU 0x0010 |
| 105 | |
| 106 | #define MVME16x_CONFIG_GOT_LP 0x0100 |
| 107 | #define MVME16x_CONFIG_GOT_CD2401 0x0200 |
| 108 | #define MVME16x_CONFIG_GOT_SCCA 0x0400 |
| 109 | #define MVME16x_CONFIG_GOT_SCCB 0x0800 |
| 110 | |
| 111 | #endif |